[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / test / ThinLTO / X86 / Inputs / cache-typeid-resolutions3.ll
blobc3de5205ede5aab95e529277863fbedf967f6967
1 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
2 target triple = "x86_64-unknown-linux-gnu"
4 @vt2a = constant i1 (i8*)* @vf2a, !type !0
5 @vt2b = constant i1 (i8*)* @vf2b, !type !0
7 define internal i1 @vf2a(i8* %this) {
8   ret i1 0
11 define internal i1 @vf2b(i8* %this) {
12   ret i1 1
15 !0 = !{i32 0, !"typeid2"}