1 //===-- Target.h ------------------------------------------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 /// Classes that handle the creation of target-specific objects. This is
12 /// similar to Target/TargetRegistry.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_TOOLS_LLVM_EXEGESIS_TARGET_H
17 #define LLVM_TOOLS_LLVM_EXEGESIS_TARGET_H
19 #include "BenchmarkResult.h"
20 #include "BenchmarkRunner.h"
21 #include "LlvmState.h"
22 #include "SnippetGenerator.h"
23 #include "llvm/ADT/Triple.h"
24 #include "llvm/CodeGen/TargetPassConfig.h"
25 #include "llvm/IR/CallingConv.h"
26 #include "llvm/IR/LegacyPassManager.h"
27 #include "llvm/MC/MCInst.h"
28 #include "llvm/MC/MCRegisterInfo.h"
33 struct PfmCountersInfo
{
34 // An optional name of a performance counter that can be used to measure
36 const char *CycleCounter
;
38 // An optional name of a performance counter that can be used to measure
40 const char *UopsCounter
;
42 // An IssueCounter specifies how to measure uops issued to specific proc
46 // The name of the ProcResource that this counter measures.
47 const char *ProcResName
;
49 // An optional list of IssueCounters.
50 const IssueCounter
*IssueCounters
;
51 unsigned NumIssueCounters
;
53 static const PfmCountersInfo Default
;
56 struct CpuAndPfmCounters
{
58 const PfmCountersInfo
*PCI
;
59 bool operator<(StringRef S
) const { return StringRef(CpuName
) < S
; }
62 class ExegesisTarget
{
64 explicit ExegesisTarget(ArrayRef
<CpuAndPfmCounters
> CpuPfmCounters
)
65 : CpuPfmCounters(CpuPfmCounters
) {}
67 // Targets can use this to add target-specific passes in assembleToStream();
68 virtual void addTargetSpecificPasses(PassManagerBase
&PM
) const {}
70 // Generates code to move a constant into a the given register.
71 // Precondition: Value must fit into Reg.
72 virtual std::vector
<MCInst
> setRegTo(const MCSubtargetInfo
&STI
, unsigned Reg
,
73 const APInt
&Value
) const = 0;
75 // Returns the register pointing to scratch memory, or 0 if this target
76 // does not support memory operands. The benchmark function uses the
77 // default calling convention.
78 virtual unsigned getScratchMemoryRegister(const Triple
&) const { return 0; }
80 // Fills memory operands with references to the address at [Reg] + Offset.
81 virtual void fillMemoryOperands(InstructionTemplate
&IT
, unsigned Reg
,
82 unsigned Offset
) const {
84 "fillMemoryOperands() requires getScratchMemoryRegister() > 0");
87 // Returns a counter usable as a loop counter.
88 virtual unsigned getLoopCounterRegister(const Triple
&) const { return 0; }
90 // Adds the code to decrement the loop counter and
91 virtual void decrementLoopCounterAndJump(MachineBasicBlock
&MBB
,
92 MachineBasicBlock
&TargetMBB
,
93 const MCInstrInfo
&MII
) const {
94 llvm_unreachable("decrementLoopCounterAndBranch() requires "
95 "getLoopCounterRegister() > 0");
98 // Returns a list of unavailable registers.
99 // Targets can use this to prevent some registers to be automatically selected
100 // for use in snippets.
101 virtual ArrayRef
<unsigned> getUnavailableRegisters() const { return {}; }
103 // Returns the maximum number of bytes a load/store instruction can access at
104 // once. This is typically the size of the largest register available on the
105 // processor. Note that this only used as a hint to generate independant
106 // load/stores to/from memory, so the exact returned value does not really
107 // matter as long as it's large enough.
108 virtual unsigned getMaxMemoryAccessSize() const { return 0; }
110 // Assigns a random operand of the right type to variable Var.
111 // The default implementation only handles generic operand types.
112 // The target is responsible for handling any operand
113 // starting from OPERAND_FIRST_TARGET.
114 virtual void randomizeMCOperand(const Instruction
&Instr
, const Variable
&Var
,
115 MCOperand
&AssignedValue
,
116 const BitVector
&ForbiddenRegs
) const;
118 // Creates a snippet generator for the given mode.
119 std::unique_ptr
<SnippetGenerator
>
120 createSnippetGenerator(InstructionBenchmark::ModeE Mode
,
121 const LLVMState
&State
,
122 const SnippetGenerator::Options
&Opts
) const;
123 // Creates a benchmark runner for the given mode.
124 std::unique_ptr
<BenchmarkRunner
>
125 createBenchmarkRunner(InstructionBenchmark::ModeE Mode
,
126 const LLVMState
&State
) const;
128 // Returns the ExegesisTarget for the given triple or nullptr if the target
130 static const ExegesisTarget
*lookup(Triple TT
);
131 // Returns the default (unspecialized) ExegesisTarget.
132 static const ExegesisTarget
&getDefault();
133 // Registers a target. Not thread safe.
134 static void registerTarget(ExegesisTarget
*T
);
136 virtual ~ExegesisTarget();
138 // Returns the Pfm counters for the given CPU (or the default if no pfm
139 // counters are defined for this CPU).
140 const PfmCountersInfo
&getPfmCounters(StringRef CpuName
) const;
143 virtual bool matchesArch(Triple::ArchType Arch
) const = 0;
145 // Targets can implement their own snippet generators/benchmarks runners by
146 // implementing these.
147 std::unique_ptr
<SnippetGenerator
> virtual createLatencySnippetGenerator(
148 const LLVMState
&State
, const SnippetGenerator::Options
&Opts
) const;
149 std::unique_ptr
<SnippetGenerator
> virtual createUopsSnippetGenerator(
150 const LLVMState
&State
, const SnippetGenerator::Options
&Opts
) const;
151 std::unique_ptr
<BenchmarkRunner
> virtual createLatencyBenchmarkRunner(
152 const LLVMState
&State
, InstructionBenchmark::ModeE Mode
) const;
153 std::unique_ptr
<BenchmarkRunner
> virtual createUopsBenchmarkRunner(
154 const LLVMState
&State
) const;
156 const ExegesisTarget
*Next
= nullptr;
157 const ArrayRef
<CpuAndPfmCounters
> CpuPfmCounters
;
160 } // namespace exegesis
163 #endif // LLVM_TOOLS_LLVM_EXEGESIS_TARGET_H