[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / tools / llvm-mca / Views / DispatchStatistics.h
blob07c0f5a4c68f978d37ad0361397bd83751c779ee
1 //===--------------------- DispatchStatistics.h -----------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 ///
10 /// This file implements a view that prints a few statistics related to the
11 /// dispatch logic. It collects and analyzes instruction dispatch events as
12 /// well as static/dynamic dispatch stall events.
13 ///
14 /// Example:
15 /// ========
16 ///
17 /// Dynamic Dispatch Stall Cycles:
18 /// RAT - Register unavailable: 0
19 /// RCU - Retire tokens unavailable: 0
20 /// SCHEDQ - Scheduler full: 42
21 /// LQ - Load queue full: 0
22 /// SQ - Store queue full: 0
23 /// GROUP - Static restrictions on the dispatch group: 0
24 ///
25 ///
26 /// Dispatch Logic - number of cycles where we saw N micro opcodes dispatched:
27 /// [# dispatched], [# cycles]
28 /// 0, 15 (11.5%)
29 /// 2, 4 (3.1%)
30 ///
31 //===----------------------------------------------------------------------===//
33 #ifndef LLVM_TOOLS_LLVM_MCA_DISPATCHVIEW_H
34 #define LLVM_TOOLS_LLVM_MCA_DISPATCHVIEW_H
36 #include "Views/View.h"
37 #include "llvm/ADT/SmallVector.h"
38 #include "llvm/MC/MCSubtargetInfo.h"
39 #include <map>
41 namespace llvm {
42 namespace mca {
44 class DispatchStatistics : public View {
45 unsigned NumDispatched;
46 unsigned NumCycles;
48 // Counts dispatch stall events caused by unavailability of resources. There
49 // is one counter for every generic stall kind (see class HWStallEvent).
50 llvm::SmallVector<unsigned, 8> HWStalls;
52 using Histogram = std::map<unsigned, unsigned>;
53 Histogram DispatchGroupSizePerCycle;
55 void updateHistograms() {
56 DispatchGroupSizePerCycle[NumDispatched]++;
57 NumDispatched = 0;
60 void printDispatchHistogram(llvm::raw_ostream &OS) const;
62 void printDispatchStalls(llvm::raw_ostream &OS) const;
64 public:
65 DispatchStatistics()
66 : NumDispatched(0), NumCycles(0),
67 HWStalls(HWStallEvent::LastGenericEvent) {}
69 void onEvent(const HWStallEvent &Event) override;
71 void onEvent(const HWInstructionEvent &Event) override;
73 void onCycleBegin() override { NumCycles++; }
75 void onCycleEnd() override { updateHistograms(); }
77 void printView(llvm::raw_ostream &OS) const override {
78 printDispatchStalls(OS);
79 printDispatchHistogram(OS);
82 } // namespace mca
83 } // namespace llvm
85 #endif