[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / utils / gn / secondary / llvm / lib / CodeGen / SelectionDAG / BUILD.gn
blobfda56d73453448c2dd650d9a6ffeae33813ca48f
1 static_library("SelectionDAG") {
2   output_name = "LLVMSelectionDAG"
3   deps = [
4     "//llvm/lib/Analysis",
5     "//llvm/lib/CodeGen",
6     "//llvm/lib/IR",
7     "//llvm/lib/MC",
8     "//llvm/lib/Support",
9     "//llvm/lib/Target",
10     "//llvm/lib/Transforms/Utils",
11   ]
12   sources = [
13     "DAGCombiner.cpp",
14     "FastISel.cpp",
15     "FunctionLoweringInfo.cpp",
16     "InstrEmitter.cpp",
17     "LegalizeDAG.cpp",
18     "LegalizeFloatTypes.cpp",
19     "LegalizeIntegerTypes.cpp",
20     "LegalizeTypes.cpp",
21     "LegalizeTypesGeneric.cpp",
22     "LegalizeVectorOps.cpp",
23     "LegalizeVectorTypes.cpp",
24     "ResourcePriorityQueue.cpp",
25     "ScheduleDAGFast.cpp",
26     "ScheduleDAGRRList.cpp",
27     "ScheduleDAGSDNodes.cpp",
28     "ScheduleDAGVLIW.cpp",
29     "SelectionDAG.cpp",
30     "SelectionDAGAddressAnalysis.cpp",
31     "SelectionDAGBuilder.cpp",
32     "SelectionDAGDumper.cpp",
33     "SelectionDAGISel.cpp",
34     "SelectionDAGPrinter.cpp",
35     "SelectionDAGTargetInfo.cpp",
36     "StatepointLowering.cpp",
37     "TargetLowering.cpp",
38   ]