[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / utils / gn / secondary / llvm / lib / MCA / BUILD.gn
blob6aaa9932bb070d075bb572fb670d830e8ef17a23
1 static_library("MCA") {
2   output_name = "LLVMMCA"
3   deps = [
4     "//llvm/lib/CodeGen",
5     "//llvm/lib/MC",
6     "//llvm/lib/Support",
7   ]
8   include_dirs = [ "../include" ]
9   sources = [
10     "CodeEmitter.cpp",
11     "Context.cpp",
12     "HWEventListener.cpp",
13     "HardwareUnits/HardwareUnit.cpp",
14     "HardwareUnits/LSUnit.cpp",
15     "HardwareUnits/RegisterFile.cpp",
16     "HardwareUnits/ResourceManager.cpp",
17     "HardwareUnits/RetireControlUnit.cpp",
18     "HardwareUnits/Scheduler.cpp",
19     "InstrBuilder.cpp",
20     "Instruction.cpp",
21     "Pipeline.cpp",
22     "Stages/DispatchStage.cpp",
23     "Stages/EntryStage.cpp",
24     "Stages/ExecuteStage.cpp",
25     "Stages/InstructionTables.cpp",
26     "Stages/MicroOpQueueStage.cpp",
27     "Stages/RetireStage.cpp",
28     "Stages/Stage.cpp",
29     "Support.cpp",
30   ]