[MIParser] Set RegClassOrRegBank during instruction parsing
[llvm-complete.git] / utils / gn / secondary / llvm / lib / Target / AVR / MCTargetDesc / BUILD.gn
blobd2d5399f4c8519da425cb5f01ee5f43a875a4900
1 import("//llvm/utils/TableGen/tablegen.gni")
3 tablegen("AVRGenAsmWriter") {
4   visibility = [ ":MCTargetDesc" ]
5   args = [ "-gen-asm-writer" ]
6   td_file = "../AVR.td"
9 tablegen("AVRGenInstrInfo") {
10   visibility = [ ":MCTargetDesc" ]
11   args = [ "-gen-instr-info" ]
12   td_file = "../AVR.td"
15 tablegen("AVRGenMCCodeEmitter") {
16   visibility = [ ":MCTargetDesc" ]
17   args = [ "-gen-emitter" ]
18   td_file = "../AVR.td"
21 tablegen("AVRGenRegisterInfo") {
22   visibility = [ ":MCTargetDesc" ]
23   args = [ "-gen-register-info" ]
24   td_file = "../AVR.td"
27 tablegen("AVRGenSubtargetInfo") {
28   visibility = [ ":MCTargetDesc" ]
29   args = [ "-gen-subtarget" ]
30   td_file = "../AVR.td"
33 static_library("MCTargetDesc") {
34   output_name = "LLVMAVRDesc"
36   # This should contain tablegen targets generating .inc files included
37   # by other targets. .inc files only used by .cpp files in this directory
38   # should be in deps instead.
39   public_deps = [
40     ":AVRGenInstrInfo",
41     ":AVRGenRegisterInfo",
42     ":AVRGenSubtargetInfo",
43   ]
44   deps = [
45     ":AVRGenAsmWriter",
46     ":AVRGenMCCodeEmitter",
47     "//llvm/lib/MC",
48     "//llvm/lib/Support",
49     "//llvm/lib/Target/AVR/TargetInfo",
50   ]
51   include_dirs = [ ".." ]
52   sources = [
53     "AVRAsmBackend.cpp",
54     "AVRELFObjectWriter.cpp",
55     "AVRELFStreamer.cpp",
56     "AVRInstPrinter.cpp",
57     "AVRMCAsmInfo.cpp",
58     "AVRMCCodeEmitter.cpp",
59     "AVRMCELFStreamer.cpp",
60     "AVRMCExpr.cpp",
61     "AVRMCTargetDesc.cpp",
62     "AVRTargetStreamer.cpp",
63   ]