[MIPS GlobalISel] Select MSA vector generic and builtin add
[llvm-complete.git] / lib / Target / AVR / MCTargetDesc / AVRMCTargetDesc.h
blob470db01ff46895bfe7490b723404ee34edfd076a
1 //===-- AVRMCTargetDesc.h - AVR Target Descriptions -------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file provides AVR specific target descriptions.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_AVR_MCTARGET_DESC_H
14 #define LLVM_AVR_MCTARGET_DESC_H
16 #include "llvm/Support/DataTypes.h"
18 #include <memory>
20 namespace llvm {
22 class MCAsmBackend;
23 class MCCodeEmitter;
24 class MCContext;
25 class MCInstrInfo;
26 class MCObjectTargetWriter;
27 class MCRegisterInfo;
28 class MCSubtargetInfo;
29 class MCTargetOptions;
30 class StringRef;
31 class Target;
32 class Triple;
33 class raw_pwrite_stream;
35 MCInstrInfo *createAVRMCInstrInfo();
37 /// Creates a machine code emitter for AVR.
38 MCCodeEmitter *createAVRMCCodeEmitter(const MCInstrInfo &MCII,
39 const MCRegisterInfo &MRI,
40 MCContext &Ctx);
42 /// Creates an assembly backend for AVR.
43 MCAsmBackend *createAVRAsmBackend(const Target &T, const MCSubtargetInfo &STI,
44 const MCRegisterInfo &MRI,
45 const llvm::MCTargetOptions &TO);
47 /// Creates an ELF object writer for AVR.
48 std::unique_ptr<MCObjectTargetWriter> createAVRELFObjectWriter(uint8_t OSABI);
50 } // end namespace llvm
52 #define GET_REGINFO_ENUM
53 #include "AVRGenRegisterInfo.inc"
55 #define GET_INSTRINFO_ENUM
56 #include "AVRGenInstrInfo.inc"
58 #define GET_SUBTARGETINFO_ENUM
59 #include "AVRGenSubtargetInfo.inc"
61 #endif // LLVM_AVR_MCTARGET_DESC_H