| blob | 5e4751e554e1b29acee9aaea3e871816ca6669d5 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
3 ; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
4 ; RUN: FileCheck %s --check-prefix=CHECK-P8
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
6 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-P9
8 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
9 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
10 ; RUN: FileCheck %s --check-prefix=CHECK-BE
12 define i16 @test2elt(<2 x double> %a) local_unnamed_addr #0 {
13 ; CHECK-P8-LABEL: test2elt:
14 ; CHECK-P8: # %bb.0: # %entry
15 ; CHECK-P8-NEXT: xxswapd vs0, v2
16 ; CHECK-P8-NEXT: xscvdpsxws f1, v2
17 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
18 ; CHECK-P8-NEXT: mfvsrwz r3, f1
19 ; CHECK-P8-NEXT: mfvsrwz r4, f0
20 ; CHECK-P8-NEXT: mtvsrd f0, r3
21 ; CHECK-P8-NEXT: mtvsrd f1, r4
22 ; CHECK-P8-NEXT: xxswapd v2, vs0
23 ; CHECK-P8-NEXT: xxswapd v3, vs1
24 ; CHECK-P8-NEXT: vmrglb v2, v2, v3
25 ; CHECK-P8-NEXT: xxswapd vs0, v2
26 ; CHECK-P8-NEXT: mfvsrd r3, f0
27 ; CHECK-P8-NEXT: clrldi r3, r3, 48
28 ; CHECK-P8-NEXT: sth r3, -2(r1)
29 ; CHECK-P8-NEXT: lhz r3, -2(r1)
30 ; CHECK-P8-NEXT: blr
31 ;
32 ; CHECK-P9-LABEL: test2elt:
33 ; CHECK-P9: # %bb.0: # %entry
34 ; CHECK-P9-NEXT: xscvdpsxws f0, v2
35 ; CHECK-P9-NEXT: mfvsrwz r3, f0
36 ; CHECK-P9-NEXT: mtvsrd f0, r3
37 ; CHECK-P9-NEXT: xxswapd v3, vs0
38 ; CHECK-P9-NEXT: xxswapd vs0, v2
39 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
40 ; CHECK-P9-NEXT: mfvsrwz r3, f0
41 ; CHECK-P9-NEXT: mtvsrd f0, r3
42 ; CHECK-P9-NEXT: addi r3, r1, -2
43 ; CHECK-P9-NEXT: xxswapd v2, vs0
44 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
45 ; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
46 ; CHECK-P9-NEXT: stxsihx v2, 0, r3
47 ; CHECK-P9-NEXT: lhz r3, -2(r1)
48 ; CHECK-P9-NEXT: blr
49 ;
50 ; CHECK-BE-LABEL: test2elt:
51 ; CHECK-BE: # %bb.0: # %entry
52 ; CHECK-BE-NEXT: xscvdpsxws f0, v2
53 ; CHECK-BE-NEXT: mfvsrwz r3, f0
54 ; CHECK-BE-NEXT: xxswapd vs0, v2
55 ; CHECK-BE-NEXT: sldi r3, r3, 56
56 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
57 ; CHECK-BE-NEXT: mtvsrd v3, r3
58 ; CHECK-BE-NEXT: mfvsrwz r3, f0
59 ; CHECK-BE-NEXT: sldi r3, r3, 56
60 ; CHECK-BE-NEXT: mtvsrd v2, r3
61 ; CHECK-BE-NEXT: addi r3, r1, -2
62 ; CHECK-BE-NEXT: vmrghb v2, v3, v2
63 ; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
64 ; CHECK-BE-NEXT: stxsihx v2, 0, r3
65 ; CHECK-BE-NEXT: lhz r3, -2(r1)
66 ; CHECK-BE-NEXT: blr
67 entry:
68 %0 = fptoui <2 x double> %a to <2 x i8>
69 %1 = bitcast <2 x i8> %0 to i16
70 ret i16 %1
71 }
73 define i32 @test4elt(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
74 ; CHECK-P8-LABEL: test4elt:
75 ; CHECK-P8: # %bb.0: # %entry
76 ; CHECK-P8-NEXT: li r4, 16
77 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
78 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
79 ; CHECK-P8-NEXT: xscvdpsxws f2, f0
80 ; CHECK-P8-NEXT: xxswapd vs0, vs0
81 ; CHECK-P8-NEXT: xscvdpsxws f3, f1
82 ; CHECK-P8-NEXT: xxswapd vs1, vs1
83 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
84 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
85 ; CHECK-P8-NEXT: mfvsrwz r3, f2
86 ; CHECK-P8-NEXT: mfvsrwz r4, f3
87 ; CHECK-P8-NEXT: mtvsrd f2, r3
88 ; CHECK-P8-NEXT: mtvsrd f3, r4
89 ; CHECK-P8-NEXT: mfvsrwz r3, f0
90 ; CHECK-P8-NEXT: xxswapd v2, vs2
91 ; CHECK-P8-NEXT: mfvsrwz r4, f1
92 ; CHECK-P8-NEXT: xxswapd v4, vs3
93 ; CHECK-P8-NEXT: mtvsrd f0, r3
94 ; CHECK-P8-NEXT: mtvsrd f1, r4
95 ; CHECK-P8-NEXT: xxswapd v3, vs0
96 ; CHECK-P8-NEXT: xxswapd v5, vs1
97 ; CHECK-P8-NEXT: vmrglb v2, v3, v2
98 ; CHECK-P8-NEXT: vmrglb v3, v5, v4
99 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
100 ; CHECK-P8-NEXT: xxswapd vs0, v2
101 ; CHECK-P8-NEXT: mfvsrwz r3, f0
102 ; CHECK-P8-NEXT: blr
103 ;
104 ; CHECK-P9-LABEL: test4elt:
105 ; CHECK-P9: # %bb.0: # %entry
106 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
107 ; CHECK-P9-NEXT: xscvdpsxws f2, f1
108 ; CHECK-P9-NEXT: xxswapd vs1, vs1
109 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
110 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
111 ; CHECK-P9-NEXT: mfvsrwz r3, f2
112 ; CHECK-P9-NEXT: mtvsrd f2, r3
113 ; CHECK-P9-NEXT: mfvsrwz r3, f1
114 ; CHECK-P9-NEXT: xxswapd v2, vs2
115 ; CHECK-P9-NEXT: mtvsrd f1, r3
116 ; CHECK-P9-NEXT: xxswapd v3, vs1
117 ; CHECK-P9-NEXT: xscvdpsxws f1, f0
118 ; CHECK-P9-NEXT: xxswapd vs0, vs0
119 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
120 ; CHECK-P9-NEXT: mfvsrwz r3, f1
121 ; CHECK-P9-NEXT: mtvsrd f1, r3
122 ; CHECK-P9-NEXT: mfvsrwz r3, f0
123 ; CHECK-P9-NEXT: mtvsrd f0, r3
124 ; CHECK-P9-NEXT: vmrglb v2, v2, v3
125 ; CHECK-P9-NEXT: xxswapd v3, vs1
126 ; CHECK-P9-NEXT: xxswapd v4, vs0
127 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
128 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
129 ; CHECK-P9-NEXT: li r3, 0
130 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
131 ; CHECK-P9-NEXT: blr
132 ;
133 ; CHECK-BE-LABEL: test4elt:
134 ; CHECK-BE: # %bb.0: # %entry
135 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
136 ; CHECK-BE-NEXT: xscvdpsxws f2, f1
137 ; CHECK-BE-NEXT: xxswapd vs1, vs1
138 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
139 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
140 ; CHECK-BE-NEXT: mfvsrwz r3, f2
141 ; CHECK-BE-NEXT: sldi r3, r3, 56
142 ; CHECK-BE-NEXT: mtvsrd v2, r3
143 ; CHECK-BE-NEXT: mfvsrwz r3, f1
144 ; CHECK-BE-NEXT: xscvdpsxws f1, f0
145 ; CHECK-BE-NEXT: xxswapd vs0, vs0
146 ; CHECK-BE-NEXT: sldi r3, r3, 56
147 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
148 ; CHECK-BE-NEXT: mtvsrd v3, r3
149 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
150 ; CHECK-BE-NEXT: mfvsrwz r3, f1
151 ; CHECK-BE-NEXT: sldi r3, r3, 56
152 ; CHECK-BE-NEXT: mtvsrd v3, r3
153 ; CHECK-BE-NEXT: mfvsrwz r3, f0
154 ; CHECK-BE-NEXT: sldi r3, r3, 56
155 ; CHECK-BE-NEXT: mtvsrd v4, r3
156 ; CHECK-BE-NEXT: li r3, 0
157 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
158 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
159 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
160 ; CHECK-BE-NEXT: blr
161 entry:
162 %a = load <4 x double>, <4 x double>* %0, align 32
163 %1 = fptoui <4 x double> %a to <4 x i8>
164 %2 = bitcast <4 x i8> %1 to i32
165 ret i32 %2
166 }
168 define i64 @test8elt(<8 x double>* nocapture readonly) local_unnamed_addr #1 {
169 ; CHECK-P8-LABEL: test8elt:
170 ; CHECK-P8: # %bb.0: # %entry
171 ; CHECK-P8-NEXT: li r4, 16
172 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
173 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
174 ; CHECK-P8-NEXT: li r4, 32
175 ; CHECK-P8-NEXT: lxvd2x vs2, r3, r4
176 ; CHECK-P8-NEXT: li r4, 48
177 ; CHECK-P8-NEXT: lxvd2x vs3, r3, r4
178 ; CHECK-P8-NEXT: xscvdpsxws f4, f0
179 ; CHECK-P8-NEXT: xxswapd vs0, vs0
180 ; CHECK-P8-NEXT: xscvdpsxws f5, f1
181 ; CHECK-P8-NEXT: xxswapd vs1, vs1
182 ; CHECK-P8-NEXT: xscvdpsxws f6, f2
183 ; CHECK-P8-NEXT: xxswapd vs2, vs2
184 ; CHECK-P8-NEXT: xscvdpsxws f7, f3
185 ; CHECK-P8-NEXT: xxswapd vs3, vs3
186 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
187 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
188 ; CHECK-P8-NEXT: mfvsrwz r3, f4
189 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
190 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
191 ; CHECK-P8-NEXT: mfvsrwz r4, f5
192 ; CHECK-P8-NEXT: mtvsrd f4, r3
193 ; CHECK-P8-NEXT: mfvsrwz r3, f6
194 ; CHECK-P8-NEXT: mtvsrd f5, r4
195 ; CHECK-P8-NEXT: xxswapd v2, vs4
196 ; CHECK-P8-NEXT: mfvsrwz r4, f7
197 ; CHECK-P8-NEXT: mtvsrd f6, r3
198 ; CHECK-P8-NEXT: xxswapd v3, vs5
199 ; CHECK-P8-NEXT: mfvsrwz r3, f0
200 ; CHECK-P8-NEXT: mtvsrd f7, r4
201 ; CHECK-P8-NEXT: xxswapd v4, vs6
202 ; CHECK-P8-NEXT: mfvsrwz r4, f1
203 ; CHECK-P8-NEXT: mtvsrd f0, r3
204 ; CHECK-P8-NEXT: xxswapd v1, vs7
205 ; CHECK-P8-NEXT: mfvsrwz r3, f2
206 ; CHECK-P8-NEXT: mtvsrd f1, r4
207 ; CHECK-P8-NEXT: xxswapd v5, vs0
208 ; CHECK-P8-NEXT: mfvsrwz r4, f3
209 ; CHECK-P8-NEXT: mtvsrd f2, r3
210 ; CHECK-P8-NEXT: xxswapd v0, vs1
211 ; CHECK-P8-NEXT: mtvsrd f0, r4
212 ; CHECK-P8-NEXT: xxswapd v6, vs2
213 ; CHECK-P8-NEXT: vmrglb v2, v5, v2
214 ; CHECK-P8-NEXT: xxswapd v5, vs0
215 ; CHECK-P8-NEXT: vmrglb v3, v0, v3
216 ; CHECK-P8-NEXT: vmrglb v4, v6, v4
217 ; CHECK-P8-NEXT: vmrglb v5, v5, v1
218 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
219 ; CHECK-P8-NEXT: vmrglh v3, v5, v4
220 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
221 ; CHECK-P8-NEXT: xxswapd vs0, v2
222 ; CHECK-P8-NEXT: mfvsrd r3, f0
223 ; CHECK-P8-NEXT: blr
224 ;
225 ; CHECK-P9-LABEL: test8elt:
226 ; CHECK-P9: # %bb.0: # %entry
227 ; CHECK-P9-NEXT: lxv vs3, 0(r3)
228 ; CHECK-P9-NEXT: xscvdpsxws f4, f3
229 ; CHECK-P9-NEXT: xxswapd vs3, vs3
230 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
231 ; CHECK-P9-NEXT: lxv vs0, 48(r3)
232 ; CHECK-P9-NEXT: lxv vs1, 32(r3)
233 ; CHECK-P9-NEXT: lxv vs2, 16(r3)
234 ; CHECK-P9-NEXT: mfvsrwz r3, f4
235 ; CHECK-P9-NEXT: mtvsrd f4, r3
236 ; CHECK-P9-NEXT: mfvsrwz r3, f3
237 ; CHECK-P9-NEXT: xxswapd v2, vs4
238 ; CHECK-P9-NEXT: mtvsrd f3, r3
239 ; CHECK-P9-NEXT: xxswapd v3, vs3
240 ; CHECK-P9-NEXT: xscvdpsxws f3, f2
241 ; CHECK-P9-NEXT: xxswapd vs2, vs2
242 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
243 ; CHECK-P9-NEXT: mfvsrwz r3, f3
244 ; CHECK-P9-NEXT: mtvsrd f3, r3
245 ; CHECK-P9-NEXT: mfvsrwz r3, f2
246 ; CHECK-P9-NEXT: mtvsrd f2, r3
247 ; CHECK-P9-NEXT: xxswapd v4, vs2
248 ; CHECK-P9-NEXT: xscvdpsxws f2, f1
249 ; CHECK-P9-NEXT: xxswapd vs1, vs1
250 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
251 ; CHECK-P9-NEXT: mfvsrwz r3, f2
252 ; CHECK-P9-NEXT: mtvsrd f2, r3
253 ; CHECK-P9-NEXT: mfvsrwz r3, f1
254 ; CHECK-P9-NEXT: vmrglb v2, v2, v3
255 ; CHECK-P9-NEXT: xxswapd v3, vs3
256 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
257 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
258 ; CHECK-P9-NEXT: xxswapd v3, vs2
259 ; CHECK-P9-NEXT: mtvsrd f1, r3
260 ; CHECK-P9-NEXT: xxswapd v4, vs1
261 ; CHECK-P9-NEXT: xscvdpsxws f1, f0
262 ; CHECK-P9-NEXT: xxswapd vs0, vs0
263 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
264 ; CHECK-P9-NEXT: mfvsrwz r3, f1
265 ; CHECK-P9-NEXT: mtvsrd f1, r3
266 ; CHECK-P9-NEXT: mfvsrwz r3, f0
267 ; CHECK-P9-NEXT: mtvsrd f0, r3
268 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
269 ; CHECK-P9-NEXT: xxswapd v4, vs1
270 ; CHECK-P9-NEXT: xxswapd v5, vs0
271 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
272 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
273 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
274 ; CHECK-P9-NEXT: mfvsrld r3, v2
275 ; CHECK-P9-NEXT: blr
276 ;
277 ; CHECK-BE-LABEL: test8elt:
278 ; CHECK-BE: # %bb.0: # %entry
279 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
280 ; CHECK-BE-NEXT: xscvdpsxws f4, f3
281 ; CHECK-BE-NEXT: xxswapd vs3, vs3
282 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
283 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
284 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
285 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
286 ; CHECK-BE-NEXT: mfvsrwz r3, f4
287 ; CHECK-BE-NEXT: sldi r3, r3, 56
288 ; CHECK-BE-NEXT: mtvsrd v2, r3
289 ; CHECK-BE-NEXT: mfvsrwz r3, f3
290 ; CHECK-BE-NEXT: xscvdpsxws f3, f2
291 ; CHECK-BE-NEXT: xxswapd vs2, vs2
292 ; CHECK-BE-NEXT: sldi r3, r3, 56
293 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
294 ; CHECK-BE-NEXT: mtvsrd v3, r3
295 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
296 ; CHECK-BE-NEXT: mfvsrwz r3, f3
297 ; CHECK-BE-NEXT: sldi r3, r3, 56
298 ; CHECK-BE-NEXT: mtvsrd v3, r3
299 ; CHECK-BE-NEXT: mfvsrwz r3, f2
300 ; CHECK-BE-NEXT: xscvdpsxws f2, f1
301 ; CHECK-BE-NEXT: xxswapd vs1, vs1
302 ; CHECK-BE-NEXT: sldi r3, r3, 56
303 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
304 ; CHECK-BE-NEXT: mtvsrd v4, r3
305 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
306 ; CHECK-BE-NEXT: mfvsrwz r3, f2
307 ; CHECK-BE-NEXT: sldi r3, r3, 56
308 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
309 ; CHECK-BE-NEXT: mtvsrd v3, r3
310 ; CHECK-BE-NEXT: mfvsrwz r3, f1
311 ; CHECK-BE-NEXT: xscvdpsxws f1, f0
312 ; CHECK-BE-NEXT: xxswapd vs0, vs0
313 ; CHECK-BE-NEXT: sldi r3, r3, 56
314 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
315 ; CHECK-BE-NEXT: mtvsrd v4, r3
316 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
317 ; CHECK-BE-NEXT: mfvsrwz r3, f1
318 ; CHECK-BE-NEXT: sldi r3, r3, 56
319 ; CHECK-BE-NEXT: mtvsrd v4, r3
320 ; CHECK-BE-NEXT: mfvsrwz r3, f0
321 ; CHECK-BE-NEXT: sldi r3, r3, 56
322 ; CHECK-BE-NEXT: mtvsrd v5, r3
323 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
324 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
325 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
326 ; CHECK-BE-NEXT: mfvsrd r3, v2
327 ; CHECK-BE-NEXT: blr
328 entry:
329 %a = load <8 x double>, <8 x double>* %0, align 64
330 %1 = fptoui <8 x double> %a to <8 x i8>
331 %2 = bitcast <8 x i8> %1 to i64
332 ret i64 %2
333 }
335 define <16 x i8> @test16elt(<16 x double>* nocapture readonly) local_unnamed_addr #2 {
336 ; CHECK-P8-LABEL: test16elt:
337 ; CHECK-P8: # %bb.0: # %entry
338 ; CHECK-P8-NEXT: li r4, 16
339 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
340 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
341 ; CHECK-P8-NEXT: li r4, 32
342 ; CHECK-P8-NEXT: lxvd2x vs2, r3, r4
343 ; CHECK-P8-NEXT: li r4, 48
344 ; CHECK-P8-NEXT: lxvd2x vs3, r3, r4
345 ; CHECK-P8-NEXT: li r4, 64
346 ; CHECK-P8-NEXT: xscvdpsxws f4, f0
347 ; CHECK-P8-NEXT: xxswapd vs0, vs0
348 ; CHECK-P8-NEXT: lxvd2x vs5, r3, r4
349 ; CHECK-P8-NEXT: li r4, 80
350 ; CHECK-P8-NEXT: xscvdpsxws f6, f1
351 ; CHECK-P8-NEXT: xxswapd vs1, vs1
352 ; CHECK-P8-NEXT: lxvd2x vs7, r3, r4
353 ; CHECK-P8-NEXT: li r4, 96
354 ; CHECK-P8-NEXT: xscvdpsxws f8, f2
355 ; CHECK-P8-NEXT: xxswapd vs2, vs2
356 ; CHECK-P8-NEXT: lxvd2x vs9, r3, r4
357 ; CHECK-P8-NEXT: li r4, 112
358 ; CHECK-P8-NEXT: xscvdpsxws f10, f3
359 ; CHECK-P8-NEXT: xxswapd vs3, vs3
360 ; CHECK-P8-NEXT: lxvd2x vs11, r3, r4
361 ; CHECK-P8-NEXT: xscvdpsxws f12, f5
362 ; CHECK-P8-NEXT: xxswapd vs5, vs5
363 ; CHECK-P8-NEXT: xscvdpsxws f13, f7
364 ; CHECK-P8-NEXT: xxswapd vs7, vs7
365 ; CHECK-P8-NEXT: xscvdpsxws v2, f9
366 ; CHECK-P8-NEXT: xxswapd vs9, vs9
367 ; CHECK-P8-NEXT: mfvsrwz r3, f4
368 ; CHECK-P8-NEXT: xscvdpsxws v3, f11
369 ; CHECK-P8-NEXT: xxswapd vs11, vs11
370 ; CHECK-P8-NEXT: mfvsrwz r4, f6
371 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
372 ; CHECK-P8-NEXT: mtvsrd f4, r3
373 ; CHECK-P8-NEXT: mfvsrwz r3, f8
374 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
375 ; CHECK-P8-NEXT: xxswapd v4, vs4
376 ; CHECK-P8-NEXT: mtvsrd f6, r4
377 ; CHECK-P8-NEXT: mfvsrwz r4, f10
378 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
379 ; CHECK-P8-NEXT: xxswapd v5, vs6
380 ; CHECK-P8-NEXT: mtvsrd f8, r3
381 ; CHECK-P8-NEXT: mfvsrwz r3, f12
382 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
383 ; CHECK-P8-NEXT: xxswapd v0, vs8
384 ; CHECK-P8-NEXT: mtvsrd f10, r4
385 ; CHECK-P8-NEXT: mfvsrwz r4, f13
386 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
387 ; CHECK-P8-NEXT: xxswapd v1, vs10
388 ; CHECK-P8-NEXT: mtvsrd f12, r3
389 ; CHECK-P8-NEXT: mfvsrwz r3, v2
390 ; CHECK-P8-NEXT: xscvdpsxws f7, f7
391 ; CHECK-P8-NEXT: xxswapd v6, vs12
392 ; CHECK-P8-NEXT: mtvsrd f13, r4
393 ; CHECK-P8-NEXT: mfvsrwz r4, v3
394 ; CHECK-P8-NEXT: mtvsrd v2, r3
395 ; CHECK-P8-NEXT: xxswapd v7, vs13
396 ; CHECK-P8-NEXT: mfvsrwz r3, f0
397 ; CHECK-P8-NEXT: xscvdpsxws f9, f9
398 ; CHECK-P8-NEXT: xxswapd v2, v2
399 ; CHECK-P8-NEXT: xscvdpsxws f11, f11
400 ; CHECK-P8-NEXT: mtvsrd v3, r4
401 ; CHECK-P8-NEXT: mfvsrwz r4, f1
402 ; CHECK-P8-NEXT: mtvsrd f0, r3
403 ; CHECK-P8-NEXT: xxswapd v3, v3
404 ; CHECK-P8-NEXT: mfvsrwz r3, f2
405 ; CHECK-P8-NEXT: mtvsrd f1, r4
406 ; CHECK-P8-NEXT: xxswapd v8, vs0
407 ; CHECK-P8-NEXT: mfvsrwz r4, f3
408 ; CHECK-P8-NEXT: mtvsrd f2, r3
409 ; CHECK-P8-NEXT: xxswapd v9, vs1
410 ; CHECK-P8-NEXT: mfvsrwz r3, f5
411 ; CHECK-P8-NEXT: mtvsrd f3, r4
412 ; CHECK-P8-NEXT: xxswapd v10, vs2
413 ; CHECK-P8-NEXT: mfvsrwz r4, f7
414 ; CHECK-P8-NEXT: mtvsrd f5, r3
415 ; CHECK-P8-NEXT: mfvsrwz r3, f9
416 ; CHECK-P8-NEXT: mtvsrd f7, r4
417 ; CHECK-P8-NEXT: mfvsrwz r4, f11
418 ; CHECK-P8-NEXT: vmrglb v4, v8, v4
419 ; CHECK-P8-NEXT: xxswapd v8, vs3
420 ; CHECK-P8-NEXT: vmrglb v5, v9, v5
421 ; CHECK-P8-NEXT: xxswapd v9, vs5
422 ; CHECK-P8-NEXT: mtvsrd f0, r3
423 ; CHECK-P8-NEXT: mtvsrd f1, r4
424 ; CHECK-P8-NEXT: vmrglb v0, v10, v0
425 ; CHECK-P8-NEXT: xxswapd v10, vs7
426 ; CHECK-P8-NEXT: vmrglb v1, v8, v1
427 ; CHECK-P8-NEXT: xxswapd v8, vs0
428 ; CHECK-P8-NEXT: vmrglb v6, v9, v6
429 ; CHECK-P8-NEXT: xxswapd v9, vs1
430 ; CHECK-P8-NEXT: vmrglb v7, v10, v7
431 ; CHECK-P8-NEXT: vmrglb v2, v8, v2
432 ; CHECK-P8-NEXT: vmrglb v3, v9, v3
433 ; CHECK-P8-NEXT: vmrglh v4, v5, v4
434 ; CHECK-P8-NEXT: vmrglh v5, v1, v0
435 ; CHECK-P8-NEXT: vmrglh v0, v7, v6
436 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
437 ; CHECK-P8-NEXT: vmrglw v3, v5, v4
438 ; CHECK-P8-NEXT: vmrglw v2, v2, v0
439 ; CHECK-P8-NEXT: xxmrgld v2, v2, v3
440 ; CHECK-P8-NEXT: blr
441 ;
442 ; CHECK-P9-LABEL: test16elt:
443 ; CHECK-P9: # %bb.0: # %entry
444 ; CHECK-P9-NEXT: lxv vs7, 0(r3)
445 ; CHECK-P9-NEXT: xscvdpsxws f8, f7
446 ; CHECK-P9-NEXT: xxswapd vs7, vs7
447 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
448 ; CHECK-P9-NEXT: lxv vs0, 112(r3)
449 ; CHECK-P9-NEXT: lxv vs1, 96(r3)
450 ; CHECK-P9-NEXT: lxv vs2, 80(r3)
451 ; CHECK-P9-NEXT: lxv vs3, 64(r3)
452 ; CHECK-P9-NEXT: lxv vs4, 48(r3)
453 ; CHECK-P9-NEXT: lxv vs5, 32(r3)
454 ; CHECK-P9-NEXT: lxv vs6, 16(r3)
455 ; CHECK-P9-NEXT: mfvsrwz r3, f8
456 ; CHECK-P9-NEXT: mtvsrd f8, r3
457 ; CHECK-P9-NEXT: mfvsrwz r3, f7
458 ; CHECK-P9-NEXT: xxswapd v2, vs8
459 ; CHECK-P9-NEXT: mtvsrd f7, r3
460 ; CHECK-P9-NEXT: xxswapd v3, vs7
461 ; CHECK-P9-NEXT: xscvdpsxws f7, f6
462 ; CHECK-P9-NEXT: xxswapd vs6, vs6
463 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
464 ; CHECK-P9-NEXT: mfvsrwz r3, f7
465 ; CHECK-P9-NEXT: mtvsrd f7, r3
466 ; CHECK-P9-NEXT: mfvsrwz r3, f6
467 ; CHECK-P9-NEXT: mtvsrd f6, r3
468 ; CHECK-P9-NEXT: xxswapd v4, vs6
469 ; CHECK-P9-NEXT: xscvdpsxws f6, f5
470 ; CHECK-P9-NEXT: xxswapd vs5, vs5
471 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
472 ; CHECK-P9-NEXT: mfvsrwz r3, f6
473 ; CHECK-P9-NEXT: mtvsrd f6, r3
474 ; CHECK-P9-NEXT: mfvsrwz r3, f5
475 ; CHECK-P9-NEXT: vmrglb v2, v2, v3
476 ; CHECK-P9-NEXT: xxswapd v3, vs7
477 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
478 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
479 ; CHECK-P9-NEXT: xxswapd v3, vs6
480 ; CHECK-P9-NEXT: mtvsrd f5, r3
481 ; CHECK-P9-NEXT: xxswapd v4, vs5
482 ; CHECK-P9-NEXT: xscvdpsxws f5, f4
483 ; CHECK-P9-NEXT: xxswapd vs4, vs4
484 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
485 ; CHECK-P9-NEXT: mfvsrwz r3, f5
486 ; CHECK-P9-NEXT: mtvsrd f5, r3
487 ; CHECK-P9-NEXT: mfvsrwz r3, f4
488 ; CHECK-P9-NEXT: mtvsrd f4, r3
489 ; CHECK-P9-NEXT: xxswapd v5, vs4
490 ; CHECK-P9-NEXT: xscvdpsxws f4, f3
491 ; CHECK-P9-NEXT: xxswapd vs3, vs3
492 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
493 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
494 ; CHECK-P9-NEXT: xxswapd v4, vs5
495 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
496 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
497 ; CHECK-P9-NEXT: mfvsrwz r3, f4
498 ; CHECK-P9-NEXT: mtvsrd f4, r3
499 ; CHECK-P9-NEXT: mfvsrwz r3, f3
500 ; CHECK-P9-NEXT: mtvsrd f3, r3
501 ; CHECK-P9-NEXT: xxswapd v4, vs3
502 ; CHECK-P9-NEXT: xscvdpsxws f3, f2
503 ; CHECK-P9-NEXT: xxswapd vs2, vs2
504 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
505 ; CHECK-P9-NEXT: mfvsrwz r3, f3
506 ; CHECK-P9-NEXT: mtvsrd f3, r3
507 ; CHECK-P9-NEXT: mfvsrwz r3, f2
508 ; CHECK-P9-NEXT: mtvsrd f2, r3
509 ; CHECK-P9-NEXT: xxswapd v5, vs2
510 ; CHECK-P9-NEXT: xscvdpsxws f2, f1
511 ; CHECK-P9-NEXT: xxswapd vs1, vs1
512 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
513 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
514 ; CHECK-P9-NEXT: xxswapd v3, vs4
515 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
516 ; CHECK-P9-NEXT: xxswapd v4, vs3
517 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
518 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
519 ; CHECK-P9-NEXT: mfvsrwz r3, f2
520 ; CHECK-P9-NEXT: mtvsrd f2, r3
521 ; CHECK-P9-NEXT: mfvsrwz r3, f1
522 ; CHECK-P9-NEXT: xxswapd v4, vs2
523 ; CHECK-P9-NEXT: mtvsrd f1, r3
524 ; CHECK-P9-NEXT: xxswapd v5, vs1
525 ; CHECK-P9-NEXT: xscvdpsxws f1, f0
526 ; CHECK-P9-NEXT: xxswapd vs0, vs0
527 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
528 ; CHECK-P9-NEXT: mfvsrwz r3, f1
529 ; CHECK-P9-NEXT: mtvsrd f1, r3
530 ; CHECK-P9-NEXT: mfvsrwz r3, f0
531 ; CHECK-P9-NEXT: mtvsrd f0, r3
532 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
533 ; CHECK-P9-NEXT: xxswapd v5, vs1
534 ; CHECK-P9-NEXT: xxswapd v0, vs0
535 ; CHECK-P9-NEXT: vmrglb v5, v5, v0
536 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
537 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
538 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
539 ; CHECK-P9-NEXT: blr
540 ;
541 ; CHECK-BE-LABEL: test16elt:
542 ; CHECK-BE: # %bb.0: # %entry
543 ; CHECK-BE-NEXT: lxv vs7, 112(r3)
544 ; CHECK-BE-NEXT: xscvdpsxws f8, f7
545 ; CHECK-BE-NEXT: xxswapd vs7, vs7
546 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
547 ; CHECK-BE-NEXT: lxv vs6, 96(r3)
548 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
549 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
550 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
551 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
552 ; CHECK-BE-NEXT: lxv vs4, 64(r3)
553 ; CHECK-BE-NEXT: lxv vs5, 80(r3)
554 ; CHECK-BE-NEXT: mfvsrwz r3, f8
555 ; CHECK-BE-NEXT: sldi r3, r3, 56
556 ; CHECK-BE-NEXT: mtvsrd v2, r3
557 ; CHECK-BE-NEXT: mfvsrwz r3, f7
558 ; CHECK-BE-NEXT: xscvdpsxws f7, f6
559 ; CHECK-BE-NEXT: xxswapd vs6, vs6
560 ; CHECK-BE-NEXT: sldi r3, r3, 56
561 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
562 ; CHECK-BE-NEXT: mtvsrd v3, r3
563 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
564 ; CHECK-BE-NEXT: mfvsrwz r3, f7
565 ; CHECK-BE-NEXT: sldi r3, r3, 56
566 ; CHECK-BE-NEXT: mtvsrd v3, r3
567 ; CHECK-BE-NEXT: mfvsrwz r3, f6
568 ; CHECK-BE-NEXT: xscvdpsxws f6, f5
569 ; CHECK-BE-NEXT: xxswapd vs5, vs5
570 ; CHECK-BE-NEXT: sldi r3, r3, 56
571 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
572 ; CHECK-BE-NEXT: mtvsrd v4, r3
573 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
574 ; CHECK-BE-NEXT: mfvsrwz r3, f6
575 ; CHECK-BE-NEXT: sldi r3, r3, 56
576 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
577 ; CHECK-BE-NEXT: mtvsrd v3, r3
578 ; CHECK-BE-NEXT: mfvsrwz r3, f5
579 ; CHECK-BE-NEXT: xscvdpsxws f5, f4
580 ; CHECK-BE-NEXT: xxswapd vs4, vs4
581 ; CHECK-BE-NEXT: sldi r3, r3, 56
582 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
583 ; CHECK-BE-NEXT: mtvsrd v4, r3
584 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
585 ; CHECK-BE-NEXT: mfvsrwz r3, f5
586 ; CHECK-BE-NEXT: sldi r3, r3, 56
587 ; CHECK-BE-NEXT: mtvsrd v4, r3
588 ; CHECK-BE-NEXT: mfvsrwz r3, f4
589 ; CHECK-BE-NEXT: xscvdpsxws f4, f3
590 ; CHECK-BE-NEXT: xxswapd vs3, vs3
591 ; CHECK-BE-NEXT: sldi r3, r3, 56
592 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
593 ; CHECK-BE-NEXT: mtvsrd v5, r3
594 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
595 ; CHECK-BE-NEXT: mfvsrwz r3, f4
596 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
597 ; CHECK-BE-NEXT: sldi r3, r3, 56
598 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
599 ; CHECK-BE-NEXT: mtvsrd v3, r3
600 ; CHECK-BE-NEXT: mfvsrwz r3, f3
601 ; CHECK-BE-NEXT: xscvdpsxws f3, f2
602 ; CHECK-BE-NEXT: xxswapd vs2, vs2
603 ; CHECK-BE-NEXT: sldi r3, r3, 56
604 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
605 ; CHECK-BE-NEXT: mtvsrd v4, r3
606 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
607 ; CHECK-BE-NEXT: mfvsrwz r3, f3
608 ; CHECK-BE-NEXT: sldi r3, r3, 56
609 ; CHECK-BE-NEXT: mtvsrd v4, r3
610 ; CHECK-BE-NEXT: mfvsrwz r3, f2
611 ; CHECK-BE-NEXT: xscvdpsxws f2, f1
612 ; CHECK-BE-NEXT: xxswapd vs1, vs1
613 ; CHECK-BE-NEXT: sldi r3, r3, 56
614 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
615 ; CHECK-BE-NEXT: mtvsrd v5, r3
616 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
617 ; CHECK-BE-NEXT: mfvsrwz r3, f2
618 ; CHECK-BE-NEXT: sldi r3, r3, 56
619 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
620 ; CHECK-BE-NEXT: mtvsrd v4, r3
621 ; CHECK-BE-NEXT: mfvsrwz r3, f1
622 ; CHECK-BE-NEXT: xscvdpsxws f1, f0
623 ; CHECK-BE-NEXT: xxswapd vs0, vs0
624 ; CHECK-BE-NEXT: sldi r3, r3, 56
625 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
626 ; CHECK-BE-NEXT: mtvsrd v5, r3
627 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
628 ; CHECK-BE-NEXT: mfvsrwz r3, f1
629 ; CHECK-BE-NEXT: sldi r3, r3, 56
630 ; CHECK-BE-NEXT: mtvsrd v5, r3
631 ; CHECK-BE-NEXT: mfvsrwz r3, f0
632 ; CHECK-BE-NEXT: sldi r3, r3, 56
633 ; CHECK-BE-NEXT: mtvsrd v0, r3
634 ; CHECK-BE-NEXT: vmrghb v5, v5, v0
635 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
636 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
637 ; CHECK-BE-NEXT: xxmrghd v2, v3, v2
638 ; CHECK-BE-NEXT: blr
639 entry:
640 %a = load <16 x double>, <16 x double>* %0, align 128
641 %1 = fptoui <16 x double> %a to <16 x i8>
642 ret <16 x i8> %1
643 }
645 define i16 @test2elt_signed(<2 x double> %a) local_unnamed_addr #0 {
646 ; CHECK-P8-LABEL: test2elt_signed:
647 ; CHECK-P8: # %bb.0: # %entry
648 ; CHECK-P8-NEXT: xxswapd vs0, v2
649 ; CHECK-P8-NEXT: xscvdpsxws f1, v2
650 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
651 ; CHECK-P8-NEXT: mfvsrwz r3, f1
652 ; CHECK-P8-NEXT: mfvsrwz r4, f0
653 ; CHECK-P8-NEXT: mtvsrd f0, r3
654 ; CHECK-P8-NEXT: mtvsrd f1, r4
655 ; CHECK-P8-NEXT: xxswapd v2, vs0
656 ; CHECK-P8-NEXT: xxswapd v3, vs1
657 ; CHECK-P8-NEXT: vmrglb v2, v2, v3
658 ; CHECK-P8-NEXT: xxswapd vs0, v2
659 ; CHECK-P8-NEXT: mfvsrd r3, f0
660 ; CHECK-P8-NEXT: clrldi r3, r3, 48
661 ; CHECK-P8-NEXT: sth r3, -2(r1)
662 ; CHECK-P8-NEXT: lhz r3, -2(r1)
663 ; CHECK-P8-NEXT: blr
664 ;
665 ; CHECK-P9-LABEL: test2elt_signed:
666 ; CHECK-P9: # %bb.0: # %entry
667 ; CHECK-P9-NEXT: xscvdpsxws f0, v2
668 ; CHECK-P9-NEXT: mfvsrwz r3, f0
669 ; CHECK-P9-NEXT: mtvsrd f0, r3
670 ; CHECK-P9-NEXT: xxswapd v3, vs0
671 ; CHECK-P9-NEXT: xxswapd vs0, v2
672 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
673 ; CHECK-P9-NEXT: mfvsrwz r3, f0
674 ; CHECK-P9-NEXT: mtvsrd f0, r3
675 ; CHECK-P9-NEXT: addi r3, r1, -2
676 ; CHECK-P9-NEXT: xxswapd v2, vs0
677 ; CHECK-P9-NEXT: vmrglb v2, v3, v2
678 ; CHECK-P9-NEXT: vsldoi v2, v2, v2, 8
679 ; CHECK-P9-NEXT: stxsihx v2, 0, r3
680 ; CHECK-P9-NEXT: lhz r3, -2(r1)
681 ; CHECK-P9-NEXT: blr
682 ;
683 ; CHECK-BE-LABEL: test2elt_signed:
684 ; CHECK-BE: # %bb.0: # %entry
685 ; CHECK-BE-NEXT: xscvdpsxws f0, v2
686 ; CHECK-BE-NEXT: mfvsrwz r3, f0
687 ; CHECK-BE-NEXT: xxswapd vs0, v2
688 ; CHECK-BE-NEXT: sldi r3, r3, 56
689 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
690 ; CHECK-BE-NEXT: mtvsrd v3, r3
691 ; CHECK-BE-NEXT: mfvsrwz r3, f0
692 ; CHECK-BE-NEXT: sldi r3, r3, 56
693 ; CHECK-BE-NEXT: mtvsrd v2, r3
694 ; CHECK-BE-NEXT: addi r3, r1, -2
695 ; CHECK-BE-NEXT: vmrghb v2, v3, v2
696 ; CHECK-BE-NEXT: vsldoi v2, v2, v2, 10
697 ; CHECK-BE-NEXT: stxsihx v2, 0, r3
698 ; CHECK-BE-NEXT: lhz r3, -2(r1)
699 ; CHECK-BE-NEXT: blr
700 entry:
701 %0 = fptosi <2 x double> %a to <2 x i8>
702 %1 = bitcast <2 x i8> %0 to i16
703 ret i16 %1
704 }
706 define i32 @test4elt_signed(<4 x double>* nocapture readonly) local_unnamed_addr #1 {
707 ; CHECK-P8-LABEL: test4elt_signed:
708 ; CHECK-P8: # %bb.0: # %entry
709 ; CHECK-P8-NEXT: li r4, 16
710 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
711 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
712 ; CHECK-P8-NEXT: xscvdpsxws f2, f0
713 ; CHECK-P8-NEXT: xxswapd vs0, vs0
714 ; CHECK-P8-NEXT: xscvdpsxws f3, f1
715 ; CHECK-P8-NEXT: xxswapd vs1, vs1
716 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
717 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
718 ; CHECK-P8-NEXT: mfvsrwz r3, f2
719 ; CHECK-P8-NEXT: mfvsrwz r4, f3
720 ; CHECK-P8-NEXT: mtvsrd f2, r3
721 ; CHECK-P8-NEXT: mtvsrd f3, r4
722 ; CHECK-P8-NEXT: mfvsrwz r3, f0
723 ; CHECK-P8-NEXT: xxswapd v2, vs2
724 ; CHECK-P8-NEXT: mfvsrwz r4, f1
725 ; CHECK-P8-NEXT: xxswapd v4, vs3
726 ; CHECK-P8-NEXT: mtvsrd f0, r3
727 ; CHECK-P8-NEXT: mtvsrd f1, r4
728 ; CHECK-P8-NEXT: xxswapd v3, vs0
729 ; CHECK-P8-NEXT: xxswapd v5, vs1
730 ; CHECK-P8-NEXT: vmrglb v2, v3, v2
731 ; CHECK-P8-NEXT: vmrglb v3, v5, v4
732 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
733 ; CHECK-P8-NEXT: xxswapd vs0, v2
734 ; CHECK-P8-NEXT: mfvsrwz r3, f0
735 ; CHECK-P8-NEXT: blr
736 ;
737 ; CHECK-P9-LABEL: test4elt_signed:
738 ; CHECK-P9: # %bb.0: # %entry
739 ; CHECK-P9-NEXT: lxv vs1, 0(r3)
740 ; CHECK-P9-NEXT: xscvdpsxws f2, f1
741 ; CHECK-P9-NEXT: xxswapd vs1, vs1
742 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
743 ; CHECK-P9-NEXT: lxv vs0, 16(r3)
744 ; CHECK-P9-NEXT: mfvsrwz r3, f2
745 ; CHECK-P9-NEXT: mtvsrd f2, r3
746 ; CHECK-P9-NEXT: mfvsrwz r3, f1
747 ; CHECK-P9-NEXT: xxswapd v2, vs2
748 ; CHECK-P9-NEXT: mtvsrd f1, r3
749 ; CHECK-P9-NEXT: xxswapd v3, vs1
750 ; CHECK-P9-NEXT: xscvdpsxws f1, f0
751 ; CHECK-P9-NEXT: xxswapd vs0, vs0
752 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
753 ; CHECK-P9-NEXT: mfvsrwz r3, f1
754 ; CHECK-P9-NEXT: mtvsrd f1, r3
755 ; CHECK-P9-NEXT: mfvsrwz r3, f0
756 ; CHECK-P9-NEXT: mtvsrd f0, r3
757 ; CHECK-P9-NEXT: vmrglb v2, v2, v3
758 ; CHECK-P9-NEXT: xxswapd v3, vs1
759 ; CHECK-P9-NEXT: xxswapd v4, vs0
760 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
761 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
762 ; CHECK-P9-NEXT: li r3, 0
763 ; CHECK-P9-NEXT: vextuwrx r3, r3, v2
764 ; CHECK-P9-NEXT: blr
765 ;
766 ; CHECK-BE-LABEL: test4elt_signed:
767 ; CHECK-BE: # %bb.0: # %entry
768 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
769 ; CHECK-BE-NEXT: xscvdpsxws f2, f1
770 ; CHECK-BE-NEXT: xxswapd vs1, vs1
771 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
772 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
773 ; CHECK-BE-NEXT: mfvsrwz r3, f2
774 ; CHECK-BE-NEXT: sldi r3, r3, 56
775 ; CHECK-BE-NEXT: mtvsrd v2, r3
776 ; CHECK-BE-NEXT: mfvsrwz r3, f1
777 ; CHECK-BE-NEXT: xscvdpsxws f1, f0
778 ; CHECK-BE-NEXT: xxswapd vs0, vs0
779 ; CHECK-BE-NEXT: sldi r3, r3, 56
780 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
781 ; CHECK-BE-NEXT: mtvsrd v3, r3
782 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
783 ; CHECK-BE-NEXT: mfvsrwz r3, f1
784 ; CHECK-BE-NEXT: sldi r3, r3, 56
785 ; CHECK-BE-NEXT: mtvsrd v3, r3
786 ; CHECK-BE-NEXT: mfvsrwz r3, f0
787 ; CHECK-BE-NEXT: sldi r3, r3, 56
788 ; CHECK-BE-NEXT: mtvsrd v4, r3
789 ; CHECK-BE-NEXT: li r3, 0
790 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
791 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
792 ; CHECK-BE-NEXT: vextuwlx r3, r3, v2
793 ; CHECK-BE-NEXT: blr
794 entry:
795 %a = load <4 x double>, <4 x double>* %0, align 32
796 %1 = fptosi <4 x double> %a to <4 x i8>
797 %2 = bitcast <4 x i8> %1 to i32
798 ret i32 %2
799 }
801 define i64 @test8elt_signed(<8 x double>* nocapture readonly) local_unnamed_addr #1 {
802 ; CHECK-P8-LABEL: test8elt_signed:
803 ; CHECK-P8: # %bb.0: # %entry
804 ; CHECK-P8-NEXT: li r4, 16
805 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
806 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
807 ; CHECK-P8-NEXT: li r4, 32
808 ; CHECK-P8-NEXT: lxvd2x vs2, r3, r4
809 ; CHECK-P8-NEXT: li r4, 48
810 ; CHECK-P8-NEXT: lxvd2x vs3, r3, r4
811 ; CHECK-P8-NEXT: xscvdpsxws f4, f0
812 ; CHECK-P8-NEXT: xxswapd vs0, vs0
813 ; CHECK-P8-NEXT: xscvdpsxws f5, f1
814 ; CHECK-P8-NEXT: xxswapd vs1, vs1
815 ; CHECK-P8-NEXT: xscvdpsxws f6, f2
816 ; CHECK-P8-NEXT: xxswapd vs2, vs2
817 ; CHECK-P8-NEXT: xscvdpsxws f7, f3
818 ; CHECK-P8-NEXT: xxswapd vs3, vs3
819 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
820 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
821 ; CHECK-P8-NEXT: mfvsrwz r3, f4
822 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
823 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
824 ; CHECK-P8-NEXT: mfvsrwz r4, f5
825 ; CHECK-P8-NEXT: mtvsrd f4, r3
826 ; CHECK-P8-NEXT: mfvsrwz r3, f6
827 ; CHECK-P8-NEXT: mtvsrd f5, r4
828 ; CHECK-P8-NEXT: xxswapd v2, vs4
829 ; CHECK-P8-NEXT: mfvsrwz r4, f7
830 ; CHECK-P8-NEXT: mtvsrd f6, r3
831 ; CHECK-P8-NEXT: xxswapd v3, vs5
832 ; CHECK-P8-NEXT: mfvsrwz r3, f0
833 ; CHECK-P8-NEXT: mtvsrd f7, r4
834 ; CHECK-P8-NEXT: xxswapd v4, vs6
835 ; CHECK-P8-NEXT: mfvsrwz r4, f1
836 ; CHECK-P8-NEXT: mtvsrd f0, r3
837 ; CHECK-P8-NEXT: xxswapd v1, vs7
838 ; CHECK-P8-NEXT: mfvsrwz r3, f2
839 ; CHECK-P8-NEXT: mtvsrd f1, r4
840 ; CHECK-P8-NEXT: xxswapd v5, vs0
841 ; CHECK-P8-NEXT: mfvsrwz r4, f3
842 ; CHECK-P8-NEXT: mtvsrd f2, r3
843 ; CHECK-P8-NEXT: xxswapd v0, vs1
844 ; CHECK-P8-NEXT: mtvsrd f0, r4
845 ; CHECK-P8-NEXT: xxswapd v6, vs2
846 ; CHECK-P8-NEXT: vmrglb v2, v5, v2
847 ; CHECK-P8-NEXT: xxswapd v5, vs0
848 ; CHECK-P8-NEXT: vmrglb v3, v0, v3
849 ; CHECK-P8-NEXT: vmrglb v4, v6, v4
850 ; CHECK-P8-NEXT: vmrglb v5, v5, v1
851 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
852 ; CHECK-P8-NEXT: vmrglh v3, v5, v4
853 ; CHECK-P8-NEXT: vmrglw v2, v3, v2
854 ; CHECK-P8-NEXT: xxswapd vs0, v2
855 ; CHECK-P8-NEXT: mfvsrd r3, f0
856 ; CHECK-P8-NEXT: blr
857 ;
858 ; CHECK-P9-LABEL: test8elt_signed:
859 ; CHECK-P9: # %bb.0: # %entry
860 ; CHECK-P9-NEXT: lxv vs3, 0(r3)
861 ; CHECK-P9-NEXT: xscvdpsxws f4, f3
862 ; CHECK-P9-NEXT: xxswapd vs3, vs3
863 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
864 ; CHECK-P9-NEXT: lxv vs0, 48(r3)
865 ; CHECK-P9-NEXT: lxv vs1, 32(r3)
866 ; CHECK-P9-NEXT: lxv vs2, 16(r3)
867 ; CHECK-P9-NEXT: mfvsrwz r3, f4
868 ; CHECK-P9-NEXT: mtvsrd f4, r3
869 ; CHECK-P9-NEXT: mfvsrwz r3, f3
870 ; CHECK-P9-NEXT: xxswapd v2, vs4
871 ; CHECK-P9-NEXT: mtvsrd f3, r3
872 ; CHECK-P9-NEXT: xxswapd v3, vs3
873 ; CHECK-P9-NEXT: xscvdpsxws f3, f2
874 ; CHECK-P9-NEXT: xxswapd vs2, vs2
875 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
876 ; CHECK-P9-NEXT: mfvsrwz r3, f3
877 ; CHECK-P9-NEXT: mtvsrd f3, r3
878 ; CHECK-P9-NEXT: mfvsrwz r3, f2
879 ; CHECK-P9-NEXT: mtvsrd f2, r3
880 ; CHECK-P9-NEXT: xxswapd v4, vs2
881 ; CHECK-P9-NEXT: xscvdpsxws f2, f1
882 ; CHECK-P9-NEXT: xxswapd vs1, vs1
883 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
884 ; CHECK-P9-NEXT: mfvsrwz r3, f2
885 ; CHECK-P9-NEXT: mtvsrd f2, r3
886 ; CHECK-P9-NEXT: mfvsrwz r3, f1
887 ; CHECK-P9-NEXT: vmrglb v2, v2, v3
888 ; CHECK-P9-NEXT: xxswapd v3, vs3
889 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
890 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
891 ; CHECK-P9-NEXT: xxswapd v3, vs2
892 ; CHECK-P9-NEXT: mtvsrd f1, r3
893 ; CHECK-P9-NEXT: xxswapd v4, vs1
894 ; CHECK-P9-NEXT: xscvdpsxws f1, f0
895 ; CHECK-P9-NEXT: xxswapd vs0, vs0
896 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
897 ; CHECK-P9-NEXT: mfvsrwz r3, f1
898 ; CHECK-P9-NEXT: mtvsrd f1, r3
899 ; CHECK-P9-NEXT: mfvsrwz r3, f0
900 ; CHECK-P9-NEXT: mtvsrd f0, r3
901 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
902 ; CHECK-P9-NEXT: xxswapd v4, vs1
903 ; CHECK-P9-NEXT: xxswapd v5, vs0
904 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
905 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
906 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
907 ; CHECK-P9-NEXT: mfvsrld r3, v2
908 ; CHECK-P9-NEXT: blr
909 ;
910 ; CHECK-BE-LABEL: test8elt_signed:
911 ; CHECK-BE: # %bb.0: # %entry
912 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
913 ; CHECK-BE-NEXT: xscvdpsxws f4, f3
914 ; CHECK-BE-NEXT: xxswapd vs3, vs3
915 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
916 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
917 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
918 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
919 ; CHECK-BE-NEXT: mfvsrwz r3, f4
920 ; CHECK-BE-NEXT: sldi r3, r3, 56
921 ; CHECK-BE-NEXT: mtvsrd v2, r3
922 ; CHECK-BE-NEXT: mfvsrwz r3, f3
923 ; CHECK-BE-NEXT: xscvdpsxws f3, f2
924 ; CHECK-BE-NEXT: xxswapd vs2, vs2
925 ; CHECK-BE-NEXT: sldi r3, r3, 56
926 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
927 ; CHECK-BE-NEXT: mtvsrd v3, r3
928 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
929 ; CHECK-BE-NEXT: mfvsrwz r3, f3
930 ; CHECK-BE-NEXT: sldi r3, r3, 56
931 ; CHECK-BE-NEXT: mtvsrd v3, r3
932 ; CHECK-BE-NEXT: mfvsrwz r3, f2
933 ; CHECK-BE-NEXT: xscvdpsxws f2, f1
934 ; CHECK-BE-NEXT: xxswapd vs1, vs1
935 ; CHECK-BE-NEXT: sldi r3, r3, 56
936 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
937 ; CHECK-BE-NEXT: mtvsrd v4, r3
938 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
939 ; CHECK-BE-NEXT: mfvsrwz r3, f2
940 ; CHECK-BE-NEXT: sldi r3, r3, 56
941 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
942 ; CHECK-BE-NEXT: mtvsrd v3, r3
943 ; CHECK-BE-NEXT: mfvsrwz r3, f1
944 ; CHECK-BE-NEXT: xscvdpsxws f1, f0
945 ; CHECK-BE-NEXT: xxswapd vs0, vs0
946 ; CHECK-BE-NEXT: sldi r3, r3, 56
947 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
948 ; CHECK-BE-NEXT: mtvsrd v4, r3
949 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
950 ; CHECK-BE-NEXT: mfvsrwz r3, f1
951 ; CHECK-BE-NEXT: sldi r3, r3, 56
952 ; CHECK-BE-NEXT: mtvsrd v4, r3
953 ; CHECK-BE-NEXT: mfvsrwz r3, f0
954 ; CHECK-BE-NEXT: sldi r3, r3, 56
955 ; CHECK-BE-NEXT: mtvsrd v5, r3
956 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
957 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
958 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
959 ; CHECK-BE-NEXT: mfvsrd r3, v2
960 ; CHECK-BE-NEXT: blr
961 entry:
962 %a = load <8 x double>, <8 x double>* %0, align 64
963 %1 = fptosi <8 x double> %a to <8 x i8>
964 %2 = bitcast <8 x i8> %1 to i64
965 ret i64 %2
966 }
968 define <16 x i8> @test16elt_signed(<16 x double>* nocapture readonly) local_unnamed_addr #2 {
969 ; CHECK-P8-LABEL: test16elt_signed:
970 ; CHECK-P8: # %bb.0: # %entry
971 ; CHECK-P8-NEXT: li r4, 16
972 ; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
973 ; CHECK-P8-NEXT: lxvd2x vs1, r3, r4
974 ; CHECK-P8-NEXT: li r4, 32
975 ; CHECK-P8-NEXT: lxvd2x vs2, r3, r4
976 ; CHECK-P8-NEXT: li r4, 48
977 ; CHECK-P8-NEXT: lxvd2x vs3, r3, r4
978 ; CHECK-P8-NEXT: li r4, 64
979 ; CHECK-P8-NEXT: xscvdpsxws f4, f0
980 ; CHECK-P8-NEXT: xxswapd vs0, vs0
981 ; CHECK-P8-NEXT: lxvd2x vs5, r3, r4
982 ; CHECK-P8-NEXT: li r4, 80
983 ; CHECK-P8-NEXT: xscvdpsxws f6, f1
984 ; CHECK-P8-NEXT: xxswapd vs1, vs1
985 ; CHECK-P8-NEXT: lxvd2x vs7, r3, r4
986 ; CHECK-P8-NEXT: li r4, 96
987 ; CHECK-P8-NEXT: xscvdpsxws f8, f2
988 ; CHECK-P8-NEXT: xxswapd vs2, vs2
989 ; CHECK-P8-NEXT: lxvd2x vs9, r3, r4
990 ; CHECK-P8-NEXT: li r4, 112
991 ; CHECK-P8-NEXT: xscvdpsxws f10, f3
992 ; CHECK-P8-NEXT: xxswapd vs3, vs3
993 ; CHECK-P8-NEXT: lxvd2x vs11, r3, r4
994 ; CHECK-P8-NEXT: xscvdpsxws f12, f5
995 ; CHECK-P8-NEXT: xxswapd vs5, vs5
996 ; CHECK-P8-NEXT: xscvdpsxws f13, f7
997 ; CHECK-P8-NEXT: xxswapd vs7, vs7
998 ; CHECK-P8-NEXT: xscvdpsxws v2, f9
999 ; CHECK-P8-NEXT: xxswapd vs9, vs9
1000 ; CHECK-P8-NEXT: mfvsrwz r3, f4
1001 ; CHECK-P8-NEXT: xscvdpsxws v3, f11
1002 ; CHECK-P8-NEXT: xxswapd vs11, vs11
1003 ; CHECK-P8-NEXT: mfvsrwz r4, f6
1004 ; CHECK-P8-NEXT: xscvdpsxws f0, f0
1005 ; CHECK-P8-NEXT: mtvsrd f4, r3
1006 ; CHECK-P8-NEXT: mfvsrwz r3, f8
1007 ; CHECK-P8-NEXT: xscvdpsxws f1, f1
1008 ; CHECK-P8-NEXT: xxswapd v4, vs4
1009 ; CHECK-P8-NEXT: mtvsrd f6, r4
1010 ; CHECK-P8-NEXT: mfvsrwz r4, f10
1011 ; CHECK-P8-NEXT: xscvdpsxws f2, f2
1012 ; CHECK-P8-NEXT: xxswapd v5, vs6
1013 ; CHECK-P8-NEXT: mtvsrd f8, r3
1014 ; CHECK-P8-NEXT: mfvsrwz r3, f12
1015 ; CHECK-P8-NEXT: xscvdpsxws f3, f3
1016 ; CHECK-P8-NEXT: xxswapd v0, vs8
1017 ; CHECK-P8-NEXT: mtvsrd f10, r4
1018 ; CHECK-P8-NEXT: mfvsrwz r4, f13
1019 ; CHECK-P8-NEXT: xscvdpsxws f5, f5
1020 ; CHECK-P8-NEXT: xxswapd v1, vs10
1021 ; CHECK-P8-NEXT: mtvsrd f12, r3
1022 ; CHECK-P8-NEXT: mfvsrwz r3, v2
1023 ; CHECK-P8-NEXT: xscvdpsxws f7, f7
1024 ; CHECK-P8-NEXT: xxswapd v6, vs12
1025 ; CHECK-P8-NEXT: mtvsrd f13, r4
1026 ; CHECK-P8-NEXT: mfvsrwz r4, v3
1027 ; CHECK-P8-NEXT: mtvsrd v2, r3
1028 ; CHECK-P8-NEXT: xxswapd v7, vs13
1029 ; CHECK-P8-NEXT: mfvsrwz r3, f0
1030 ; CHECK-P8-NEXT: xscvdpsxws f9, f9
1031 ; CHECK-P8-NEXT: xxswapd v2, v2
1032 ; CHECK-P8-NEXT: xscvdpsxws f11, f11
1033 ; CHECK-P8-NEXT: mtvsrd v3, r4
1034 ; CHECK-P8-NEXT: mfvsrwz r4, f1
1035 ; CHECK-P8-NEXT: mtvsrd f0, r3
1036 ; CHECK-P8-NEXT: xxswapd v3, v3
1037 ; CHECK-P8-NEXT: mfvsrwz r3, f2
1038 ; CHECK-P8-NEXT: mtvsrd f1, r4
1039 ; CHECK-P8-NEXT: xxswapd v8, vs0
1040 ; CHECK-P8-NEXT: mfvsrwz r4, f3
1041 ; CHECK-P8-NEXT: mtvsrd f2, r3
1042 ; CHECK-P8-NEXT: xxswapd v9, vs1
1043 ; CHECK-P8-NEXT: mfvsrwz r3, f5
1044 ; CHECK-P8-NEXT: mtvsrd f3, r4
1045 ; CHECK-P8-NEXT: xxswapd v10, vs2
1046 ; CHECK-P8-NEXT: mfvsrwz r4, f7
1047 ; CHECK-P8-NEXT: mtvsrd f5, r3
1048 ; CHECK-P8-NEXT: mfvsrwz r3, f9
1049 ; CHECK-P8-NEXT: mtvsrd f7, r4
1050 ; CHECK-P8-NEXT: mfvsrwz r4, f11
1051 ; CHECK-P8-NEXT: vmrglb v4, v8, v4
1052 ; CHECK-P8-NEXT: xxswapd v8, vs3
1053 ; CHECK-P8-NEXT: vmrglb v5, v9, v5
1054 ; CHECK-P8-NEXT: xxswapd v9, vs5
1055 ; CHECK-P8-NEXT: mtvsrd f0, r3
1056 ; CHECK-P8-NEXT: mtvsrd f1, r4
1057 ; CHECK-P8-NEXT: vmrglb v0, v10, v0
1058 ; CHECK-P8-NEXT: xxswapd v10, vs7
1059 ; CHECK-P8-NEXT: vmrglb v1, v8, v1
1060 ; CHECK-P8-NEXT: xxswapd v8, vs0
1061 ; CHECK-P8-NEXT: vmrglb v6, v9, v6
1062 ; CHECK-P8-NEXT: xxswapd v9, vs1
1063 ; CHECK-P8-NEXT: vmrglb v7, v10, v7
1064 ; CHECK-P8-NEXT: vmrglb v2, v8, v2
1065 ; CHECK-P8-NEXT: vmrglb v3, v9, v3
1066 ; CHECK-P8-NEXT: vmrglh v4, v5, v4
1067 ; CHECK-P8-NEXT: vmrglh v5, v1, v0
1068 ; CHECK-P8-NEXT: vmrglh v0, v7, v6
1069 ; CHECK-P8-NEXT: vmrglh v2, v3, v2
1070 ; CHECK-P8-NEXT: vmrglw v3, v5, v4
1071 ; CHECK-P8-NEXT: vmrglw v2, v2, v0
1072 ; CHECK-P8-NEXT: xxmrgld v2, v2, v3
1073 ; CHECK-P8-NEXT: blr
1074 ;
1075 ; CHECK-P9-LABEL: test16elt_signed:
1076 ; CHECK-P9: # %bb.0: # %entry
1077 ; CHECK-P9-NEXT: lxv vs7, 0(r3)
1078 ; CHECK-P9-NEXT: xscvdpsxws f8, f7
1079 ; CHECK-P9-NEXT: xxswapd vs7, vs7
1080 ; CHECK-P9-NEXT: xscvdpsxws f7, f7
1081 ; CHECK-P9-NEXT: lxv vs0, 112(r3)
1082 ; CHECK-P9-NEXT: lxv vs1, 96(r3)
1083 ; CHECK-P9-NEXT: lxv vs2, 80(r3)
1084 ; CHECK-P9-NEXT: lxv vs3, 64(r3)
1085 ; CHECK-P9-NEXT: lxv vs4, 48(r3)
1086 ; CHECK-P9-NEXT: lxv vs5, 32(r3)
1087 ; CHECK-P9-NEXT: lxv vs6, 16(r3)
1088 ; CHECK-P9-NEXT: mfvsrwz r3, f8
1089 ; CHECK-P9-NEXT: mtvsrd f8, r3
1090 ; CHECK-P9-NEXT: mfvsrwz r3, f7
1091 ; CHECK-P9-NEXT: xxswapd v2, vs8
1092 ; CHECK-P9-NEXT: mtvsrd f7, r3
1093 ; CHECK-P9-NEXT: xxswapd v3, vs7
1094 ; CHECK-P9-NEXT: xscvdpsxws f7, f6
1095 ; CHECK-P9-NEXT: xxswapd vs6, vs6
1096 ; CHECK-P9-NEXT: xscvdpsxws f6, f6
1097 ; CHECK-P9-NEXT: mfvsrwz r3, f7
1098 ; CHECK-P9-NEXT: mtvsrd f7, r3
1099 ; CHECK-P9-NEXT: mfvsrwz r3, f6
1100 ; CHECK-P9-NEXT: mtvsrd f6, r3
1101 ; CHECK-P9-NEXT: xxswapd v4, vs6
1102 ; CHECK-P9-NEXT: xscvdpsxws f6, f5
1103 ; CHECK-P9-NEXT: xxswapd vs5, vs5
1104 ; CHECK-P9-NEXT: xscvdpsxws f5, f5
1105 ; CHECK-P9-NEXT: mfvsrwz r3, f6
1106 ; CHECK-P9-NEXT: mtvsrd f6, r3
1107 ; CHECK-P9-NEXT: mfvsrwz r3, f5
1108 ; CHECK-P9-NEXT: vmrglb v2, v2, v3
1109 ; CHECK-P9-NEXT: xxswapd v3, vs7
1110 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
1111 ; CHECK-P9-NEXT: vmrglh v2, v3, v2
1112 ; CHECK-P9-NEXT: xxswapd v3, vs6
1113 ; CHECK-P9-NEXT: mtvsrd f5, r3
1114 ; CHECK-P9-NEXT: xxswapd v4, vs5
1115 ; CHECK-P9-NEXT: xscvdpsxws f5, f4
1116 ; CHECK-P9-NEXT: xxswapd vs4, vs4
1117 ; CHECK-P9-NEXT: xscvdpsxws f4, f4
1118 ; CHECK-P9-NEXT: mfvsrwz r3, f5
1119 ; CHECK-P9-NEXT: mtvsrd f5, r3
1120 ; CHECK-P9-NEXT: mfvsrwz r3, f4
1121 ; CHECK-P9-NEXT: mtvsrd f4, r3
1122 ; CHECK-P9-NEXT: xxswapd v5, vs4
1123 ; CHECK-P9-NEXT: xscvdpsxws f4, f3
1124 ; CHECK-P9-NEXT: xxswapd vs3, vs3
1125 ; CHECK-P9-NEXT: xscvdpsxws f3, f3
1126 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
1127 ; CHECK-P9-NEXT: xxswapd v4, vs5
1128 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
1129 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1130 ; CHECK-P9-NEXT: mfvsrwz r3, f4
1131 ; CHECK-P9-NEXT: mtvsrd f4, r3
1132 ; CHECK-P9-NEXT: mfvsrwz r3, f3
1133 ; CHECK-P9-NEXT: mtvsrd f3, r3
1134 ; CHECK-P9-NEXT: xxswapd v4, vs3
1135 ; CHECK-P9-NEXT: xscvdpsxws f3, f2
1136 ; CHECK-P9-NEXT: xxswapd vs2, vs2
1137 ; CHECK-P9-NEXT: xscvdpsxws f2, f2
1138 ; CHECK-P9-NEXT: mfvsrwz r3, f3
1139 ; CHECK-P9-NEXT: mtvsrd f3, r3
1140 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1141 ; CHECK-P9-NEXT: mtvsrd f2, r3
1142 ; CHECK-P9-NEXT: xxswapd v5, vs2
1143 ; CHECK-P9-NEXT: xscvdpsxws f2, f1
1144 ; CHECK-P9-NEXT: xxswapd vs1, vs1
1145 ; CHECK-P9-NEXT: xscvdpsxws f1, f1
1146 ; CHECK-P9-NEXT: vmrglw v2, v3, v2
1147 ; CHECK-P9-NEXT: xxswapd v3, vs4
1148 ; CHECK-P9-NEXT: vmrglb v3, v3, v4
1149 ; CHECK-P9-NEXT: xxswapd v4, vs3
1150 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
1151 ; CHECK-P9-NEXT: vmrglh v3, v4, v3
1152 ; CHECK-P9-NEXT: mfvsrwz r3, f2
1153 ; CHECK-P9-NEXT: mtvsrd f2, r3
1154 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1155 ; CHECK-P9-NEXT: xxswapd v4, vs2
1156 ; CHECK-P9-NEXT: mtvsrd f1, r3
1157 ; CHECK-P9-NEXT: xxswapd v5, vs1
1158 ; CHECK-P9-NEXT: xscvdpsxws f1, f0
1159 ; CHECK-P9-NEXT: xxswapd vs0, vs0
1160 ; CHECK-P9-NEXT: xscvdpsxws f0, f0
1161 ; CHECK-P9-NEXT: mfvsrwz r3, f1
1162 ; CHECK-P9-NEXT: mtvsrd f1, r3
1163 ; CHECK-P9-NEXT: mfvsrwz r3, f0
1164 ; CHECK-P9-NEXT: mtvsrd f0, r3
1165 ; CHECK-P9-NEXT: vmrglb v4, v4, v5
1166 ; CHECK-P9-NEXT: xxswapd v5, vs1
1167 ; CHECK-P9-NEXT: xxswapd v0, vs0
1168 ; CHECK-P9-NEXT: vmrglb v5, v5, v0
1169 ; CHECK-P9-NEXT: vmrglh v4, v5, v4
1170 ; CHECK-P9-NEXT: vmrglw v3, v4, v3
1171 ; CHECK-P9-NEXT: xxmrgld v2, v3, v2
1172 ; CHECK-P9-NEXT: blr
1173 ;
1174 ; CHECK-BE-LABEL: test16elt_signed:
1175 ; CHECK-BE: # %bb.0: # %entry
1176 ; CHECK-BE-NEXT: lxv vs7, 112(r3)
1177 ; CHECK-BE-NEXT: xscvdpsxws f8, f7
1178 ; CHECK-BE-NEXT: xxswapd vs7, vs7
1179 ; CHECK-BE-NEXT: xscvdpsxws f7, f7
1180 ; CHECK-BE-NEXT: lxv vs6, 96(r3)
1181 ; CHECK-BE-NEXT: lxv vs0, 0(r3)
1182 ; CHECK-BE-NEXT: lxv vs1, 16(r3)
1183 ; CHECK-BE-NEXT: lxv vs2, 32(r3)
1184 ; CHECK-BE-NEXT: lxv vs3, 48(r3)
1185 ; CHECK-BE-NEXT: lxv vs4, 64(r3)
1186 ; CHECK-BE-NEXT: lxv vs5, 80(r3)
1187 ; CHECK-BE-NEXT: mfvsrwz r3, f8
1188 ; CHECK-BE-NEXT: sldi r3, r3, 56
1189 ; CHECK-BE-NEXT: mtvsrd v2, r3
1190 ; CHECK-BE-NEXT: mfvsrwz r3, f7
1191 ; CHECK-BE-NEXT: xscvdpsxws f7, f6
1192 ; CHECK-BE-NEXT: xxswapd vs6, vs6
1193 ; CHECK-BE-NEXT: sldi r3, r3, 56
1194 ; CHECK-BE-NEXT: xscvdpsxws f6, f6
1195 ; CHECK-BE-NEXT: mtvsrd v3, r3
1196 ; CHECK-BE-NEXT: vmrghb v2, v2, v3
1197 ; CHECK-BE-NEXT: mfvsrwz r3, f7
1198 ; CHECK-BE-NEXT: sldi r3, r3, 56
1199 ; CHECK-BE-NEXT: mtvsrd v3, r3
1200 ; CHECK-BE-NEXT: mfvsrwz r3, f6
1201 ; CHECK-BE-NEXT: xscvdpsxws f6, f5
1202 ; CHECK-BE-NEXT: xxswapd vs5, vs5
1203 ; CHECK-BE-NEXT: sldi r3, r3, 56
1204 ; CHECK-BE-NEXT: xscvdpsxws f5, f5
1205 ; CHECK-BE-NEXT: mtvsrd v4, r3
1206 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
1207 ; CHECK-BE-NEXT: mfvsrwz r3, f6
1208 ; CHECK-BE-NEXT: sldi r3, r3, 56
1209 ; CHECK-BE-NEXT: vmrghh v2, v3, v2
1210 ; CHECK-BE-NEXT: mtvsrd v3, r3
1211 ; CHECK-BE-NEXT: mfvsrwz r3, f5
1212 ; CHECK-BE-NEXT: xscvdpsxws f5, f4
1213 ; CHECK-BE-NEXT: xxswapd vs4, vs4
1214 ; CHECK-BE-NEXT: sldi r3, r3, 56
1215 ; CHECK-BE-NEXT: xscvdpsxws f4, f4
1216 ; CHECK-BE-NEXT: mtvsrd v4, r3
1217 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
1218 ; CHECK-BE-NEXT: mfvsrwz r3, f5
1219 ; CHECK-BE-NEXT: sldi r3, r3, 56
1220 ; CHECK-BE-NEXT: mtvsrd v4, r3
1221 ; CHECK-BE-NEXT: mfvsrwz r3, f4
1222 ; CHECK-BE-NEXT: xscvdpsxws f4, f3
1223 ; CHECK-BE-NEXT: xxswapd vs3, vs3
1224 ; CHECK-BE-NEXT: sldi r3, r3, 56
1225 ; CHECK-BE-NEXT: xscvdpsxws f3, f3
1226 ; CHECK-BE-NEXT: mtvsrd v5, r3
1227 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
1228 ; CHECK-BE-NEXT: mfvsrwz r3, f4
1229 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1230 ; CHECK-BE-NEXT: sldi r3, r3, 56
1231 ; CHECK-BE-NEXT: vmrghw v2, v3, v2
1232 ; CHECK-BE-NEXT: mtvsrd v3, r3
1233 ; CHECK-BE-NEXT: mfvsrwz r3, f3
1234 ; CHECK-BE-NEXT: xscvdpsxws f3, f2
1235 ; CHECK-BE-NEXT: xxswapd vs2, vs2
1236 ; CHECK-BE-NEXT: sldi r3, r3, 56
1237 ; CHECK-BE-NEXT: xscvdpsxws f2, f2
1238 ; CHECK-BE-NEXT: mtvsrd v4, r3
1239 ; CHECK-BE-NEXT: vmrghb v3, v3, v4
1240 ; CHECK-BE-NEXT: mfvsrwz r3, f3
1241 ; CHECK-BE-NEXT: sldi r3, r3, 56
1242 ; CHECK-BE-NEXT: mtvsrd v4, r3
1243 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1244 ; CHECK-BE-NEXT: xscvdpsxws f2, f1
1245 ; CHECK-BE-NEXT: xxswapd vs1, vs1
1246 ; CHECK-BE-NEXT: sldi r3, r3, 56
1247 ; CHECK-BE-NEXT: xscvdpsxws f1, f1
1248 ; CHECK-BE-NEXT: mtvsrd v5, r3
1249 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
1250 ; CHECK-BE-NEXT: mfvsrwz r3, f2
1251 ; CHECK-BE-NEXT: sldi r3, r3, 56
1252 ; CHECK-BE-NEXT: vmrghh v3, v4, v3
1253 ; CHECK-BE-NEXT: mtvsrd v4, r3
1254 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1255 ; CHECK-BE-NEXT: xscvdpsxws f1, f0
1256 ; CHECK-BE-NEXT: xxswapd vs0, vs0
1257 ; CHECK-BE-NEXT: sldi r3, r3, 56
1258 ; CHECK-BE-NEXT: xscvdpsxws f0, f0
1259 ; CHECK-BE-NEXT: mtvsrd v5, r3
1260 ; CHECK-BE-NEXT: vmrghb v4, v4, v5
1261 ; CHECK-BE-NEXT: mfvsrwz r3, f1
1262 ; CHECK-BE-NEXT: sldi r3, r3, 56
1263 ; CHECK-BE-NEXT: mtvsrd v5, r3
1264 ; CHECK-BE-NEXT: mfvsrwz r3, f0
1265 ; CHECK-BE-NEXT: sldi r3, r3, 56
1266 ; CHECK-BE-NEXT: mtvsrd v0, r3
1267 ; CHECK-BE-NEXT: vmrghb v5, v5, v0
1268 ; CHECK-BE-NEXT: vmrghh v4, v5, v4
1269 ; CHECK-BE-NEXT: vmrghw v3, v4, v3
1270 ; CHECK-BE-NEXT: xxmrghd v2, v3, v2
1271 ; CHECK-BE-NEXT: blr
1272 entry:
1273 %a = load <16 x double>, <16 x double>* %0, align 128
1274 %1 = fptosi <16 x double> %a to <16 x i8>
1275 ret <16 x i8> %1
1276 }