[ARM] MVE integer min and max
[llvm-complete.git] / include / llvm / MCA / Stages / RetireStage.h
blob08c216ac7bf43408ded5f66837bbcd2de4a3cda7
1 //===---------------------- RetireStage.h -----------------------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 /// \file
9 ///
10 /// This file defines the retire stage of a default instruction pipeline.
11 /// The RetireStage represents the process logic that interacts with the
12 /// simulated RetireControlUnit hardware.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_MCA_RETIRE_STAGE_H
17 #define LLVM_MCA_RETIRE_STAGE_H
19 #include "llvm/MCA/HardwareUnits/RegisterFile.h"
20 #include "llvm/MCA/HardwareUnits/RetireControlUnit.h"
21 #include "llvm/MCA/Stages/Stage.h"
23 namespace llvm {
24 namespace mca {
26 class RetireStage final : public Stage {
27 // Owner will go away when we move listeners/eventing to the stages.
28 RetireControlUnit &RCU;
29 RegisterFile &PRF;
31 RetireStage(const RetireStage &Other) = delete;
32 RetireStage &operator=(const RetireStage &Other) = delete;
34 public:
35 RetireStage(RetireControlUnit &R, RegisterFile &F)
36 : Stage(), RCU(R), PRF(F) {}
38 bool hasWorkToComplete() const override { return !RCU.isEmpty(); }
39 Error cycleStart() override;
40 Error execute(InstRef &IR) override;
41 void notifyInstructionRetired(const InstRef &IR) const;
44 } // namespace mca
45 } // namespace llvm
47 #endif // LLVM_MCA_RETIRE_STAGE_H