1 //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares the RISCV specific subclass of TargetSubtargetInfo.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
14 #define LLVM_LIB_TARGET_RISCV_RISCVSUBTARGET_H
16 #include "RISCVFrameLowering.h"
17 #include "RISCVISelLowering.h"
18 #include "RISCVInstrInfo.h"
19 #include "Utils/RISCVBaseInfo.h"
20 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
21 #include "llvm/CodeGen/TargetSubtargetInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetMachine.h"
25 #define GET_SUBTARGETINFO_HEADER
26 #include "RISCVGenSubtargetInfo.inc"
31 class RISCVSubtarget
: public RISCVGenSubtargetInfo
{
32 virtual void anchor();
33 bool HasStdExtM
= false;
34 bool HasStdExtA
= false;
35 bool HasStdExtF
= false;
36 bool HasStdExtD
= false;
37 bool HasStdExtC
= false;
40 bool EnableLinkerRelax
= false;
42 MVT XLenVT
= MVT::i32
;
43 RISCVABI::ABI TargetABI
= RISCVABI::ABI_Unknown
;
44 RISCVFrameLowering FrameLowering
;
45 RISCVInstrInfo InstrInfo
;
46 RISCVRegisterInfo RegInfo
;
47 RISCVTargetLowering TLInfo
;
48 SelectionDAGTargetInfo TSInfo
;
50 /// Initializes using the passed in CPU and feature strings so that we can
51 /// use initializer lists for subtarget initialization.
52 RISCVSubtarget
&initializeSubtargetDependencies(const Triple
&TT
,
53 StringRef CPU
, StringRef FS
,
57 // Initializes the data members to match that of the specified triple.
58 RISCVSubtarget(const Triple
&TT
, StringRef CPU
, StringRef FS
,
59 StringRef ABIName
, const TargetMachine
&TM
);
61 // Parses features string setting specified subtarget options. The
62 // definition of this function is auto-generated by tblgen.
63 void ParseSubtargetFeatures(StringRef CPU
, StringRef FS
);
65 const RISCVFrameLowering
*getFrameLowering() const override
{
66 return &FrameLowering
;
68 const RISCVInstrInfo
*getInstrInfo() const override
{ return &InstrInfo
; }
69 const RISCVRegisterInfo
*getRegisterInfo() const override
{
72 const RISCVTargetLowering
*getTargetLowering() const override
{
75 const SelectionDAGTargetInfo
*getSelectionDAGInfo() const override
{
78 bool hasStdExtM() const { return HasStdExtM
; }
79 bool hasStdExtA() const { return HasStdExtA
; }
80 bool hasStdExtF() const { return HasStdExtF
; }
81 bool hasStdExtD() const { return HasStdExtD
; }
82 bool hasStdExtC() const { return HasStdExtC
; }
83 bool is64Bit() const { return HasRV64
; }
84 bool isRV32E() const { return IsRV32E
; }
85 bool enableLinkerRelax() const { return EnableLinkerRelax
; }
86 MVT
getXLenVT() const { return XLenVT
; }
87 unsigned getXLen() const { return XLen
; }
88 RISCVABI::ABI
getTargetABI() const { return TargetABI
; }
90 } // End llvm namespace