[llvm-exegesis][NFC] Pass Instruction instead of bare Opcode
[llvm-core.git] / lib / Target / AMDGPU / AMDGPUFrameLowering.h
blobee836bf8a631090b6a0fa7fff6820f62b8f9012a
1 //===--------------------- AMDGPUFrameLowering.h ----------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 /// \file
11 /// Interface to describe a layout of a stack frame on an AMDGPU target.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUFRAMELOWERING_H
16 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUFRAMELOWERING_H
18 #include "llvm/CodeGen/TargetFrameLowering.h"
20 namespace llvm {
22 /// Information about the stack frame layout on the AMDGPU targets.
23 ///
24 /// It holds the direction of the stack growth, the known stack alignment on
25 /// entry to each function, and the offset to the locals area.
26 /// See TargetFrameInfo for more comments.
27 class AMDGPUFrameLowering : public TargetFrameLowering {
28 public:
29 AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
30 unsigned TransAl = 1);
31 ~AMDGPUFrameLowering() override;
33 /// \returns The number of 32-bit sub-registers that are used when storing
34 /// values to the stack.
35 unsigned getStackWidth(const MachineFunction &MF) const;
38 } // end namespace llvm
40 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUFRAMELOWERING_H