lib/Target/AMDGPU/AMDGPURegisterInfo.h

   1 //===-- AMDGPURegisterInfo.h - AMDGPURegisterInfo Interface -*- C++ -*-----===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 /// \file
  11 /// TargetRegisterInfo interface that is implemented by all hw codegen
  12 /// targets.
  13 //
  14 //===----------------------------------------------------------------------===//
  15
  16 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUREGISTERINFO_H
  17 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUREGISTERINFO_H
  18
  19 #define GET_REGINFO_HEADER
  20 #include "AMDGPUGenRegisterInfo.inc"
  21
  22 namespace llvm {
  23
  24 class GCNSubtarget;
  25 class TargetInstrInfo;
  26
  27 struct AMDGPURegisterInfo : public AMDGPUGenRegisterInfo {
  28   AMDGPURegisterInfo();
  29
  30   /// \returns the sub reg enum value for the given \p Channel
  31   /// (e.g. getSubRegFromChannel(0) -> AMDGPU::sub0)
  32   static unsigned getSubRegFromChannel(unsigned Channel);
  33
  34   void reserveRegisterTuples(BitVector &, unsigned Reg) const;
  35 };
  36
  37 } // End namespace llvm
  38
  39 #endif