[llvm-exegesis][NFC] Pass Instruction instead of bare Opcode
[llvm-core.git] / lib / Target / AMDGPU / CMakeLists.txt
blob5af27cd1d8cabaf7b742c8426b24217a5ab18803
1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
3 tablegen(LLVM AMDGPUGenAsmMatcher.inc -gen-asm-matcher)
4 tablegen(LLVM AMDGPUGenAsmWriter.inc -gen-asm-writer)
5 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
6 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
7 tablegen(LLVM AMDGPUGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM AMDGPUGenIntrinsicEnums.inc -gen-tgt-intrinsic-enums)
10 tablegen(LLVM AMDGPUGenIntrinsicImpl.inc -gen-tgt-intrinsic-impl)
11 tablegen(LLVM AMDGPUGenMCCodeEmitter.inc -gen-emitter)
12 tablegen(LLVM AMDGPUGenMCPseudoLowering.inc -gen-pseudo-lowering)
13 tablegen(LLVM AMDGPUGenRegisterBank.inc -gen-register-bank)
14 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
15 tablegen(LLVM AMDGPUGenSearchableTables.inc -gen-searchable-tables)
16 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
18 set(LLVM_TARGET_DEFINITIONS AMDGPUGISel.td)
19 tablegen(LLVM AMDGPUGenGlobalISel.inc -gen-global-isel)
21 set(LLVM_TARGET_DEFINITIONS R600.td)
22 tablegen(LLVM R600GenAsmWriter.inc -gen-asm-writer)
23 tablegen(LLVM R600GenCallingConv.inc -gen-callingconv)
24 tablegen(LLVM R600GenDAGISel.inc -gen-dag-isel)
25 tablegen(LLVM R600GenDFAPacketizer.inc -gen-dfa-packetizer)
26 tablegen(LLVM R600GenInstrInfo.inc -gen-instr-info)
27 tablegen(LLVM R600GenMCCodeEmitter.inc -gen-emitter)
28 tablegen(LLVM R600GenRegisterInfo.inc -gen-register-info)
29 tablegen(LLVM R600GenSubtargetInfo.inc -gen-subtarget)
31 add_public_tablegen_target(AMDGPUCommonTableGen)
33 add_llvm_target(AMDGPUCodeGen
34   AMDGPUAliasAnalysis.cpp
35   AMDGPUAlwaysInlinePass.cpp
36   AMDGPUAnnotateKernelFeatures.cpp
37   AMDGPUAnnotateUniformValues.cpp
38   AMDGPUArgumentUsageInfo.cpp
39   AMDGPUAsmPrinter.cpp
40   AMDGPUAtomicOptimizer.cpp
41   AMDGPUCallLowering.cpp
42   AMDGPUCodeGenPrepare.cpp
43   AMDGPUFrameLowering.cpp
44   AMDGPUHSAMetadataStreamer.cpp
45   AMDGPUInstrInfo.cpp
46   AMDGPUInstructionSelector.cpp
47   AMDGPUIntrinsicInfo.cpp
48   AMDGPUISelDAGToDAG.cpp
49   AMDGPUISelLowering.cpp
50   AMDGPULegalizerInfo.cpp
51   AMDGPULibCalls.cpp
52   AMDGPULibFunc.cpp
53   AMDGPULowerIntrinsics.cpp
54   AMDGPULowerKernelArguments.cpp
55   AMDGPULowerKernelAttributes.cpp
56   AMDGPUMachineCFGStructurizer.cpp
57   AMDGPUMachineFunction.cpp
58   AMDGPUMachineModuleInfo.cpp
59   AMDGPUMacroFusion.cpp
60   AMDGPUMCInstLower.cpp
61   AMDGPUOpenCLEnqueuedBlockLowering.cpp
62   AMDGPUPromoteAlloca.cpp
63   AMDGPURegAsmNames.inc.cpp
64   AMDGPURegisterBankInfo.cpp
65   AMDGPURegisterInfo.cpp
66   AMDGPURewriteOutArguments.cpp
67   AMDGPUSubtarget.cpp
68   AMDGPUTargetMachine.cpp
69   AMDGPUTargetObjectFile.cpp
70   AMDGPUTargetTransformInfo.cpp
71   AMDGPUUnifyDivergentExitNodes.cpp
72   AMDGPUUnifyMetadata.cpp
73   AMDGPUInline.cpp
74   AMDGPUPerfHintAnalysis.cpp
75   AMDILCFGStructurizer.cpp
76   GCNHazardRecognizer.cpp
77   GCNIterativeScheduler.cpp
78   GCNMinRegStrategy.cpp
79   GCNRegPressure.cpp
80   GCNSchedStrategy.cpp
81   R600AsmPrinter.cpp
82   R600ClauseMergePass.cpp
83   R600ControlFlowFinalizer.cpp
84   R600EmitClauseMarkers.cpp
85   R600ExpandSpecialInstrs.cpp
86   R600FrameLowering.cpp
87   R600InstrInfo.cpp
88   R600ISelLowering.cpp
89   R600MachineFunctionInfo.cpp
90   R600MachineScheduler.cpp
91   R600OpenCLImageTypeLoweringPass.cpp
92   R600OptimizeVectorRegisters.cpp
93   R600Packetizer.cpp
94   R600RegisterInfo.cpp
95   SIAnnotateControlFlow.cpp
96   SIDebuggerInsertNops.cpp
97   SIFixSGPRCopies.cpp
98   SIFixVGPRCopies.cpp
99   SIFixWWMLiveness.cpp
100   SIFoldOperands.cpp
101   SIFormMemoryClauses.cpp
102   SIFrameLowering.cpp
103   SIInsertSkips.cpp
104   SIInsertWaitcnts.cpp
105   SIInstrInfo.cpp
106   SIISelLowering.cpp
107   SILoadStoreOptimizer.cpp
108   SILowerControlFlow.cpp
109   SILowerI1Copies.cpp
110   SIMachineFunctionInfo.cpp
111   SIMachineScheduler.cpp
112   SIMemoryLegalizer.cpp
113   SIOptimizeExecMasking.cpp
114   SIOptimizeExecMaskingPreRA.cpp
115   SIPeepholeSDWA.cpp
116   SIRegisterInfo.cpp
117   SIShrinkInstructions.cpp
118   SIWholeQuadMode.cpp
119   GCNILPSched.cpp
120   )
122 add_subdirectory(AsmParser)
123 add_subdirectory(Disassembler)
124 add_subdirectory(InstPrinter)
125 add_subdirectory(MCTargetDesc)
126 add_subdirectory(TargetInfo)
127 add_subdirectory(Utils)