[llvm-exegesis][NFC] Pass Instruction instead of bare Opcode
[llvm-core.git] / lib / Target / Mips / MipsRegisterBankInfo.h
blob64a79abaa74d1f412b3ee754917c78e0b45f8aa4
1 //===- MipsRegisterBankInfo.h -----------------------------------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 /// \file
10 /// This file declares the targeting of the RegisterBankInfo class for Mips.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERBANKINFO_H
15 #define LLVM_LIB_TARGET_MIPS_MIPSREGISTERBANKINFO_H
17 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
19 #define GET_REGBANK_DECLARATIONS
20 #include "MipsGenRegisterBank.inc"
22 namespace llvm {
24 class TargetRegisterInfo;
26 class MipsGenRegisterBankInfo : public RegisterBankInfo {
27 #define GET_TARGET_REGBANK_CLASS
28 #include "MipsGenRegisterBank.inc"
31 /// This class provides the information for the target register banks.
32 class MipsRegisterBankInfo final : public MipsGenRegisterBankInfo {
33 public:
34 MipsRegisterBankInfo(const TargetRegisterInfo &TRI);
36 const RegisterBank &
37 getRegBankFromRegClass(const TargetRegisterClass &RC) const override;
39 const InstructionMapping &
40 getInstrMapping(const MachineInstr &MI) const override;
42 } // end namespace llvm
43 #endif