[llvm-exegesis][NFC] Pass Instruction instead of bare Opcode
[llvm-core.git] / lib / Target / X86 / X86LegalizerInfo.h
blob135950a95f84454dc06ba5fc930c22b0f318dbe5
1 //===- X86LegalizerInfo.h ------------------------------------------*- C++
2 //-*-==//
3 //
4 // The LLVM Compiler Infrastructure
5 //
6 // This file is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
8 //
9 //===----------------------------------------------------------------------===//
10 /// \file
11 /// This file declares the targeting of the Machinelegalizer class for X86.
12 /// \todo This should be generated by TableGen.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_X86_X86MACHINELEGALIZER_H
16 #define LLVM_LIB_TARGET_X86_X86MACHINELEGALIZER_H
18 #include "llvm/CodeGen/GlobalISel/LegalizerInfo.h"
20 namespace llvm {
22 class X86Subtarget;
23 class X86TargetMachine;
25 /// This class provides the information for the target register banks.
26 class X86LegalizerInfo : public LegalizerInfo {
27 private:
28 /// Keep a reference to the X86Subtarget around so that we can
29 /// make the right decision when generating code for different targets.
30 const X86Subtarget &Subtarget;
31 const X86TargetMachine &TM;
33 public:
34 X86LegalizerInfo(const X86Subtarget &STI, const X86TargetMachine &TM);
36 private:
37 void setLegalizerInfo32bit();
38 void setLegalizerInfo64bit();
39 void setLegalizerInfoSSE1();
40 void setLegalizerInfoSSE2();
41 void setLegalizerInfoSSE41();
42 void setLegalizerInfoAVX();
43 void setLegalizerInfoAVX2();
44 void setLegalizerInfoAVX512();
45 void setLegalizerInfoAVX512DQ();
46 void setLegalizerInfoAVX512BW();
48 } // namespace llvm
49 #endif