1 //===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Mips16 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "Mips16FrameLowering.h"
15 #include "MCTargetDesc/MipsBaseInfo.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsRegisterInfo.h"
19 #include "MipsSubtarget.h"
20 #include "llvm/ADT/BitVector.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstr.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/IR/DebugLoc.h"
28 #include "llvm/MC/MCContext.h"
29 #include "llvm/MC/MCDwarf.h"
30 #include "llvm/MC/MCRegisterInfo.h"
31 #include "llvm/MC/MachineLocation.h"
32 #include "llvm/Support/MathExtras.h"
33 #include "llvm/CodeGen/TargetFrameLowering.h"
40 Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget
&STI
)
41 : MipsFrameLowering(STI
, STI
.getStackAlignment()) {}
43 void Mips16FrameLowering::emitPrologue(MachineFunction
&MF
,
44 MachineBasicBlock
&MBB
) const {
45 MachineFrameInfo
&MFI
= MF
.getFrameInfo();
46 const Mips16InstrInfo
&TII
=
47 *static_cast<const Mips16InstrInfo
*>(STI
.getInstrInfo());
48 MachineBasicBlock::iterator MBBI
= MBB
.begin();
50 // Debug location must be unknown since the first debug location is used
51 // to determine the end of the prologue.
54 uint64_t StackSize
= MFI
.getStackSize();
56 // No need to allocate space on the stack.
57 if (StackSize
== 0 && !MFI
.adjustsStack()) return;
59 MachineModuleInfo
&MMI
= MF
.getMMI();
60 const MCRegisterInfo
*MRI
= MMI
.getContext().getRegisterInfo();
63 TII
.makeFrame(Mips::SP
, StackSize
, MBB
, MBBI
);
65 // emit ".cfi_def_cfa_offset StackSize"
66 unsigned CFIIndex
= MF
.addFrameInst(
67 MCCFIInstruction::createDefCfaOffset(nullptr, -StackSize
));
68 BuildMI(MBB
, MBBI
, dl
, TII
.get(TargetOpcode::CFI_INSTRUCTION
))
69 .addCFIIndex(CFIIndex
);
71 const std::vector
<CalleeSavedInfo
> &CSI
= MFI
.getCalleeSavedInfo();
74 const std::vector
<CalleeSavedInfo
> &CSI
= MFI
.getCalleeSavedInfo();
76 for (std::vector
<CalleeSavedInfo
>::const_iterator I
= CSI
.begin(),
77 E
= CSI
.end(); I
!= E
; ++I
) {
78 int64_t Offset
= MFI
.getObjectOffset(I
->getFrameIdx());
79 unsigned Reg
= I
->getReg();
80 unsigned DReg
= MRI
->getDwarfRegNum(Reg
, true);
81 unsigned CFIIndex
= MF
.addFrameInst(
82 MCCFIInstruction::createOffset(nullptr, DReg
, Offset
));
83 BuildMI(MBB
, MBBI
, dl
, TII
.get(TargetOpcode::CFI_INSTRUCTION
))
84 .addCFIIndex(CFIIndex
);
88 BuildMI(MBB
, MBBI
, dl
, TII
.get(Mips::MoveR3216
), Mips::S0
)
89 .addReg(Mips::SP
).setMIFlag(MachineInstr::FrameSetup
);
92 void Mips16FrameLowering::emitEpilogue(MachineFunction
&MF
,
93 MachineBasicBlock
&MBB
) const {
94 MachineBasicBlock::iterator MBBI
= MBB
.getFirstTerminator();
95 MachineFrameInfo
&MFI
= MF
.getFrameInfo();
96 const Mips16InstrInfo
&TII
=
97 *static_cast<const Mips16InstrInfo
*>(STI
.getInstrInfo());
98 DebugLoc dl
= MBBI
!= MBB
.end() ? MBBI
->getDebugLoc() : DebugLoc();
99 uint64_t StackSize
= MFI
.getStackSize();
105 BuildMI(MBB
, MBBI
, dl
, TII
.get(Mips::Move32R16
), Mips::SP
)
109 // assumes stacksize multiple of 8
110 TII
.restoreFrame(Mips::SP
, StackSize
, MBB
, MBBI
);
113 bool Mips16FrameLowering::
114 spillCalleeSavedRegisters(MachineBasicBlock
&MBB
,
115 MachineBasicBlock::iterator MI
,
116 const std::vector
<CalleeSavedInfo
> &CSI
,
117 const TargetRegisterInfo
*TRI
) const {
118 MachineFunction
*MF
= MBB
.getParent();
121 // Registers RA, S0,S1 are the callee saved registers and they
122 // will be saved with the "save" instruction
123 // during emitPrologue
125 for (unsigned i
= 0, e
= CSI
.size(); i
!= e
; ++i
) {
126 // Add the callee-saved register as live-in. Do not add if the register is
127 // RA and return address is taken, because it has already been added in
128 // method MipsTargetLowering::lowerRETURNADDR.
129 // It's killed at the spill, unless the register is RA and return address
131 unsigned Reg
= CSI
[i
].getReg();
132 bool IsRAAndRetAddrIsTaken
= (Reg
== Mips::RA
)
133 && MF
->getFrameInfo().isReturnAddressTaken();
134 if (!IsRAAndRetAddrIsTaken
)
141 bool Mips16FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock
&MBB
,
142 MachineBasicBlock::iterator MI
,
143 std::vector
<CalleeSavedInfo
> &CSI
,
144 const TargetRegisterInfo
*TRI
) const {
146 // Registers RA,S0,S1 are the callee saved registers and they will be restored
147 // with the restore instruction during emitEpilogue.
148 // We need to override this virtual function, otherwise llvm will try and
149 // restore the registers on it's on from the stack.
156 Mips16FrameLowering::hasReservedCallFrame(const MachineFunction
&MF
) const {
157 const MachineFrameInfo
&MFI
= MF
.getFrameInfo();
158 // Reserve call frame if the size of the maximum call frame fits into 15-bit
159 // immediate field and there are no variable sized objects on the stack.
160 return isInt
<15>(MFI
.getMaxCallFrameSize()) && !MFI
.hasVarSizedObjects();
163 void Mips16FrameLowering::determineCalleeSaves(MachineFunction
&MF
,
164 BitVector
&SavedRegs
,
165 RegScavenger
*RS
) const {
166 TargetFrameLowering::determineCalleeSaves(MF
, SavedRegs
, RS
);
167 const Mips16InstrInfo
&TII
=
168 *static_cast<const Mips16InstrInfo
*>(STI
.getInstrInfo());
169 const MipsRegisterInfo
&RI
= TII
.getRegisterInfo();
170 const BitVector Reserved
= RI
.getReservedRegs(MF
);
171 bool SaveS2
= Reserved
[Mips::S2
];
173 SavedRegs
.set(Mips::S2
);
175 SavedRegs
.set(Mips::S0
);
178 const MipsFrameLowering
*
179 llvm::createMips16FrameLowering(const MipsSubtarget
&ST
) {
180 return new Mips16FrameLowering(ST
);