| blob | f4a4bb5e6b4fee3053ad5fefda3efd4eca9b999c |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
3 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE3
4 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSSE3
5 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
6 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1OR2 --check-prefix=AVX1
7 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX2OR512VL,AVX2,AVX2-SLOW
8 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,AVX,AVX1OR2,AVX2OR512VL,AVX2,AVX2-FAST
9 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+fast-variable-shuffle | FileCheck %s --check-prefixes=ALL,AVX,AVX2OR512VL,AVX512VL
11 define <4 x i32> @shuffle_v4i32_0001(<4 x i32> %a, <4 x i32> %b) {
12 ; SSE-LABEL: shuffle_v4i32_0001:
13 ; SSE: # %bb.0:
14 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,1]
15 ; SSE-NEXT: retq
16 ;
17 ; AVX-LABEL: shuffle_v4i32_0001:
18 ; AVX: # %bb.0:
19 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
20 ; AVX-NEXT: retq
21 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
22 ret <4 x i32> %shuffle
23 }
24 define <4 x i32> @shuffle_v4i32_0020(<4 x i32> %a, <4 x i32> %b) {
25 ; SSE-LABEL: shuffle_v4i32_0020:
26 ; SSE: # %bb.0:
27 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,2,0]
28 ; SSE-NEXT: retq
29 ;
30 ; AVX-LABEL: shuffle_v4i32_0020:
31 ; AVX: # %bb.0:
32 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
33 ; AVX-NEXT: retq
34 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
35 ret <4 x i32> %shuffle
36 }
37 define <4 x i32> @shuffle_v4i32_0112(<4 x i32> %a, <4 x i32> %b) {
38 ; SSE-LABEL: shuffle_v4i32_0112:
39 ; SSE: # %bb.0:
40 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
41 ; SSE-NEXT: retq
42 ;
43 ; AVX-LABEL: shuffle_v4i32_0112:
44 ; AVX: # %bb.0:
45 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,2]
46 ; AVX-NEXT: retq
47 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 1, i32 2>
48 ret <4 x i32> %shuffle
49 }
50 define <4 x i32> @shuffle_v4i32_0300(<4 x i32> %a, <4 x i32> %b) {
51 ; SSE-LABEL: shuffle_v4i32_0300:
52 ; SSE: # %bb.0:
53 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,3,0,0]
54 ; SSE-NEXT: retq
55 ;
56 ; AVX-LABEL: shuffle_v4i32_0300:
57 ; AVX: # %bb.0:
58 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
59 ; AVX-NEXT: retq
60 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
61 ret <4 x i32> %shuffle
62 }
63 define <4 x i32> @shuffle_v4i32_1000(<4 x i32> %a, <4 x i32> %b) {
64 ; SSE-LABEL: shuffle_v4i32_1000:
65 ; SSE: # %bb.0:
66 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,0,0]
67 ; SSE-NEXT: retq
68 ;
69 ; AVX-LABEL: shuffle_v4i32_1000:
70 ; AVX: # %bb.0:
71 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
72 ; AVX-NEXT: retq
73 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
74 ret <4 x i32> %shuffle
75 }
76 define <4 x i32> @shuffle_v4i32_2200(<4 x i32> %a, <4 x i32> %b) {
77 ; SSE-LABEL: shuffle_v4i32_2200:
78 ; SSE: # %bb.0:
79 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,0,0]
80 ; SSE-NEXT: retq
81 ;
82 ; AVX-LABEL: shuffle_v4i32_2200:
83 ; AVX: # %bb.0:
84 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
85 ; AVX-NEXT: retq
86 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
87 ret <4 x i32> %shuffle
88 }
89 define <4 x i32> @shuffle_v4i32_3330(<4 x i32> %a, <4 x i32> %b) {
90 ; SSE-LABEL: shuffle_v4i32_3330:
91 ; SSE: # %bb.0:
92 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,3,3,0]
93 ; SSE-NEXT: retq
94 ;
95 ; AVX-LABEL: shuffle_v4i32_3330:
96 ; AVX: # %bb.0:
97 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
98 ; AVX-NEXT: retq
99 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
100 ret <4 x i32> %shuffle
101 }
102 define <4 x i32> @shuffle_v4i32_3210(<4 x i32> %a, <4 x i32> %b) {
103 ; SSE-LABEL: shuffle_v4i32_3210:
104 ; SSE: # %bb.0:
105 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,2,1,0]
106 ; SSE-NEXT: retq
107 ;
108 ; AVX-LABEL: shuffle_v4i32_3210:
109 ; AVX: # %bb.0:
110 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
111 ; AVX-NEXT: retq
112 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
113 ret <4 x i32> %shuffle
114 }
116 define <4 x i32> @shuffle_v4i32_2121(<4 x i32> %a, <4 x i32> %b) {
117 ; SSE-LABEL: shuffle_v4i32_2121:
118 ; SSE: # %bb.0:
119 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,1,2,1]
120 ; SSE-NEXT: retq
121 ;
122 ; AVX-LABEL: shuffle_v4i32_2121:
123 ; AVX: # %bb.0:
124 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,1,2,1]
125 ; AVX-NEXT: retq
126 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 1, i32 2, i32 1>
127 ret <4 x i32> %shuffle
128 }
130 define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
131 ; SSE-LABEL: shuffle_v4f32_0001:
132 ; SSE: # %bb.0:
133 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,1]
134 ; SSE-NEXT: retq
135 ;
136 ; AVX-LABEL: shuffle_v4f32_0001:
137 ; AVX: # %bb.0:
138 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,1]
139 ; AVX-NEXT: retq
140 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 0, i32 1>
141 ret <4 x float> %shuffle
142 }
143 define <4 x float> @shuffle_v4f32_0020(<4 x float> %a, <4 x float> %b) {
144 ; SSE-LABEL: shuffle_v4f32_0020:
145 ; SSE: # %bb.0:
146 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,0]
147 ; SSE-NEXT: retq
148 ;
149 ; AVX-LABEL: shuffle_v4f32_0020:
150 ; AVX: # %bb.0:
151 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,2,0]
152 ; AVX-NEXT: retq
153 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 0>
154 ret <4 x float> %shuffle
155 }
156 define <4 x float> @shuffle_v4f32_0300(<4 x float> %a, <4 x float> %b) {
157 ; SSE-LABEL: shuffle_v4f32_0300:
158 ; SSE: # %bb.0:
159 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3,0,0]
160 ; SSE-NEXT: retq
161 ;
162 ; AVX-LABEL: shuffle_v4f32_0300:
163 ; AVX: # %bb.0:
164 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,3,0,0]
165 ; AVX-NEXT: retq
166 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 3, i32 0, i32 0>
167 ret <4 x float> %shuffle
168 }
169 define <4 x float> @shuffle_v4f32_1000(<4 x float> %a, <4 x float> %b) {
170 ; SSE-LABEL: shuffle_v4f32_1000:
171 ; SSE: # %bb.0:
172 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,0,0,0]
173 ; SSE-NEXT: retq
174 ;
175 ; AVX-LABEL: shuffle_v4f32_1000:
176 ; AVX: # %bb.0:
177 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,0,0]
178 ; AVX-NEXT: retq
179 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 0, i32 0, i32 0>
180 ret <4 x float> %shuffle
181 }
182 define <4 x float> @shuffle_v4f32_2200(<4 x float> %a, <4 x float> %b) {
183 ; SSE-LABEL: shuffle_v4f32_2200:
184 ; SSE: # %bb.0:
185 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,2,0,0]
186 ; SSE-NEXT: retq
187 ;
188 ; AVX-LABEL: shuffle_v4f32_2200:
189 ; AVX: # %bb.0:
190 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,0,0]
191 ; AVX-NEXT: retq
192 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 0, i32 0>
193 ret <4 x float> %shuffle
194 }
195 define <4 x float> @shuffle_v4f32_3330(<4 x float> %a, <4 x float> %b) {
196 ; SSE-LABEL: shuffle_v4f32_3330:
197 ; SSE: # %bb.0:
198 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,3,3,0]
199 ; SSE-NEXT: retq
200 ;
201 ; AVX-LABEL: shuffle_v4f32_3330:
202 ; AVX: # %bb.0:
203 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,3,3,0]
204 ; AVX-NEXT: retq
205 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 3, i32 3, i32 0>
206 ret <4 x float> %shuffle
207 }
208 define <4 x float> @shuffle_v4f32_3210(<4 x float> %a, <4 x float> %b) {
209 ; SSE-LABEL: shuffle_v4f32_3210:
210 ; SSE: # %bb.0:
211 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
212 ; SSE-NEXT: retq
213 ;
214 ; AVX-LABEL: shuffle_v4f32_3210:
215 ; AVX: # %bb.0:
216 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[3,2,1,0]
217 ; AVX-NEXT: retq
218 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
219 ret <4 x float> %shuffle
220 }
221 define <4 x float> @shuffle_v4f32_0011(<4 x float> %a, <4 x float> %b) {
222 ; SSE-LABEL: shuffle_v4f32_0011:
223 ; SSE: # %bb.0:
224 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
225 ; SSE-NEXT: retq
226 ;
227 ; AVX-LABEL: shuffle_v4f32_0011:
228 ; AVX: # %bb.0:
229 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
230 ; AVX-NEXT: retq
231 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
232 ret <4 x float> %shuffle
233 }
234 define <4 x float> @shuffle_v4f32_2233(<4 x float> %a, <4 x float> %b) {
235 ; SSE-LABEL: shuffle_v4f32_2233:
236 ; SSE: # %bb.0:
237 ; SSE-NEXT: unpckhps {{.*#+}} xmm0 = xmm0[2,2,3,3]
238 ; SSE-NEXT: retq
239 ;
240 ; AVX-LABEL: shuffle_v4f32_2233:
241 ; AVX: # %bb.0:
242 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
243 ; AVX-NEXT: retq
244 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 2, i32 2, i32 3, i32 3>
245 ret <4 x float> %shuffle
246 }
247 define <4 x float> @shuffle_v4f32_0022(<4 x float> %a, <4 x float> %b) {
248 ; SSE2-LABEL: shuffle_v4f32_0022:
249 ; SSE2: # %bb.0:
250 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,2,2]
251 ; SSE2-NEXT: retq
252 ;
253 ; SSE3-LABEL: shuffle_v4f32_0022:
254 ; SSE3: # %bb.0:
255 ; SSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
256 ; SSE3-NEXT: retq
257 ;
258 ; SSSE3-LABEL: shuffle_v4f32_0022:
259 ; SSSE3: # %bb.0:
260 ; SSSE3-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
261 ; SSSE3-NEXT: retq
262 ;
263 ; SSE41-LABEL: shuffle_v4f32_0022:
264 ; SSE41: # %bb.0:
265 ; SSE41-NEXT: movsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
266 ; SSE41-NEXT: retq
267 ;
268 ; AVX-LABEL: shuffle_v4f32_0022:
269 ; AVX: # %bb.0:
270 ; AVX-NEXT: vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
271 ; AVX-NEXT: retq
272 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
273 ret <4 x float> %shuffle
274 }
275 define <4 x float> @shuffle_v4f32_1133(<4 x float> %a, <4 x float> %b) {
276 ; SSE2-LABEL: shuffle_v4f32_1133:
277 ; SSE2: # %bb.0:
278 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,1,3,3]
279 ; SSE2-NEXT: retq
280 ;
281 ; SSE3-LABEL: shuffle_v4f32_1133:
282 ; SSE3: # %bb.0:
283 ; SSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
284 ; SSE3-NEXT: retq
285 ;
286 ; SSSE3-LABEL: shuffle_v4f32_1133:
287 ; SSSE3: # %bb.0:
288 ; SSSE3-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
289 ; SSSE3-NEXT: retq
290 ;
291 ; SSE41-LABEL: shuffle_v4f32_1133:
292 ; SSE41: # %bb.0:
293 ; SSE41-NEXT: movshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
294 ; SSE41-NEXT: retq
295 ;
296 ; AVX-LABEL: shuffle_v4f32_1133:
297 ; AVX: # %bb.0:
298 ; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
299 ; AVX-NEXT: retq
300 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
301 ret <4 x float> %shuffle
302 }
304 define <4 x float> @shuffle_v4f32_0145(<4 x float> %a, <4 x float> %b) {
305 ; SSE-LABEL: shuffle_v4f32_0145:
306 ; SSE: # %bb.0:
307 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
308 ; SSE-NEXT: retq
309 ;
310 ; AVX-LABEL: shuffle_v4f32_0145:
311 ; AVX: # %bb.0:
312 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
313 ; AVX-NEXT: retq
314 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
315 ret <4 x float> %shuffle
316 }
318 define <4 x float> @shuffle_v4f32_6723(<4 x float> %a, <4 x float> %b) {
319 ; SSE-LABEL: shuffle_v4f32_6723:
320 ; SSE: # %bb.0:
321 ; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm1[1],xmm0[1]
322 ; SSE-NEXT: retq
323 ;
324 ; AVX-LABEL: shuffle_v4f32_6723:
325 ; AVX: # %bb.0:
326 ; AVX-NEXT: vunpckhpd {{.*#+}} xmm0 = xmm1[1],xmm0[1]
327 ; AVX-NEXT: retq
328 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 6, i32 7, i32 2, i32 3>
329 ret <4 x float> %shuffle
330 }
332 define <4 x i32> @shuffle_v4i32_0124(<4 x i32> %a, <4 x i32> %b) {
333 ; SSE2-LABEL: shuffle_v4i32_0124:
334 ; SSE2: # %bb.0:
335 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
336 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
337 ; SSE2-NEXT: retq
338 ;
339 ; SSE3-LABEL: shuffle_v4i32_0124:
340 ; SSE3: # %bb.0:
341 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
342 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
343 ; SSE3-NEXT: retq
344 ;
345 ; SSSE3-LABEL: shuffle_v4i32_0124:
346 ; SSSE3: # %bb.0:
347 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
348 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
349 ; SSSE3-NEXT: retq
350 ;
351 ; SSE41-LABEL: shuffle_v4i32_0124:
352 ; SSE41: # %bb.0:
353 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,0]
354 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,5],xmm1[6,7]
355 ; SSE41-NEXT: retq
356 ;
357 ; AVX1-LABEL: shuffle_v4i32_0124:
358 ; AVX1: # %bb.0:
359 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,2,0]
360 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
361 ; AVX1-NEXT: retq
362 ;
363 ; AVX2-LABEL: shuffle_v4i32_0124:
364 ; AVX2: # %bb.0:
365 ; AVX2-NEXT: vbroadcastss %xmm1, %xmm1
366 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
367 ; AVX2-NEXT: retq
368 ;
369 ; AVX512VL-LABEL: shuffle_v4i32_0124:
370 ; AVX512VL: # %bb.0:
371 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,2,4]
372 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
373 ; AVX512VL-NEXT: retq
374 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 2, i32 4>
375 ret <4 x i32> %shuffle
376 }
377 define <4 x i32> @shuffle_v4i32_0142(<4 x i32> %a, <4 x i32> %b) {
378 ; SSE2-LABEL: shuffle_v4i32_0142:
379 ; SSE2: # %bb.0:
380 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
381 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
382 ; SSE2-NEXT: retq
383 ;
384 ; SSE3-LABEL: shuffle_v4i32_0142:
385 ; SSE3: # %bb.0:
386 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
387 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
388 ; SSE3-NEXT: retq
389 ;
390 ; SSSE3-LABEL: shuffle_v4i32_0142:
391 ; SSSE3: # %bb.0:
392 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
393 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
394 ; SSSE3-NEXT: retq
395 ;
396 ; SSE41-LABEL: shuffle_v4i32_0142:
397 ; SSE41: # %bb.0:
398 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
399 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
400 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
401 ; SSE41-NEXT: retq
402 ;
403 ; AVX1-LABEL: shuffle_v4i32_0142:
404 ; AVX1: # %bb.0:
405 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,0,1]
406 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,2,2]
407 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
408 ; AVX1-NEXT: retq
409 ;
410 ; AVX2-LABEL: shuffle_v4i32_0142:
411 ; AVX2: # %bb.0:
412 ; AVX2-NEXT: vbroadcastss %xmm1, %xmm1
413 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,2,2]
414 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
415 ; AVX2-NEXT: retq
416 ;
417 ; AVX512VL-LABEL: shuffle_v4i32_0142:
418 ; AVX512VL: # %bb.0:
419 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,2]
420 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
421 ; AVX512VL-NEXT: retq
422 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 2>
423 ret <4 x i32> %shuffle
424 }
425 define <4 x i32> @shuffle_v4i32_0412(<4 x i32> %a, <4 x i32> %b) {
426 ; SSE2-LABEL: shuffle_v4i32_0412:
427 ; SSE2: # %bb.0:
428 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
429 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
430 ; SSE2-NEXT: movaps %xmm1, %xmm0
431 ; SSE2-NEXT: retq
432 ;
433 ; SSE3-LABEL: shuffle_v4i32_0412:
434 ; SSE3: # %bb.0:
435 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
436 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
437 ; SSE3-NEXT: movaps %xmm1, %xmm0
438 ; SSE3-NEXT: retq
439 ;
440 ; SSSE3-LABEL: shuffle_v4i32_0412:
441 ; SSSE3: # %bb.0:
442 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
443 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[1,2]
444 ; SSSE3-NEXT: movaps %xmm1, %xmm0
445 ; SSSE3-NEXT: retq
446 ;
447 ; SSE41-LABEL: shuffle_v4i32_0412:
448 ; SSE41: # %bb.0:
449 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
450 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,2]
451 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
452 ; SSE41-NEXT: retq
453 ;
454 ; AVX1-LABEL: shuffle_v4i32_0412:
455 ; AVX1: # %bb.0:
456 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,1]
457 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,2]
458 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
459 ; AVX1-NEXT: retq
460 ;
461 ; AVX2-LABEL: shuffle_v4i32_0412:
462 ; AVX2: # %bb.0:
463 ; AVX2-NEXT: vbroadcastss %xmm1, %xmm1
464 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,1,2]
465 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
466 ; AVX2-NEXT: retq
467 ;
468 ; AVX512VL-LABEL: shuffle_v4i32_0412:
469 ; AVX512VL: # %bb.0:
470 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,4,1,2]
471 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
472 ; AVX512VL-NEXT: retq
473 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 1, i32 2>
474 ret <4 x i32> %shuffle
475 }
476 define <4 x i32> @shuffle_v4i32_4012(<4 x i32> %a, <4 x i32> %b) {
477 ; SSE2-LABEL: shuffle_v4i32_4012:
478 ; SSE2: # %bb.0:
479 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
480 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
481 ; SSE2-NEXT: movaps %xmm1, %xmm0
482 ; SSE2-NEXT: retq
483 ;
484 ; SSE3-LABEL: shuffle_v4i32_4012:
485 ; SSE3: # %bb.0:
486 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
487 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
488 ; SSE3-NEXT: movaps %xmm1, %xmm0
489 ; SSE3-NEXT: retq
490 ;
491 ; SSSE3-LABEL: shuffle_v4i32_4012:
492 ; SSSE3: # %bb.0:
493 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
494 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
495 ; SSSE3-NEXT: movaps %xmm1, %xmm0
496 ; SSSE3-NEXT: retq
497 ;
498 ; SSE41-LABEL: shuffle_v4i32_4012:
499 ; SSE41: # %bb.0:
500 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,2]
501 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
502 ; SSE41-NEXT: retq
503 ;
504 ; AVX1OR2-LABEL: shuffle_v4i32_4012:
505 ; AVX1OR2: # %bb.0:
506 ; AVX1OR2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,2]
507 ; AVX1OR2-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2,3]
508 ; AVX1OR2-NEXT: retq
509 ;
510 ; AVX512VL-LABEL: shuffle_v4i32_4012:
511 ; AVX512VL: # %bb.0:
512 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [4,0,1,2]
513 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
514 ; AVX512VL-NEXT: retq
515 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 2>
516 ret <4 x i32> %shuffle
517 }
518 define <4 x i32> @shuffle_v4i32_0145(<4 x i32> %a, <4 x i32> %b) {
519 ; SSE-LABEL: shuffle_v4i32_0145:
520 ; SSE: # %bb.0:
521 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
522 ; SSE-NEXT: retq
523 ;
524 ; AVX-LABEL: shuffle_v4i32_0145:
525 ; AVX: # %bb.0:
526 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
527 ; AVX-NEXT: retq
528 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
529 ret <4 x i32> %shuffle
530 }
531 define <4 x i32> @shuffle_v4i32_0451(<4 x i32> %a, <4 x i32> %b) {
532 ; SSE2-LABEL: shuffle_v4i32_0451:
533 ; SSE2: # %bb.0:
534 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
535 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
536 ; SSE2-NEXT: retq
537 ;
538 ; SSE3-LABEL: shuffle_v4i32_0451:
539 ; SSE3: # %bb.0:
540 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
541 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
542 ; SSE3-NEXT: retq
543 ;
544 ; SSSE3-LABEL: shuffle_v4i32_0451:
545 ; SSSE3: # %bb.0:
546 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
547 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,3,2]
548 ; SSSE3-NEXT: retq
549 ;
550 ; SSE41-LABEL: shuffle_v4i32_0451:
551 ; SSE41: # %bb.0:
552 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,1,1]
553 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,0,1]
554 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3,4,5],xmm0[6,7]
555 ; SSE41-NEXT: retq
556 ;
557 ; AVX1-LABEL: shuffle_v4i32_0451:
558 ; AVX1: # %bb.0:
559 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,1]
560 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,1,0,1]
561 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
562 ; AVX1-NEXT: retq
563 ;
564 ; AVX2-LABEL: shuffle_v4i32_0451:
565 ; AVX2: # %bb.0:
566 ; AVX2-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,0,1,1]
567 ; AVX2-NEXT: vmovddup {{.*#+}} xmm0 = xmm0[0,0]
568 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
569 ; AVX2-NEXT: retq
570 ;
571 ; AVX512VL-LABEL: shuffle_v4i32_0451:
572 ; AVX512VL: # %bb.0:
573 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [0,4,5,1]
574 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
575 ; AVX512VL-NEXT: retq
576 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 4, i32 5, i32 1>
577 ret <4 x i32> %shuffle
578 }
579 define <4 x i32> @shuffle_v4i32_4501(<4 x i32> %a, <4 x i32> %b) {
580 ; SSE-LABEL: shuffle_v4i32_4501:
581 ; SSE: # %bb.0:
582 ; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
583 ; SSE-NEXT: movaps %xmm1, %xmm0
584 ; SSE-NEXT: retq
585 ;
586 ; AVX-LABEL: shuffle_v4i32_4501:
587 ; AVX: # %bb.0:
588 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
589 ; AVX-NEXT: retq
590 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
591 ret <4 x i32> %shuffle
592 }
593 define <4 x i32> @shuffle_v4i32_4015(<4 x i32> %a, <4 x i32> %b) {
594 ; SSE2-LABEL: shuffle_v4i32_4015:
595 ; SSE2: # %bb.0:
596 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
597 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
598 ; SSE2-NEXT: retq
599 ;
600 ; SSE3-LABEL: shuffle_v4i32_4015:
601 ; SSE3: # %bb.0:
602 ; SSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
603 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
604 ; SSE3-NEXT: retq
605 ;
606 ; SSSE3-LABEL: shuffle_v4i32_4015:
607 ; SSSE3: # %bb.0:
608 ; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
609 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,2,3]
610 ; SSSE3-NEXT: retq
611 ;
612 ; SSE41-LABEL: shuffle_v4i32_4015:
613 ; SSE41: # %bb.0:
614 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1]
615 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
616 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5],xmm1[6,7]
617 ; SSE41-NEXT: retq
618 ;
619 ; AVX1-LABEL: shuffle_v4i32_4015:
620 ; AVX1: # %bb.0:
621 ; AVX1-NEXT: vpermilps {{.*#+}} xmm1 = xmm1[0,1,0,1]
622 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
623 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
624 ; AVX1-NEXT: retq
625 ;
626 ; AVX2-LABEL: shuffle_v4i32_4015:
627 ; AVX2: # %bb.0:
628 ; AVX2-NEXT: vmovddup {{.*#+}} xmm1 = xmm1[0,0]
629 ; AVX2-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
630 ; AVX2-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
631 ; AVX2-NEXT: retq
632 ;
633 ; AVX512VL-LABEL: shuffle_v4i32_4015:
634 ; AVX512VL: # %bb.0:
635 ; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [4,0,1,5]
636 ; AVX512VL-NEXT: vpermt2d %xmm1, %xmm2, %xmm0
637 ; AVX512VL-NEXT: retq
638 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 1, i32 5>
639 ret <4 x i32> %shuffle
640 }
642 define <4 x float> @shuffle_v4f32_4zzz(<4 x float> %a) {
643 ; SSE2-LABEL: shuffle_v4f32_4zzz:
644 ; SSE2: # %bb.0:
645 ; SSE2-NEXT: xorps %xmm1, %xmm1
646 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
647 ; SSE2-NEXT: movaps %xmm1, %xmm0
648 ; SSE2-NEXT: retq
649 ;
650 ; SSE3-LABEL: shuffle_v4f32_4zzz:
651 ; SSE3: # %bb.0:
652 ; SSE3-NEXT: xorps %xmm1, %xmm1
653 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
654 ; SSE3-NEXT: movaps %xmm1, %xmm0
655 ; SSE3-NEXT: retq
656 ;
657 ; SSSE3-LABEL: shuffle_v4f32_4zzz:
658 ; SSSE3: # %bb.0:
659 ; SSSE3-NEXT: xorps %xmm1, %xmm1
660 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
661 ; SSSE3-NEXT: movaps %xmm1, %xmm0
662 ; SSSE3-NEXT: retq
663 ;
664 ; SSE41-LABEL: shuffle_v4f32_4zzz:
665 ; SSE41: # %bb.0:
666 ; SSE41-NEXT: xorps %xmm1, %xmm1
667 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
668 ; SSE41-NEXT: retq
669 ;
670 ; AVX-LABEL: shuffle_v4f32_4zzz:
671 ; AVX: # %bb.0:
672 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
673 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
674 ; AVX-NEXT: retq
675 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
676 ret <4 x float> %shuffle
677 }
679 define <4 x float> @shuffle_v4f32_z4zz(<4 x float> %a) {
680 ; SSE2-LABEL: shuffle_v4f32_z4zz:
681 ; SSE2: # %bb.0:
682 ; SSE2-NEXT: xorps %xmm1, %xmm1
683 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
684 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
685 ; SSE2-NEXT: retq
686 ;
687 ; SSE3-LABEL: shuffle_v4f32_z4zz:
688 ; SSE3: # %bb.0:
689 ; SSE3-NEXT: xorps %xmm1, %xmm1
690 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
691 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
692 ; SSE3-NEXT: retq
693 ;
694 ; SSSE3-LABEL: shuffle_v4f32_z4zz:
695 ; SSSE3: # %bb.0:
696 ; SSSE3-NEXT: xorps %xmm1, %xmm1
697 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,0]
698 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
699 ; SSSE3-NEXT: retq
700 ;
701 ; SSE41-LABEL: shuffle_v4f32_z4zz:
702 ; SSE41: # %bb.0:
703 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
704 ; SSE41-NEXT: retq
705 ;
706 ; AVX-LABEL: shuffle_v4f32_z4zz:
707 ; AVX: # %bb.0:
708 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[0],zero,zero
709 ; AVX-NEXT: retq
710 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
711 ret <4 x float> %shuffle
712 }
714 define <4 x float> @shuffle_v4f32_zz4z(<4 x float> %a) {
715 ; SSE2-LABEL: shuffle_v4f32_zz4z:
716 ; SSE2: # %bb.0:
717 ; SSE2-NEXT: xorps %xmm1, %xmm1
718 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
719 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
720 ; SSE2-NEXT: movaps %xmm1, %xmm0
721 ; SSE2-NEXT: retq
722 ;
723 ; SSE3-LABEL: shuffle_v4f32_zz4z:
724 ; SSE3: # %bb.0:
725 ; SSE3-NEXT: xorps %xmm1, %xmm1
726 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
727 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
728 ; SSE3-NEXT: movaps %xmm1, %xmm0
729 ; SSE3-NEXT: retq
730 ;
731 ; SSSE3-LABEL: shuffle_v4f32_zz4z:
732 ; SSSE3: # %bb.0:
733 ; SSSE3-NEXT: xorps %xmm1, %xmm1
734 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
735 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
736 ; SSSE3-NEXT: movaps %xmm1, %xmm0
737 ; SSSE3-NEXT: retq
738 ;
739 ; SSE41-LABEL: shuffle_v4f32_zz4z:
740 ; SSE41: # %bb.0:
741 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
742 ; SSE41-NEXT: retq
743 ;
744 ; AVX-LABEL: shuffle_v4f32_zz4z:
745 ; AVX: # %bb.0:
746 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,xmm0[0],zero
747 ; AVX-NEXT: retq
748 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
749 ret <4 x float> %shuffle
750 }
752 define <4 x float> @shuffle_v4f32_zuu4(<4 x float> %a) {
753 ; SSE2-LABEL: shuffle_v4f32_zuu4:
754 ; SSE2: # %bb.0:
755 ; SSE2-NEXT: xorps %xmm1, %xmm1
756 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
757 ; SSE2-NEXT: movaps %xmm1, %xmm0
758 ; SSE2-NEXT: retq
759 ;
760 ; SSE3-LABEL: shuffle_v4f32_zuu4:
761 ; SSE3: # %bb.0:
762 ; SSE3-NEXT: xorps %xmm1, %xmm1
763 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
764 ; SSE3-NEXT: movaps %xmm1, %xmm0
765 ; SSE3-NEXT: retq
766 ;
767 ; SSSE3-LABEL: shuffle_v4f32_zuu4:
768 ; SSSE3: # %bb.0:
769 ; SSSE3-NEXT: xorps %xmm1, %xmm1
770 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
771 ; SSSE3-NEXT: movaps %xmm1, %xmm0
772 ; SSSE3-NEXT: retq
773 ;
774 ; SSE41-LABEL: shuffle_v4f32_zuu4:
775 ; SSE41: # %bb.0:
776 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
777 ; SSE41-NEXT: retq
778 ;
779 ; AVX-LABEL: shuffle_v4f32_zuu4:
780 ; AVX: # %bb.0:
781 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,zero,zero,xmm0[0]
782 ; AVX-NEXT: retq
783 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
784 ret <4 x float> %shuffle
785 }
787 define <4 x float> @shuffle_v4f32_zzz7(<4 x float> %a) {
788 ; SSE2-LABEL: shuffle_v4f32_zzz7:
789 ; SSE2: # %bb.0:
790 ; SSE2-NEXT: xorps %xmm1, %xmm1
791 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
792 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
793 ; SSE2-NEXT: movaps %xmm1, %xmm0
794 ; SSE2-NEXT: retq
795 ;
796 ; SSE3-LABEL: shuffle_v4f32_zzz7:
797 ; SSE3: # %bb.0:
798 ; SSE3-NEXT: xorps %xmm1, %xmm1
799 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
800 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
801 ; SSE3-NEXT: movaps %xmm1, %xmm0
802 ; SSE3-NEXT: retq
803 ;
804 ; SSSE3-LABEL: shuffle_v4f32_zzz7:
805 ; SSSE3: # %bb.0:
806 ; SSSE3-NEXT: xorps %xmm1, %xmm1
807 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
808 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
809 ; SSSE3-NEXT: movaps %xmm1, %xmm0
810 ; SSSE3-NEXT: retq
811 ;
812 ; SSE41-LABEL: shuffle_v4f32_zzz7:
813 ; SSE41: # %bb.0:
814 ; SSE41-NEXT: xorps %xmm1, %xmm1
815 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
816 ; SSE41-NEXT: retq
817 ;
818 ; AVX-LABEL: shuffle_v4f32_zzz7:
819 ; AVX: # %bb.0:
820 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
821 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
822 ; AVX-NEXT: retq
823 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
824 ret <4 x float> %shuffle
825 }
827 define <4 x float> @shuffle_v4f32_z6zz(<4 x float> %a) {
828 ; SSE2-LABEL: shuffle_v4f32_z6zz:
829 ; SSE2: # %bb.0:
830 ; SSE2-NEXT: xorps %xmm1, %xmm1
831 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
832 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
833 ; SSE2-NEXT: retq
834 ;
835 ; SSE3-LABEL: shuffle_v4f32_z6zz:
836 ; SSE3: # %bb.0:
837 ; SSE3-NEXT: xorps %xmm1, %xmm1
838 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
839 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
840 ; SSE3-NEXT: retq
841 ;
842 ; SSSE3-LABEL: shuffle_v4f32_z6zz:
843 ; SSSE3: # %bb.0:
844 ; SSSE3-NEXT: xorps %xmm1, %xmm1
845 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
846 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
847 ; SSSE3-NEXT: retq
848 ;
849 ; SSE41-LABEL: shuffle_v4f32_z6zz:
850 ; SSE41: # %bb.0:
851 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
852 ; SSE41-NEXT: retq
853 ;
854 ; AVX-LABEL: shuffle_v4f32_z6zz:
855 ; AVX: # %bb.0:
856 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = zero,xmm0[2],zero,zero
857 ; AVX-NEXT: retq
858 %shuffle = shufflevector <4 x float> zeroinitializer, <4 x float> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
859 ret <4 x float> %shuffle
860 }
862 define <4 x float> @shuffle_v4f32_0z23(<4 x float> %a) {
863 ; SSE2-LABEL: shuffle_v4f32_0z23:
864 ; SSE2: # %bb.0:
865 ; SSE2-NEXT: xorps %xmm1, %xmm1
866 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
867 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
868 ; SSE2-NEXT: movaps %xmm1, %xmm0
869 ; SSE2-NEXT: retq
870 ;
871 ; SSE3-LABEL: shuffle_v4f32_0z23:
872 ; SSE3: # %bb.0:
873 ; SSE3-NEXT: xorps %xmm1, %xmm1
874 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
875 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
876 ; SSE3-NEXT: movaps %xmm1, %xmm0
877 ; SSE3-NEXT: retq
878 ;
879 ; SSSE3-LABEL: shuffle_v4f32_0z23:
880 ; SSSE3: # %bb.0:
881 ; SSSE3-NEXT: xorps %xmm1, %xmm1
882 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,0]
883 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[2,3]
884 ; SSSE3-NEXT: movaps %xmm1, %xmm0
885 ; SSSE3-NEXT: retq
886 ;
887 ; SSE41-LABEL: shuffle_v4f32_0z23:
888 ; SSE41: # %bb.0:
889 ; SSE41-NEXT: xorps %xmm1, %xmm1
890 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
891 ; SSE41-NEXT: retq
892 ;
893 ; AVX-LABEL: shuffle_v4f32_0z23:
894 ; AVX: # %bb.0:
895 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
896 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
897 ; AVX-NEXT: retq
898 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
899 ret <4 x float> %shuffle
900 }
902 define <4 x float> @shuffle_v4f32_01z3(<4 x float> %a) {
903 ; SSE2-LABEL: shuffle_v4f32_01z3:
904 ; SSE2: # %bb.0:
905 ; SSE2-NEXT: xorps %xmm1, %xmm1
906 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
907 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
908 ; SSE2-NEXT: retq
909 ;
910 ; SSE3-LABEL: shuffle_v4f32_01z3:
911 ; SSE3: # %bb.0:
912 ; SSE3-NEXT: xorps %xmm1, %xmm1
913 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
914 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
915 ; SSE3-NEXT: retq
916 ;
917 ; SSSE3-LABEL: shuffle_v4f32_01z3:
918 ; SSSE3: # %bb.0:
919 ; SSSE3-NEXT: xorps %xmm1, %xmm1
920 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0],xmm0[3,0]
921 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,2]
922 ; SSSE3-NEXT: retq
923 ;
924 ; SSE41-LABEL: shuffle_v4f32_01z3:
925 ; SSE41: # %bb.0:
926 ; SSE41-NEXT: xorps %xmm1, %xmm1
927 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
928 ; SSE41-NEXT: retq
929 ;
930 ; AVX-LABEL: shuffle_v4f32_01z3:
931 ; AVX: # %bb.0:
932 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
933 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
934 ; AVX-NEXT: retq
935 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
936 ret <4 x float> %shuffle
937 }
939 define <4 x float> @shuffle_v4f32_012z(<4 x float> %a) {
940 ; SSE2-LABEL: shuffle_v4f32_012z:
941 ; SSE2: # %bb.0:
942 ; SSE2-NEXT: xorps %xmm1, %xmm1
943 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
944 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
945 ; SSE2-NEXT: retq
946 ;
947 ; SSE3-LABEL: shuffle_v4f32_012z:
948 ; SSE3: # %bb.0:
949 ; SSE3-NEXT: xorps %xmm1, %xmm1
950 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
951 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
952 ; SSE3-NEXT: retq
953 ;
954 ; SSSE3-LABEL: shuffle_v4f32_012z:
955 ; SSSE3: # %bb.0:
956 ; SSSE3-NEXT: xorps %xmm1, %xmm1
957 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[2,0]
958 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0]
959 ; SSSE3-NEXT: retq
960 ;
961 ; SSE41-LABEL: shuffle_v4f32_012z:
962 ; SSE41: # %bb.0:
963 ; SSE41-NEXT: xorps %xmm1, %xmm1
964 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
965 ; SSE41-NEXT: retq
966 ;
967 ; AVX-LABEL: shuffle_v4f32_012z:
968 ; AVX: # %bb.0:
969 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
970 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
971 ; AVX-NEXT: retq
972 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
973 ret <4 x float> %shuffle
974 }
976 define <4 x float> @shuffle_v4f32_0zz3(<4 x float> %a) {
977 ; SSE2-LABEL: shuffle_v4f32_0zz3:
978 ; SSE2: # %bb.0:
979 ; SSE2-NEXT: xorps %xmm1, %xmm1
980 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
981 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
982 ; SSE2-NEXT: retq
983 ;
984 ; SSE3-LABEL: shuffle_v4f32_0zz3:
985 ; SSE3: # %bb.0:
986 ; SSE3-NEXT: xorps %xmm1, %xmm1
987 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
988 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
989 ; SSE3-NEXT: retq
990 ;
991 ; SSSE3-LABEL: shuffle_v4f32_0zz3:
992 ; SSSE3: # %bb.0:
993 ; SSSE3-NEXT: xorps %xmm1, %xmm1
994 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm1[1,2]
995 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,3,1]
996 ; SSSE3-NEXT: retq
997 ;
998 ; SSE41-LABEL: shuffle_v4f32_0zz3:
999 ; SSE41: # %bb.0:
1000 ; SSE41-NEXT: xorps %xmm1, %xmm1
1001 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1002 ; SSE41-NEXT: retq
1003 ;
1004 ; AVX-LABEL: shuffle_v4f32_0zz3:
1005 ; AVX: # %bb.0:
1006 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1007 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1008 ; AVX-NEXT: retq
1009 %shuffle = shufflevector <4 x float> %a, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
1010 ret <4 x float> %shuffle
1011 }
1013 define <4 x float> @shuffle_v4f32_0z2z(<4 x float> %v) {
1014 ; SSE2-LABEL: shuffle_v4f32_0z2z:
1015 ; SSE2: # %bb.0:
1016 ; SSE2-NEXT: xorps %xmm1, %xmm1
1017 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
1018 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1019 ; SSE2-NEXT: retq
1020 ;
1021 ; SSE3-LABEL: shuffle_v4f32_0z2z:
1022 ; SSE3: # %bb.0:
1023 ; SSE3-NEXT: xorps %xmm1, %xmm1
1024 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
1025 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1026 ; SSE3-NEXT: retq
1027 ;
1028 ; SSSE3-LABEL: shuffle_v4f32_0z2z:
1029 ; SSSE3: # %bb.0:
1030 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1031 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
1032 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2,1,3]
1033 ; SSSE3-NEXT: retq
1034 ;
1035 ; SSE41-LABEL: shuffle_v4f32_0z2z:
1036 ; SSE41: # %bb.0:
1037 ; SSE41-NEXT: xorps %xmm1, %xmm1
1038 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
1039 ; SSE41-NEXT: retq
1040 ;
1041 ; AVX-LABEL: shuffle_v4f32_0z2z:
1042 ; AVX: # %bb.0:
1043 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1044 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3]
1045 ; AVX-NEXT: retq
1046 %shuffle = shufflevector <4 x float> %v, <4 x float> <float 0.000000e+00, float undef, float undef, float undef>, <4 x i32> <i32 0, i32 4, i32 2, i32 4>
1047 ret <4 x float> %shuffle
1048 }
1050 define <4 x float> @shuffle_v4f32_u051(<4 x float> %a, <4 x float> %b) {
1051 ; SSE-LABEL: shuffle_v4f32_u051:
1052 ; SSE: # %bb.0:
1053 ; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1054 ; SSE-NEXT: movaps %xmm1, %xmm0
1055 ; SSE-NEXT: retq
1056 ;
1057 ; AVX-LABEL: shuffle_v4f32_u051:
1058 ; AVX: # %bb.0:
1059 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1060 ; AVX-NEXT: retq
1061 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 undef, i32 0, i32 5, i32 1>
1062 ret <4 x float> %shuffle
1063 }
1065 define <4 x float> @shuffle_v4f32_0zz4(<4 x float> %a, <4 x float> %b) {
1066 ; SSE2-LABEL: shuffle_v4f32_0zz4:
1067 ; SSE2: # %bb.0:
1068 ; SSE2-NEXT: xorps %xmm2, %xmm2
1069 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[2,0]
1070 ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,0]
1071 ; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3]
1072 ; SSE2-NEXT: movaps %xmm2, %xmm0
1073 ; SSE2-NEXT: retq
1074 ;
1075 ; SSE3-LABEL: shuffle_v4f32_0zz4:
1076 ; SSE3: # %bb.0:
1077 ; SSE3-NEXT: xorps %xmm2, %xmm2
1078 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[2,0]
1079 ; SSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,0]
1080 ; SSE3-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3]
1081 ; SSE3-NEXT: movaps %xmm2, %xmm0
1082 ; SSE3-NEXT: retq
1083 ;
1084 ; SSSE3-LABEL: shuffle_v4f32_0zz4:
1085 ; SSSE3: # %bb.0:
1086 ; SSSE3-NEXT: xorps %xmm2, %xmm2
1087 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm2[2,0]
1088 ; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,0]
1089 ; SSSE3-NEXT: movss {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3]
1090 ; SSSE3-NEXT: movaps %xmm2, %xmm0
1091 ; SSSE3-NEXT: retq
1092 ;
1093 ; SSE41-LABEL: shuffle_v4f32_0zz4:
1094 ; SSE41: # %bb.0:
1095 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[0]
1096 ; SSE41-NEXT: retq
1097 ;
1098 ; AVX-LABEL: shuffle_v4f32_0zz4:
1099 ; AVX: # %bb.0:
1100 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[0]
1101 ; AVX-NEXT: retq
1102 %shuffle = shufflevector <4 x float> %b, <4 x float> zeroinitializer, <4 x i32> <i32 undef, i32 5, i32 6, i32 0>
1103 %shuffle1 = shufflevector <4 x float> %a, <4 x float> %shuffle, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
1104 ret <4 x float> %shuffle1
1105 }
1107 define <4 x float> @shuffle_v4f32_0zz6(<4 x float> %a, <4 x float> %b) {
1108 ; SSE2-LABEL: shuffle_v4f32_0zz6:
1109 ; SSE2: # %bb.0:
1110 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
1111 ; SSE2-NEXT: xorps %xmm1, %xmm1
1112 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[0,3]
1113 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0,1,3]
1114 ; SSE2-NEXT: movaps %xmm1, %xmm0
1115 ; SSE2-NEXT: retq
1116 ;
1117 ; SSE3-LABEL: shuffle_v4f32_0zz6:
1118 ; SSE3: # %bb.0:
1119 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
1120 ; SSE3-NEXT: xorps %xmm1, %xmm1
1121 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[0,3]
1122 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0,1,3]
1123 ; SSE3-NEXT: movaps %xmm1, %xmm0
1124 ; SSE3-NEXT: retq
1125 ;
1126 ; SSSE3-LABEL: shuffle_v4f32_0zz6:
1127 ; SSSE3: # %bb.0:
1128 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,2]
1129 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1130 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[0,3]
1131 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,0,1,3]
1132 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1133 ; SSSE3-NEXT: retq
1134 ;
1135 ; SSE41-LABEL: shuffle_v4f32_0zz6:
1136 ; SSE41: # %bb.0:
1137 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[2]
1138 ; SSE41-NEXT: retq
1139 ;
1140 ; AVX-LABEL: shuffle_v4f32_0zz6:
1141 ; AVX: # %bb.0:
1142 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,zero,xmm1[2]
1143 ; AVX-NEXT: retq
1144 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 undef, i32 undef, i32 6>
1145 %shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32 1, i32 2, i32 7>
1146 ret <4 x float> %shuffle1
1147 }
1149 define <4 x float> @shuffle_v4f32_0z24(<4 x float> %a, <4 x float> %b) {
1150 ; SSE2-LABEL: shuffle_v4f32_0z24:
1151 ; SSE2: # %bb.0:
1152 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
1153 ; SSE2-NEXT: xorps %xmm2, %xmm2
1154 ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,0],xmm0[0,0]
1155 ; SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[2,0]
1156 ; SSE2-NEXT: movaps %xmm2, %xmm0
1157 ; SSE2-NEXT: retq
1158 ;
1159 ; SSE3-LABEL: shuffle_v4f32_0z24:
1160 ; SSE3: # %bb.0:
1161 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
1162 ; SSE3-NEXT: xorps %xmm2, %xmm2
1163 ; SSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,0],xmm0[0,0]
1164 ; SSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[2,0]
1165 ; SSE3-NEXT: movaps %xmm2, %xmm0
1166 ; SSE3-NEXT: retq
1167 ;
1168 ; SSSE3-LABEL: shuffle_v4f32_0z24:
1169 ; SSSE3: # %bb.0:
1170 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0]
1171 ; SSSE3-NEXT: xorps %xmm2, %xmm2
1172 ; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,0],xmm0[0,0]
1173 ; SSSE3-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm1[2,0]
1174 ; SSSE3-NEXT: movaps %xmm2, %xmm0
1175 ; SSSE3-NEXT: retq
1176 ;
1177 ; SSE41-LABEL: shuffle_v4f32_0z24:
1178 ; SSE41: # %bb.0:
1179 ; SSE41-NEXT: insertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],xmm1[0]
1180 ; SSE41-NEXT: retq
1181 ;
1182 ; AVX-LABEL: shuffle_v4f32_0z24:
1183 ; AVX: # %bb.0:
1184 ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],zero,xmm0[2],xmm1[0]
1185 ; AVX-NEXT: retq
1186 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 undef, i32 2, i32 4>
1187 %shuffle1 = shufflevector <4 x float> zeroinitializer, <4 x float> %shuffle, <4 x i32> <i32 4, i32 1, i32 6, i32 7>
1188 ret <4 x float> %shuffle1
1189 }
1191 define <4 x i32> @shuffle_v4i32_4zzz(<4 x i32> %a) {
1192 ; SSE2-LABEL: shuffle_v4i32_4zzz:
1193 ; SSE2: # %bb.0:
1194 ; SSE2-NEXT: xorps %xmm1, %xmm1
1195 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1196 ; SSE2-NEXT: movaps %xmm1, %xmm0
1197 ; SSE2-NEXT: retq
1198 ;
1199 ; SSE3-LABEL: shuffle_v4i32_4zzz:
1200 ; SSE3: # %bb.0:
1201 ; SSE3-NEXT: xorps %xmm1, %xmm1
1202 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1203 ; SSE3-NEXT: movaps %xmm1, %xmm0
1204 ; SSE3-NEXT: retq
1205 ;
1206 ; SSSE3-LABEL: shuffle_v4i32_4zzz:
1207 ; SSSE3: # %bb.0:
1208 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1209 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1210 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1211 ; SSSE3-NEXT: retq
1212 ;
1213 ; SSE41-LABEL: shuffle_v4i32_4zzz:
1214 ; SSE41: # %bb.0:
1215 ; SSE41-NEXT: xorps %xmm1, %xmm1
1216 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1217 ; SSE41-NEXT: retq
1218 ;
1219 ; AVX-LABEL: shuffle_v4i32_4zzz:
1220 ; AVX: # %bb.0:
1221 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1222 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1223 ; AVX-NEXT: retq
1224 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 4, i32 1, i32 2, i32 3>
1225 ret <4 x i32> %shuffle
1226 }
1228 define <4 x i32> @shuffle_v4i32_z4zz(<4 x i32> %a) {
1229 ; SSE2-LABEL: shuffle_v4i32_z4zz:
1230 ; SSE2: # %bb.0:
1231 ; SSE2-NEXT: xorps %xmm1, %xmm1
1232 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1233 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1234 ; SSE2-NEXT: retq
1235 ;
1236 ; SSE3-LABEL: shuffle_v4i32_z4zz:
1237 ; SSE3: # %bb.0:
1238 ; SSE3-NEXT: xorps %xmm1, %xmm1
1239 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1240 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1241 ; SSE3-NEXT: retq
1242 ;
1243 ; SSSE3-LABEL: shuffle_v4i32_z4zz:
1244 ; SSSE3: # %bb.0:
1245 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1246 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1247 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1248 ; SSSE3-NEXT: retq
1249 ;
1250 ; SSE41-LABEL: shuffle_v4i32_z4zz:
1251 ; SSE41: # %bb.0:
1252 ; SSE41-NEXT: pxor %xmm1, %xmm1
1253 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1254 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,0,1,1]
1255 ; SSE41-NEXT: retq
1256 ;
1257 ; AVX1-LABEL: shuffle_v4i32_z4zz:
1258 ; AVX1: # %bb.0:
1259 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1260 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1261 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,1,1]
1262 ; AVX1-NEXT: retq
1263 ;
1264 ; AVX2-SLOW-LABEL: shuffle_v4i32_z4zz:
1265 ; AVX2-SLOW: # %bb.0:
1266 ; AVX2-SLOW-NEXT: vxorps %xmm1, %xmm1, %xmm1
1267 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1268 ; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,0,1,1]
1269 ; AVX2-SLOW-NEXT: retq
1270 ;
1271 ; AVX2-FAST-LABEL: shuffle_v4i32_z4zz:
1272 ; AVX2-FAST: # %bb.0:
1273 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero,zero,zero,zero,zero
1274 ; AVX2-FAST-NEXT: retq
1275 ;
1276 ; AVX512VL-LABEL: shuffle_v4i32_z4zz:
1277 ; AVX512VL: # %bb.0:
1278 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero,zero,zero,zero,zero
1279 ; AVX512VL-NEXT: retq
1280 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 2, i32 4, i32 3, i32 0>
1281 ret <4 x i32> %shuffle
1282 }
1284 define <4 x i32> @shuffle_v4i32_zz4z(<4 x i32> %a) {
1285 ; SSE2-LABEL: shuffle_v4i32_zz4z:
1286 ; SSE2: # %bb.0:
1287 ; SSE2-NEXT: xorps %xmm1, %xmm1
1288 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1289 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1290 ; SSE2-NEXT: retq
1291 ;
1292 ; SSE3-LABEL: shuffle_v4i32_zz4z:
1293 ; SSE3: # %bb.0:
1294 ; SSE3-NEXT: xorps %xmm1, %xmm1
1295 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1296 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1297 ; SSE3-NEXT: retq
1298 ;
1299 ; SSSE3-LABEL: shuffle_v4i32_zz4z:
1300 ; SSSE3: # %bb.0:
1301 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1302 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
1303 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1304 ; SSSE3-NEXT: retq
1305 ;
1306 ; SSE41-LABEL: shuffle_v4i32_zz4z:
1307 ; SSE41: # %bb.0:
1308 ; SSE41-NEXT: pxor %xmm1, %xmm1
1309 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3,4,5,6,7]
1310 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,0,1]
1311 ; SSE41-NEXT: retq
1312 ;
1313 ; AVX1-LABEL: shuffle_v4i32_zz4z:
1314 ; AVX1: # %bb.0:
1315 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1316 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1317 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,0,1]
1318 ; AVX1-NEXT: retq
1319 ;
1320 ; AVX2-SLOW-LABEL: shuffle_v4i32_zz4z:
1321 ; AVX2-SLOW: # %bb.0:
1322 ; AVX2-SLOW-NEXT: vxorps %xmm1, %xmm1, %xmm1
1323 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
1324 ; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[1,1,0,1]
1325 ; AVX2-SLOW-NEXT: retq
1326 ;
1327 ; AVX2-FAST-LABEL: shuffle_v4i32_zz4z:
1328 ; AVX2-FAST: # %bb.0:
1329 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero
1330 ; AVX2-FAST-NEXT: retq
1331 ;
1332 ; AVX512VL-LABEL: shuffle_v4i32_zz4z:
1333 ; AVX512VL: # %bb.0:
1334 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3],zero,zero,zero,zero
1335 ; AVX512VL-NEXT: retq
1336 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 0, i32 4, i32 0>
1337 ret <4 x i32> %shuffle
1338 }
1340 define <4 x i32> @shuffle_v4i32_zuu4(<4 x i32> %a) {
1341 ; SSE-LABEL: shuffle_v4i32_zuu4:
1342 ; SSE: # %bb.0:
1343 ; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1344 ; SSE-NEXT: retq
1345 ;
1346 ; AVX-LABEL: shuffle_v4i32_zuu4:
1347 ; AVX: # %bb.0:
1348 ; AVX-NEXT: vpslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3]
1349 ; AVX-NEXT: retq
1350 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 undef, i32 undef, i32 4>
1351 ret <4 x i32> %shuffle
1352 }
1354 define <4 x i32> @shuffle_v4i32_z6zz(<4 x i32> %a) {
1355 ; SSE2-LABEL: shuffle_v4i32_z6zz:
1356 ; SSE2: # %bb.0:
1357 ; SSE2-NEXT: xorps %xmm1, %xmm1
1358 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1359 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1360 ; SSE2-NEXT: retq
1361 ;
1362 ; SSE3-LABEL: shuffle_v4i32_z6zz:
1363 ; SSE3: # %bb.0:
1364 ; SSE3-NEXT: xorps %xmm1, %xmm1
1365 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1366 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1367 ; SSE3-NEXT: retq
1368 ;
1369 ; SSSE3-LABEL: shuffle_v4i32_z6zz:
1370 ; SSSE3: # %bb.0:
1371 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1372 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1373 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[2,3]
1374 ; SSSE3-NEXT: retq
1375 ;
1376 ; SSE41-LABEL: shuffle_v4i32_z6zz:
1377 ; SSE41: # %bb.0:
1378 ; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
1379 ; SSE41-NEXT: pxor %xmm0, %xmm0
1380 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5,6,7]
1381 ; SSE41-NEXT: retq
1382 ;
1383 ; AVX1-LABEL: shuffle_v4i32_z6zz:
1384 ; AVX1: # %bb.0:
1385 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
1386 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
1387 ; AVX1-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1388 ; AVX1-NEXT: retq
1389 ;
1390 ; AVX2-SLOW-LABEL: shuffle_v4i32_z6zz:
1391 ; AVX2-SLOW: # %bb.0:
1392 ; AVX2-SLOW-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
1393 ; AVX2-SLOW-NEXT: vxorps %xmm1, %xmm1, %xmm1
1394 ; AVX2-SLOW-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2,3]
1395 ; AVX2-SLOW-NEXT: retq
1396 ;
1397 ; AVX2-FAST-LABEL: shuffle_v4i32_z6zz:
1398 ; AVX2-FAST: # %bb.0:
1399 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[8,9,10,11],zero,zero,zero,zero,zero,zero,zero,zero
1400 ; AVX2-FAST-NEXT: retq
1401 ;
1402 ; AVX512VL-LABEL: shuffle_v4i32_z6zz:
1403 ; AVX512VL: # %bb.0:
1404 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = zero,zero,zero,zero,xmm0[8,9,10,11],zero,zero,zero,zero,zero,zero,zero,zero
1405 ; AVX512VL-NEXT: retq
1406 %shuffle = shufflevector <4 x i32> zeroinitializer, <4 x i32> %a, <4 x i32> <i32 0, i32 6, i32 2, i32 3>
1407 ret <4 x i32> %shuffle
1408 }
1410 define <4 x i32> @shuffle_v4i32_7012(<4 x i32> %a, <4 x i32> %b) {
1411 ; SSE2-LABEL: shuffle_v4i32_7012:
1412 ; SSE2: # %bb.0:
1413 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1414 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1415 ; SSE2-NEXT: movaps %xmm1, %xmm0
1416 ; SSE2-NEXT: retq
1417 ;
1418 ; SSE3-LABEL: shuffle_v4i32_7012:
1419 ; SSE3: # %bb.0:
1420 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[3,0],xmm0[0,0]
1421 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm0[1,2]
1422 ; SSE3-NEXT: movaps %xmm1, %xmm0
1423 ; SSE3-NEXT: retq
1424 ;
1425 ; SSSE3-LABEL: shuffle_v4i32_7012:
1426 ; SSSE3: # %bb.0:
1427 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1428 ; SSSE3-NEXT: retq
1429 ;
1430 ; SSE41-LABEL: shuffle_v4i32_7012:
1431 ; SSE41: # %bb.0:
1432 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1433 ; SSE41-NEXT: retq
1434 ;
1435 ; AVX-LABEL: shuffle_v4i32_7012:
1436 ; AVX: # %bb.0:
1437 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[12,13,14,15],xmm0[0,1,2,3,4,5,6,7,8,9,10,11]
1438 ; AVX-NEXT: retq
1439 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 7, i32 0, i32 1, i32 2>
1440 ret <4 x i32> %shuffle
1441 }
1443 define <4 x i32> @shuffle_v4i32_6701(<4 x i32> %a, <4 x i32> %b) {
1444 ; SSE2-LABEL: shuffle_v4i32_6701:
1445 ; SSE2: # %bb.0:
1446 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]
1447 ; SSE2-NEXT: movaps %xmm1, %xmm0
1448 ; SSE2-NEXT: retq
1449 ;
1450 ; SSE3-LABEL: shuffle_v4i32_6701:
1451 ; SSE3: # %bb.0:
1452 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[2,3],xmm0[0,1]
1453 ; SSE3-NEXT: movaps %xmm1, %xmm0
1454 ; SSE3-NEXT: retq
1455 ;
1456 ; SSSE3-LABEL: shuffle_v4i32_6701:
1457 ; SSSE3: # %bb.0:
1458 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1459 ; SSSE3-NEXT: retq
1460 ;
1461 ; SSE41-LABEL: shuffle_v4i32_6701:
1462 ; SSE41: # %bb.0:
1463 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1464 ; SSE41-NEXT: retq
1465 ;
1466 ; AVX-LABEL: shuffle_v4i32_6701:
1467 ; AVX: # %bb.0:
1468 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[8,9,10,11,12,13,14,15],xmm0[0,1,2,3,4,5,6,7]
1469 ; AVX-NEXT: retq
1470 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 6, i32 7, i32 0, i32 1>
1471 ret <4 x i32> %shuffle
1472 }
1474 define <4 x i32> @shuffle_v4i32_5670(<4 x i32> %a, <4 x i32> %b) {
1475 ; SSE2-LABEL: shuffle_v4i32_5670:
1476 ; SSE2: # %bb.0:
1477 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1478 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1479 ; SSE2-NEXT: movaps %xmm1, %xmm0
1480 ; SSE2-NEXT: retq
1481 ;
1482 ; SSE3-LABEL: shuffle_v4i32_5670:
1483 ; SSE3: # %bb.0:
1484 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[3,0]
1485 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,2],xmm0[2,0]
1486 ; SSE3-NEXT: movaps %xmm1, %xmm0
1487 ; SSE3-NEXT: retq
1488 ;
1489 ; SSSE3-LABEL: shuffle_v4i32_5670:
1490 ; SSSE3: # %bb.0:
1491 ; SSSE3-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1492 ; SSSE3-NEXT: retq
1493 ;
1494 ; SSE41-LABEL: shuffle_v4i32_5670:
1495 ; SSE41: # %bb.0:
1496 ; SSE41-NEXT: palignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1497 ; SSE41-NEXT: retq
1498 ;
1499 ; AVX-LABEL: shuffle_v4i32_5670:
1500 ; AVX: # %bb.0:
1501 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm1[4,5,6,7,8,9,10,11,12,13,14,15],xmm0[0,1,2,3]
1502 ; AVX-NEXT: retq
1503 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 5, i32 6, i32 7, i32 0>
1504 ret <4 x i32> %shuffle
1505 }
1507 define <4 x i32> @shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b) {
1508 ; SSE2-LABEL: shuffle_v4i32_1234:
1509 ; SSE2: # %bb.0:
1510 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1511 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1512 ; SSE2-NEXT: retq
1513 ;
1514 ; SSE3-LABEL: shuffle_v4i32_1234:
1515 ; SSE3: # %bb.0:
1516 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[3,0]
1517 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,2],xmm1[2,0]
1518 ; SSE3-NEXT: retq
1519 ;
1520 ; SSSE3-LABEL: shuffle_v4i32_1234:
1521 ; SSSE3: # %bb.0:
1522 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1523 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1524 ; SSSE3-NEXT: retq
1525 ;
1526 ; SSE41-LABEL: shuffle_v4i32_1234:
1527 ; SSE41: # %bb.0:
1528 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1529 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1530 ; SSE41-NEXT: retq
1531 ;
1532 ; AVX-LABEL: shuffle_v4i32_1234:
1533 ; AVX: # %bb.0:
1534 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[4,5,6,7,8,9,10,11,12,13,14,15],xmm1[0,1,2,3]
1535 ; AVX-NEXT: retq
1536 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
1537 ret <4 x i32> %shuffle
1538 }
1540 define <4 x i32> @shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b) {
1541 ; SSE2-LABEL: shuffle_v4i32_2345:
1542 ; SSE2: # %bb.0:
1543 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
1544 ; SSE2-NEXT: retq
1545 ;
1546 ; SSE3-LABEL: shuffle_v4i32_2345:
1547 ; SSE3: # %bb.0:
1548 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,1]
1549 ; SSE3-NEXT: retq
1550 ;
1551 ; SSSE3-LABEL: shuffle_v4i32_2345:
1552 ; SSSE3: # %bb.0:
1553 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1554 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1555 ; SSSE3-NEXT: retq
1556 ;
1557 ; SSE41-LABEL: shuffle_v4i32_2345:
1558 ; SSE41: # %bb.0:
1559 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1560 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1561 ; SSE41-NEXT: retq
1562 ;
1563 ; AVX-LABEL: shuffle_v4i32_2345:
1564 ; AVX: # %bb.0:
1565 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7]
1566 ; AVX-NEXT: retq
1567 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
1568 ret <4 x i32> %shuffle
1569 }
1571 ; PR22391
1572 define <4 x i32> @shuffle_v4i32_2456(<4 x i32> %a, <4 x i32> %b) {
1573 ; SSE2-LABEL: shuffle_v4i32_2456:
1574 ; SSE2: # %bb.0:
1575 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1576 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1577 ; SSE2-NEXT: retq
1578 ;
1579 ; SSE3-LABEL: shuffle_v4i32_2456:
1580 ; SSE3: # %bb.0:
1581 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[0,0]
1582 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1583 ; SSE3-NEXT: retq
1584 ;
1585 ; SSSE3-LABEL: shuffle_v4i32_2456:
1586 ; SSSE3: # %bb.0:
1587 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
1588 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1589 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1590 ; SSSE3-NEXT: retq
1591 ;
1592 ; SSE41-LABEL: shuffle_v4i32_2456:
1593 ; SSE41: # %bb.0:
1594 ; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
1595 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1596 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1597 ; SSE41-NEXT: retq
1598 ;
1599 ; AVX-LABEL: shuffle_v4i32_2456:
1600 ; AVX: # %bb.0:
1601 ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,2,2]
1602 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1603 ; AVX-NEXT: retq
1604 %s1 = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
1605 %s2 = shufflevector <4 x i32> %s1, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1606 ret <4 x i32> %s2
1607 }
1609 define <4 x i32> @shuffle_v4i32_40u1(<4 x i32> %a, <4 x i32> %b) {
1610 ; SSE-LABEL: shuffle_v4i32_40u1:
1611 ; SSE: # %bb.0:
1612 ; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1613 ; SSE-NEXT: movaps %xmm1, %xmm0
1614 ; SSE-NEXT: retq
1615 ;
1616 ; AVX-LABEL: shuffle_v4i32_40u1:
1617 ; AVX: # %bb.0:
1618 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
1619 ; AVX-NEXT: retq
1620 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 4, i32 0, i32 undef, i32 1>
1621 ret <4 x i32> %shuffle
1622 }
1624 define <4 x i32> @shuffle_v4i32_3456(<4 x i32> %a, <4 x i32> %b) {
1625 ; SSE2-LABEL: shuffle_v4i32_3456:
1626 ; SSE2: # %bb.0:
1627 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1628 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1629 ; SSE2-NEXT: retq
1630 ;
1631 ; SSE3-LABEL: shuffle_v4i32_3456:
1632 ; SSE3: # %bb.0:
1633 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
1634 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[1,2]
1635 ; SSE3-NEXT: retq
1636 ;
1637 ; SSSE3-LABEL: shuffle_v4i32_3456:
1638 ; SSSE3: # %bb.0:
1639 ; SSSE3-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1640 ; SSSE3-NEXT: movdqa %xmm1, %xmm0
1641 ; SSSE3-NEXT: retq
1642 ;
1643 ; SSE41-LABEL: shuffle_v4i32_3456:
1644 ; SSE41: # %bb.0:
1645 ; SSE41-NEXT: palignr {{.*#+}} xmm1 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1646 ; SSE41-NEXT: movdqa %xmm1, %xmm0
1647 ; SSE41-NEXT: retq
1648 ;
1649 ; AVX-LABEL: shuffle_v4i32_3456:
1650 ; AVX: # %bb.0:
1651 ; AVX-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[12,13,14,15],xmm1[0,1,2,3,4,5,6,7,8,9,10,11]
1652 ; AVX-NEXT: retq
1653 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 4, i32 5, i32 6>
1654 ret <4 x i32> %shuffle
1655 }
1657 define <4 x i32> @shuffle_v4i32_0u1u(<4 x i32> %a, <4 x i32> %b) {
1658 ; SSE2-LABEL: shuffle_v4i32_0u1u:
1659 ; SSE2: # %bb.0:
1660 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1661 ; SSE2-NEXT: retq
1662 ;
1663 ; SSE3-LABEL: shuffle_v4i32_0u1u:
1664 ; SSE3: # %bb.0:
1665 ; SSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1666 ; SSE3-NEXT: retq
1667 ;
1668 ; SSSE3-LABEL: shuffle_v4i32_0u1u:
1669 ; SSSE3: # %bb.0:
1670 ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3]
1671 ; SSSE3-NEXT: retq
1672 ;
1673 ; SSE41-LABEL: shuffle_v4i32_0u1u:
1674 ; SSE41: # %bb.0:
1675 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1676 ; SSE41-NEXT: retq
1677 ;
1678 ; AVX-LABEL: shuffle_v4i32_0u1u:
1679 ; AVX: # %bb.0:
1680 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1681 ; AVX-NEXT: retq
1682 %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 0, i32 undef, i32 1, i32 undef>
1683 ret <4 x i32> %shuffle
1684 }
1686 define <4 x i32> @shuffle_v4i32_0z1z(<4 x i32> %a) {
1687 ; SSE2-LABEL: shuffle_v4i32_0z1z:
1688 ; SSE2: # %bb.0:
1689 ; SSE2-NEXT: xorps %xmm1, %xmm1
1690 ; SSE2-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1691 ; SSE2-NEXT: retq
1692 ;
1693 ; SSE3-LABEL: shuffle_v4i32_0z1z:
1694 ; SSE3: # %bb.0:
1695 ; SSE3-NEXT: xorps %xmm1, %xmm1
1696 ; SSE3-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1697 ; SSE3-NEXT: retq
1698 ;
1699 ; SSSE3-LABEL: shuffle_v4i32_0z1z:
1700 ; SSSE3: # %bb.0:
1701 ; SSSE3-NEXT: xorps %xmm1, %xmm1
1702 ; SSSE3-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1703 ; SSSE3-NEXT: retq
1704 ;
1705 ; SSE41-LABEL: shuffle_v4i32_0z1z:
1706 ; SSE41: # %bb.0:
1707 ; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1708 ; SSE41-NEXT: retq
1709 ;
1710 ; AVX-LABEL: shuffle_v4i32_0z1z:
1711 ; AVX: # %bb.0:
1712 ; AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
1713 ; AVX-NEXT: retq
1714 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 1, i32 7>
1715 ret <4 x i32> %shuffle
1716 }
1718 define <4 x i32> @shuffle_v4i32_01zu(<4 x i32> %a) {
1719 ; SSE-LABEL: shuffle_v4i32_01zu:
1720 ; SSE: # %bb.0:
1721 ; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero
1722 ; SSE-NEXT: retq
1723 ;
1724 ; AVX-LABEL: shuffle_v4i32_01zu:
1725 ; AVX: # %bb.0:
1726 ; AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
1727 ; AVX-NEXT: retq
1728 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 7, i32 undef>
1729 ret <4 x i32> %shuffle
1730 }
1732 define <4 x i32> @shuffle_v4i32_0z23(<4 x i32> %a) {
1733 ; SSE2-LABEL: shuffle_v4i32_0z23:
1734 ; SSE2: # %bb.0:
1735 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1736 ; SSE2-NEXT: retq
1737 ;
1738 ; SSE3-LABEL: shuffle_v4i32_0z23:
1739 ; SSE3: # %bb.0:
1740 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1741 ; SSE3-NEXT: retq
1742 ;
1743 ; SSSE3-LABEL: shuffle_v4i32_0z23:
1744 ; SSSE3: # %bb.0:
1745 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1746 ; SSSE3-NEXT: retq
1747 ;
1748 ; SSE41-LABEL: shuffle_v4i32_0z23:
1749 ; SSE41: # %bb.0:
1750 ; SSE41-NEXT: xorps %xmm1, %xmm1
1751 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
1752 ; SSE41-NEXT: retq
1753 ;
1754 ; AVX-LABEL: shuffle_v4i32_0z23:
1755 ; AVX: # %bb.0:
1756 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1757 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3]
1758 ; AVX-NEXT: retq
1759 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 2, i32 3>
1760 ret <4 x i32> %shuffle
1761 }
1763 define <4 x i32> @shuffle_v4i32_01z3(<4 x i32> %a) {
1764 ; SSE2-LABEL: shuffle_v4i32_01z3:
1765 ; SSE2: # %bb.0:
1766 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1767 ; SSE2-NEXT: retq
1768 ;
1769 ; SSE3-LABEL: shuffle_v4i32_01z3:
1770 ; SSE3: # %bb.0:
1771 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1772 ; SSE3-NEXT: retq
1773 ;
1774 ; SSSE3-LABEL: shuffle_v4i32_01z3:
1775 ; SSSE3: # %bb.0:
1776 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1777 ; SSSE3-NEXT: retq
1778 ;
1779 ; SSE41-LABEL: shuffle_v4i32_01z3:
1780 ; SSE41: # %bb.0:
1781 ; SSE41-NEXT: xorps %xmm1, %xmm1
1782 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1783 ; SSE41-NEXT: retq
1784 ;
1785 ; AVX-LABEL: shuffle_v4i32_01z3:
1786 ; AVX: # %bb.0:
1787 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1788 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1789 ; AVX-NEXT: retq
1790 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 3>
1791 ret <4 x i32> %shuffle
1792 }
1794 define <4 x i32> @shuffle_v4i32_012z(<4 x i32> %a) {
1795 ; SSE2-LABEL: shuffle_v4i32_012z:
1796 ; SSE2: # %bb.0:
1797 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1798 ; SSE2-NEXT: retq
1799 ;
1800 ; SSE3-LABEL: shuffle_v4i32_012z:
1801 ; SSE3: # %bb.0:
1802 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1803 ; SSE3-NEXT: retq
1804 ;
1805 ; SSSE3-LABEL: shuffle_v4i32_012z:
1806 ; SSSE3: # %bb.0:
1807 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1808 ; SSSE3-NEXT: retq
1809 ;
1810 ; SSE41-LABEL: shuffle_v4i32_012z:
1811 ; SSE41: # %bb.0:
1812 ; SSE41-NEXT: xorps %xmm1, %xmm1
1813 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1814 ; SSE41-NEXT: retq
1815 ;
1816 ; AVX-LABEL: shuffle_v4i32_012z:
1817 ; AVX: # %bb.0:
1818 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1819 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[3]
1820 ; AVX-NEXT: retq
1821 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 7>
1822 ret <4 x i32> %shuffle
1823 }
1825 define <4 x i32> @shuffle_v4i32_0zz3(<4 x i32> %a) {
1826 ; SSE2-LABEL: shuffle_v4i32_0zz3:
1827 ; SSE2: # %bb.0:
1828 ; SSE2-NEXT: andps {{.*}}(%rip), %xmm0
1829 ; SSE2-NEXT: retq
1830 ;
1831 ; SSE3-LABEL: shuffle_v4i32_0zz3:
1832 ; SSE3: # %bb.0:
1833 ; SSE3-NEXT: andps {{.*}}(%rip), %xmm0
1834 ; SSE3-NEXT: retq
1835 ;
1836 ; SSSE3-LABEL: shuffle_v4i32_0zz3:
1837 ; SSSE3: # %bb.0:
1838 ; SSSE3-NEXT: andps {{.*}}(%rip), %xmm0
1839 ; SSSE3-NEXT: retq
1840 ;
1841 ; SSE41-LABEL: shuffle_v4i32_0zz3:
1842 ; SSE41: # %bb.0:
1843 ; SSE41-NEXT: xorps %xmm1, %xmm1
1844 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1845 ; SSE41-NEXT: retq
1846 ;
1847 ; AVX-LABEL: shuffle_v4i32_0zz3:
1848 ; AVX: # %bb.0:
1849 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
1850 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2],xmm0[3]
1851 ; AVX-NEXT: retq
1852 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 4, i32 4, i32 3>
1853 ret <4 x i32> %shuffle
1854 }
1856 define <4 x i32> @shuffle_v4i32_bitcast_0415(<4 x i32> %a, <4 x i32> %b) {
1857 ; SSE-LABEL: shuffle_v4i32_bitcast_0415:
1858 ; SSE: # %bb.0:
1859 ; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1860 ; SSE-NEXT: retq
1861 ;
1862 ; AVX-LABEL: shuffle_v4i32_bitcast_0415:
1863 ; AVX: # %bb.0:
1864 ; AVX-NEXT: vunpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1865 ; AVX-NEXT: retq
1866 %shuffle32 = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 5, i32 0, i32 4>
1867 %bitcast64 = bitcast <4 x i32> %shuffle32 to <2 x double>
1868 %shuffle64 = shufflevector <2 x double> %bitcast64, <2 x double> undef, <2 x i32> <i32 1, i32 0>
1869 %bitcast32 = bitcast <2 x double> %shuffle64 to <4 x i32>
1870 ret <4 x i32> %bitcast32
1871 }
1873 define <4 x float> @shuffle_v4f32_bitcast_4401(<4 x float> %a, <4 x i32> %b) {
1874 ; SSE-LABEL: shuffle_v4f32_bitcast_4401:
1875 ; SSE: # %bb.0:
1876 ; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,1]
1877 ; SSE-NEXT: movaps %xmm1, %xmm0
1878 ; SSE-NEXT: retq
1879 ;
1880 ; AVX-LABEL: shuffle_v4f32_bitcast_4401:
1881 ; AVX: # %bb.0:
1882 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,0],xmm0[0,1]
1883 ; AVX-NEXT: retq
1884 %1 = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
1885 %2 = bitcast <4 x i32> %1 to <2 x double>
1886 %3 = bitcast <4 x float> %a to <2 x double>
1887 %4 = shufflevector <2 x double> %2, <2 x double> %3, <2 x i32> <i32 0, i32 2>
1888 %5 = bitcast <2 x double> %4 to <4 x float>
1889 ret <4 x float> %5
1890 }
1892 define <4 x float> @shuffle_v4f32_bitcast_0045(<4 x float> %a, <4 x i32> %b) {
1893 ; SSE-LABEL: shuffle_v4f32_bitcast_0045:
1894 ; SSE: # %bb.0:
1895 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
1896 ; SSE-NEXT: retq
1897 ;
1898 ; AVX-LABEL: shuffle_v4f32_bitcast_0045:
1899 ; AVX: # %bb.0:
1900 ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[0,1]
1901 ; AVX-NEXT: retq
1902 %1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 1, i32 1>
1903 %2 = bitcast <4 x i32> %b to <4 x float>
1904 %3 = shufflevector <4 x float> %1, <4 x float> %2, <4 x i32> <i32 1, i32 0, i32 4, i32 5>
1905 ret <4 x float> %3
1906 }
1908 define <4 x float> @mask_v4f32_4127(<4 x float> %a, <4 x float> %b) {
1909 ; SSE2-LABEL: mask_v4f32_4127:
1910 ; SSE2: # %bb.0:
1911 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm0[1,2]
1912 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,3,1]
1913 ; SSE2-NEXT: movaps %xmm1, %xmm0
1914 ; SSE2-NEXT: retq
1915 ;
1916 ; SSE3-LABEL: mask_v4f32_4127:
1917 ; SSE3: # %bb.0:
1918 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm0[1,2]
1919 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,3,1]
1920 ; SSE3-NEXT: movaps %xmm1, %xmm0
1921 ; SSE3-NEXT: retq
1922 ;
1923 ; SSSE3-LABEL: mask_v4f32_4127:
1924 ; SSSE3: # %bb.0:
1925 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,3],xmm0[1,2]
1926 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,3,1]
1927 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1928 ; SSSE3-NEXT: retq
1929 ;
1930 ; SSE41-LABEL: mask_v4f32_4127:
1931 ; SSE41: # %bb.0:
1932 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
1933 ; SSE41-NEXT: retq
1934 ;
1935 ; AVX-LABEL: mask_v4f32_4127:
1936 ; AVX: # %bb.0:
1937 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0],xmm0[1,2],xmm1[3]
1938 ; AVX-NEXT: retq
1939 %1 = bitcast <4 x float> %a to <4 x i32>
1940 %2 = bitcast <4 x float> %b to <4 x i32>
1941 %3 = and <4 x i32> %1, <i32 0, i32 -1, i32 -1, i32 0>
1942 %4 = and <4 x i32> %2, <i32 -1, i32 0, i32 0, i32 -1>
1943 %5 = or <4 x i32> %4, %3
1944 %6 = bitcast <4 x i32> %5 to <4 x float>
1945 ret <4 x float> %6
1946 }
1948 define <4 x float> @mask_v4f32_0127(<4 x float> %a, <4 x float> %b) {
1949 ; SSE2-LABEL: mask_v4f32_0127:
1950 ; SSE2: # %bb.0:
1951 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1952 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1953 ; SSE2-NEXT: movaps %xmm1, %xmm0
1954 ; SSE2-NEXT: retq
1955 ;
1956 ; SSE3-LABEL: mask_v4f32_0127:
1957 ; SSE3: # %bb.0:
1958 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1959 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1960 ; SSE3-NEXT: movaps %xmm1, %xmm0
1961 ; SSE3-NEXT: retq
1962 ;
1963 ; SSSE3-LABEL: mask_v4f32_0127:
1964 ; SSSE3: # %bb.0:
1965 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1966 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1967 ; SSSE3-NEXT: movaps %xmm1, %xmm0
1968 ; SSSE3-NEXT: retq
1969 ;
1970 ; SSE41-LABEL: mask_v4f32_0127:
1971 ; SSE41: # %bb.0:
1972 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
1973 ; SSE41-NEXT: retq
1974 ;
1975 ; AVX-LABEL: mask_v4f32_0127:
1976 ; AVX: # %bb.0:
1977 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
1978 ; AVX-NEXT: retq
1979 %1 = bitcast <4 x float> %a to <2 x i64>
1980 %2 = bitcast <4 x float> %b to <2 x i64>
1981 %3 = and <2 x i64> %1, <i64 0, i64 -4294967296>
1982 %4 = and <2 x i64> %2, <i64 -1, i64 4294967295>
1983 %5 = or <2 x i64> %4, %3
1984 %6 = bitcast <2 x i64> %5 to <4 x float>
1985 ret <4 x float> %6
1986 }
1988 define <4 x i32> @mask_v4i32_0127(<4 x i32> %a, <4 x i32> %b) {
1989 ; SSE2-LABEL: mask_v4i32_0127:
1990 ; SSE2: # %bb.0:
1991 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1992 ; SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
1993 ; SSE2-NEXT: movaps %xmm1, %xmm0
1994 ; SSE2-NEXT: retq
1995 ;
1996 ; SSE3-LABEL: mask_v4i32_0127:
1997 ; SSE3: # %bb.0:
1998 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
1999 ; SSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
2000 ; SSE3-NEXT: movaps %xmm1, %xmm0
2001 ; SSE3-NEXT: retq
2002 ;
2003 ; SSSE3-LABEL: mask_v4i32_0127:
2004 ; SSSE3: # %bb.0:
2005 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[2,0]
2006 ; SSSE3-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[2,0]
2007 ; SSSE3-NEXT: movaps %xmm1, %xmm0
2008 ; SSSE3-NEXT: retq
2009 ;
2010 ; SSE41-LABEL: mask_v4i32_0127:
2011 ; SSE41: # %bb.0:
2012 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
2013 ; SSE41-NEXT: retq
2014 ;
2015 ; AVX-LABEL: mask_v4i32_0127:
2016 ; AVX: # %bb.0:
2017 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[3]
2018 ; AVX-NEXT: retq
2019 %1 = bitcast <4 x i32> %a to <2 x i64>
2020 %2 = bitcast <4 x i32> %b to <2 x i64>
2021 %3 = and <2 x i64> %1, <i64 0, i64 -4294967296>
2022 %4 = and <2 x i64> %2, <i64 -1, i64 4294967295>
2023 %5 = or <2 x i64> %4, %3
2024 %6 = bitcast <2 x i64> %5 to <4 x i32>
2025 ret <4 x i32> %6
2026 }
2028 define <4 x float> @broadcast_v4f32_0101_from_v2f32(<2 x float>* %x) {
2029 ; SSE2-LABEL: broadcast_v4f32_0101_from_v2f32:
2030 ; SSE2: # %bb.0:
2031 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2032 ; SSE2-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0,0]
2033 ; SSE2-NEXT: retq
2034 ;
2035 ; SSE3-LABEL: broadcast_v4f32_0101_from_v2f32:
2036 ; SSE3: # %bb.0:
2037 ; SSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
2038 ; SSE3-NEXT: retq
2039 ;
2040 ; SSSE3-LABEL: broadcast_v4f32_0101_from_v2f32:
2041 ; SSSE3: # %bb.0:
2042 ; SSSE3-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
2043 ; SSSE3-NEXT: retq
2044 ;
2045 ; SSE41-LABEL: broadcast_v4f32_0101_from_v2f32:
2046 ; SSE41: # %bb.0:
2047 ; SSE41-NEXT: movddup {{.*#+}} xmm0 = mem[0,0]
2048 ; SSE41-NEXT: retq
2049 ;
2050 ; AVX-LABEL: broadcast_v4f32_0101_from_v2f32:
2051 ; AVX: # %bb.0:
2052 ; AVX-NEXT: vmovddup {{.*#+}} xmm0 = mem[0,0]
2053 ; AVX-NEXT: retq
2054 %1 = load <2 x float>, <2 x float>* %x, align 1
2055 %2 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
2056 ret <4 x float> %2
2057 }
2059 define <4 x i32> @insert_reg_and_zero_v4i32(i32 %a) {
2060 ; SSE-LABEL: insert_reg_and_zero_v4i32:
2061 ; SSE: # %bb.0:
2062 ; SSE-NEXT: movd %edi, %xmm0
2063 ; SSE-NEXT: retq
2064 ;
2065 ; AVX-LABEL: insert_reg_and_zero_v4i32:
2066 ; AVX: # %bb.0:
2067 ; AVX-NEXT: vmovd %edi, %xmm0
2068 ; AVX-NEXT: retq
2069 %v = insertelement <4 x i32> undef, i32 %a, i32 0
2070 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2071 ret <4 x i32> %shuffle
2072 }
2074 define <4 x i32> @insert_mem_and_zero_v4i32(i32* %ptr) {
2075 ; SSE-LABEL: insert_mem_and_zero_v4i32:
2076 ; SSE: # %bb.0:
2077 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2078 ; SSE-NEXT: retq
2079 ;
2080 ; AVX-LABEL: insert_mem_and_zero_v4i32:
2081 ; AVX: # %bb.0:
2082 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2083 ; AVX-NEXT: retq
2084 %a = load i32, i32* %ptr
2085 %v = insertelement <4 x i32> undef, i32 %a, i32 0
2086 %shuffle = shufflevector <4 x i32> %v, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2087 ret <4 x i32> %shuffle
2088 }
2090 define <4 x float> @insert_reg_and_zero_v4f32(float %a) {
2091 ; SSE2-LABEL: insert_reg_and_zero_v4f32:
2092 ; SSE2: # %bb.0:
2093 ; SSE2-NEXT: xorps %xmm1, %xmm1
2094 ; SSE2-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
2095 ; SSE2-NEXT: movaps %xmm1, %xmm0
2096 ; SSE2-NEXT: retq
2097 ;
2098 ; SSE3-LABEL: insert_reg_and_zero_v4f32:
2099 ; SSE3: # %bb.0:
2100 ; SSE3-NEXT: xorps %xmm1, %xmm1
2101 ; SSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
2102 ; SSE3-NEXT: movaps %xmm1, %xmm0
2103 ; SSE3-NEXT: retq
2104 ;
2105 ; SSSE3-LABEL: insert_reg_and_zero_v4f32:
2106 ; SSSE3: # %bb.0:
2107 ; SSSE3-NEXT: xorps %xmm1, %xmm1
2108 ; SSSE3-NEXT: movss {{.*#+}} xmm1 = xmm0[0],xmm1[1,2,3]
2109 ; SSSE3-NEXT: movaps %xmm1, %xmm0
2110 ; SSSE3-NEXT: retq
2111 ;
2112 ; SSE41-LABEL: insert_reg_and_zero_v4f32:
2113 ; SSE41: # %bb.0:
2114 ; SSE41-NEXT: xorps %xmm1, %xmm1
2115 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
2116 ; SSE41-NEXT: retq
2117 ;
2118 ; AVX-LABEL: insert_reg_and_zero_v4f32:
2119 ; AVX: # %bb.0:
2120 ; AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
2121 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
2122 ; AVX-NEXT: retq
2123 %v = insertelement <4 x float> undef, float %a, i32 0
2124 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2125 ret <4 x float> %shuffle
2126 }
2128 define <4 x float> @insert_mem_and_zero_v4f32(float* %ptr) {
2129 ; SSE-LABEL: insert_mem_and_zero_v4f32:
2130 ; SSE: # %bb.0:
2131 ; SSE-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2132 ; SSE-NEXT: retq
2133 ;
2134 ; AVX-LABEL: insert_mem_and_zero_v4f32:
2135 ; AVX: # %bb.0:
2136 ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
2137 ; AVX-NEXT: retq
2138 %a = load float, float* %ptr
2139 %v = insertelement <4 x float> undef, float %a, i32 0
2140 %shuffle = shufflevector <4 x float> %v, <4 x float> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
2141 ret <4 x float> %shuffle
2142 }
2144 define <4 x i32> @insert_reg_lo_v4i32(i64 %a, <4 x i32> %b) {
2145 ; SSE2-LABEL: insert_reg_lo_v4i32:
2146 ; SSE2: # %bb.0:
2147 ; SSE2-NEXT: movq %rdi, %xmm1
2148 ; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
2149 ; SSE2-NEXT: retq
2150 ;
2151 ; SSE3-LABEL: insert_reg_lo_v4i32:
2152 ; SSE3: # %bb.0:
2153 ; SSE3-NEXT: movq %rdi, %xmm1
2154 ; SSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
2155 ; SSE3-NEXT: retq
2156 ;
2157 ; SSSE3-LABEL: insert_reg_lo_v4i32:
2158 ; SSSE3: # %bb.0:
2159 ; SSSE3-NEXT: movq %rdi, %xmm1
2160 ; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
2161 ; SSSE3-NEXT: retq
2162 ;
2163 ; SSE41-LABEL: insert_reg_lo_v4i32:
2164 ; SSE41: # %bb.0:
2165 ; SSE41-NEXT: movq %rdi, %xmm1
2166 ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
2167 ; SSE41-NEXT: retq
2168 ;
2169 ; AVX1-LABEL: insert_reg_lo_v4i32:
2170 ; AVX1: # %bb.0:
2171 ; AVX1-NEXT: vmovq %rdi, %xmm1
2172 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7]
2173 ; AVX1-NEXT: retq
2174 ;
2175 ; AVX2OR512VL-LABEL: insert_reg_lo_v4i32:
2176 ; AVX2OR512VL: # %bb.0:
2177 ; AVX2OR512VL-NEXT: vmovq %rdi, %xmm1
2178 ; AVX2OR512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2179 ; AVX2OR512VL-NEXT: retq
2180 %a.cast = bitcast i64 %a to <2 x i32>
2181 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2182 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2183 ret <4 x i32> %shuffle
2184 }
2186 define <4 x i32> @insert_mem_lo_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
2187 ; SSE2-LABEL: insert_mem_lo_v4i32:
2188 ; SSE2: # %bb.0:
2189 ; SSE2-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2190 ; SSE2-NEXT: retq
2191 ;
2192 ; SSE3-LABEL: insert_mem_lo_v4i32:
2193 ; SSE3: # %bb.0:
2194 ; SSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2195 ; SSE3-NEXT: retq
2196 ;
2197 ; SSSE3-LABEL: insert_mem_lo_v4i32:
2198 ; SSSE3: # %bb.0:
2199 ; SSSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2200 ; SSSE3-NEXT: retq
2201 ;
2202 ; SSE41-LABEL: insert_mem_lo_v4i32:
2203 ; SSE41: # %bb.0:
2204 ; SSE41-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
2205 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2206 ; SSE41-NEXT: retq
2207 ;
2208 ; AVX-LABEL: insert_mem_lo_v4i32:
2209 ; AVX: # %bb.0:
2210 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
2211 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2212 ; AVX-NEXT: retq
2213 %a = load <2 x i32>, <2 x i32>* %ptr
2214 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2215 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2216 ret <4 x i32> %shuffle
2217 }
2219 define <4 x i32> @insert_reg_hi_v4i32(i64 %a, <4 x i32> %b) {
2220 ; SSE-LABEL: insert_reg_hi_v4i32:
2221 ; SSE: # %bb.0:
2222 ; SSE-NEXT: movq %rdi, %xmm1
2223 ; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2224 ; SSE-NEXT: retq
2225 ;
2226 ; AVX-LABEL: insert_reg_hi_v4i32:
2227 ; AVX: # %bb.0:
2228 ; AVX-NEXT: vmovq %rdi, %xmm1
2229 ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2230 ; AVX-NEXT: retq
2231 %a.cast = bitcast i64 %a to <2 x i32>
2232 %v = shufflevector <2 x i32> %a.cast, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2233 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2234 ret <4 x i32> %shuffle
2235 }
2237 define <4 x i32> @insert_mem_hi_v4i32(<2 x i32>* %ptr, <4 x i32> %b) {
2238 ; SSE-LABEL: insert_mem_hi_v4i32:
2239 ; SSE: # %bb.0:
2240 ; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
2241 ; SSE-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2242 ; SSE-NEXT: retq
2243 ;
2244 ; AVX-LABEL: insert_mem_hi_v4i32:
2245 ; AVX: # %bb.0:
2246 ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
2247 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
2248 ; AVX-NEXT: retq
2249 %a = load <2 x i32>, <2 x i32>* %ptr
2250 %v = shufflevector <2 x i32> %a, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2251 %shuffle = shufflevector <4 x i32> %v, <4 x i32> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2252 ret <4 x i32> %shuffle
2253 }
2255 define <4 x float> @insert_reg_lo_v4f32(double %a, <4 x float> %b) {
2256 ; SSE2-LABEL: insert_reg_lo_v4f32:
2257 ; SSE2: # %bb.0:
2258 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2259 ; SSE2-NEXT: retq
2260 ;
2261 ; SSE3-LABEL: insert_reg_lo_v4f32:
2262 ; SSE3: # %bb.0:
2263 ; SSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2264 ; SSE3-NEXT: retq
2265 ;
2266 ; SSSE3-LABEL: insert_reg_lo_v4f32:
2267 ; SSSE3: # %bb.0:
2268 ; SSSE3-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2269 ; SSSE3-NEXT: retq
2270 ;
2271 ; SSE41-LABEL: insert_reg_lo_v4f32:
2272 ; SSE41: # %bb.0:
2273 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2274 ; SSE41-NEXT: retq
2275 ;
2276 ; AVX-LABEL: insert_reg_lo_v4f32:
2277 ; AVX: # %bb.0:
2278 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
2279 ; AVX-NEXT: retq
2280 %a.cast = bitcast double %a to <2 x float>
2281 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2282 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2283 ret <4 x float> %shuffle
2284 }
2286 define <4 x float> @insert_mem_lo_v4f32(<2 x float>* %ptr, <4 x float> %b) {
2287 ; SSE-LABEL: insert_mem_lo_v4f32:
2288 ; SSE: # %bb.0:
2289 ; SSE-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2290 ; SSE-NEXT: retq
2291 ;
2292 ; AVX-LABEL: insert_mem_lo_v4f32:
2293 ; AVX: # %bb.0:
2294 ; AVX-NEXT: vmovlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2295 ; AVX-NEXT: retq
2296 %a = load <2 x float>, <2 x float>* %ptr
2297 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2298 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 6, i32 7>
2299 ret <4 x float> %shuffle
2300 }
2302 define <4 x float> @insert_reg_hi_v4f32(double %a, <4 x float> %b) {
2303 ; SSE-LABEL: insert_reg_hi_v4f32:
2304 ; SSE: # %bb.0:
2305 ; SSE-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm0[0]
2306 ; SSE-NEXT: movaps %xmm1, %xmm0
2307 ; SSE-NEXT: retq
2308 ;
2309 ; AVX-LABEL: insert_reg_hi_v4f32:
2310 ; AVX: # %bb.0:
2311 ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
2312 ; AVX-NEXT: retq
2313 %a.cast = bitcast double %a to <2 x float>
2314 %v = shufflevector <2 x float> %a.cast, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2315 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2316 ret <4 x float> %shuffle
2317 }
2319 define <4 x float> @insert_mem_hi_v4f32(<2 x float>* %ptr, <4 x float> %b) {
2320 ; SSE-LABEL: insert_mem_hi_v4f32:
2321 ; SSE: # %bb.0:
2322 ; SSE-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
2323 ; SSE-NEXT: retq
2324 ;
2325 ; AVX-LABEL: insert_mem_hi_v4f32:
2326 ; AVX: # %bb.0:
2327 ; AVX-NEXT: vmovhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
2328 ; AVX-NEXT: retq
2329 %a = load <2 x float>, <2 x float>* %ptr
2330 %v = shufflevector <2 x float> %a, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
2331 %shuffle = shufflevector <4 x float> %v, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 0, i32 1>
2332 ret <4 x float> %shuffle
2333 }
2335 ; PR21137
2336 define <4 x float> @shuffle_mem_v4f32_3210(<4 x float>* %ptr) {
2337 ; SSE-LABEL: shuffle_mem_v4f32_3210:
2338 ; SSE: # %bb.0:
2339 ; SSE-NEXT: movaps (%rdi), %xmm0
2340 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,2,1,0]
2341 ; SSE-NEXT: retq
2342 ;
2343 ; AVX-LABEL: shuffle_mem_v4f32_3210:
2344 ; AVX: # %bb.0:
2345 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[3,2,1,0]
2346 ; AVX-NEXT: retq
2347 %a = load <4 x float>, <4 x float>* %ptr
2348 %shuffle = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
2349 ret <4 x float> %shuffle
2350 }
2352 define <4 x i32> @insert_dup_mem_v4i32(i32* %ptr) {
2353 ; SSE-LABEL: insert_dup_mem_v4i32:
2354 ; SSE: # %bb.0:
2355 ; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
2356 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,0,0,0]
2357 ; SSE-NEXT: retq
2358 ;
2359 ; AVX-LABEL: insert_dup_mem_v4i32:
2360 ; AVX: # %bb.0:
2361 ; AVX-NEXT: vbroadcastss (%rdi), %xmm0
2362 ; AVX-NEXT: retq
2363 %tmp = load i32, i32* %ptr, align 4
2364 %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %tmp, i32 0
2365 %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> zeroinitializer
2366 ret <4 x i32> %tmp2
2367 }
2369 ; PR41249
2370 define <4 x float> @shuffle_mem_pmovzx_v4f32(<2 x float>* %p0, <4 x float>* %p1) {
2371 ; SSE-LABEL: shuffle_mem_pmovzx_v4f32:
2372 ; SSE: # %bb.0:
2373 ; SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
2374 ; SSE-NEXT: xorps %xmm1, %xmm1
2375 ; SSE-NEXT: movaps %xmm0, %xmm2
2376 ; SSE-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
2377 ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,0,0,0]
2378 ; SSE-NEXT: movaps %xmm2, (%rsi)
2379 ; SSE-NEXT: retq
2380 ;
2381 ; AVX1-LABEL: shuffle_mem_pmovzx_v4f32:
2382 ; AVX1: # %bb.0:
2383 ; AVX1-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2384 ; AVX1-NEXT: vxorps %xmm1, %xmm1, %xmm1
2385 ; AVX1-NEXT: vunpcklps {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
2386 ; AVX1-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,0,0,0]
2387 ; AVX1-NEXT: vmovaps %xmm1, (%rsi)
2388 ; AVX1-NEXT: retq
2389 ;
2390 ; AVX2OR512VL-LABEL: shuffle_mem_pmovzx_v4f32:
2391 ; AVX2OR512VL: # %bb.0:
2392 ; AVX2OR512VL-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
2393 ; AVX2OR512VL-NEXT: vxorps %xmm1, %xmm1, %xmm1
2394 ; AVX2OR512VL-NEXT: vunpcklps {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
2395 ; AVX2OR512VL-NEXT: vbroadcastss %xmm0, %xmm0
2396 ; AVX2OR512VL-NEXT: vmovaps %xmm1, (%rsi)
2397 ; AVX2OR512VL-NEXT: retq
2398 %1 = load <2 x float>, <2 x float>* %p0
2399 %2 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>
2400 %3 = shufflevector <4 x float> %2, <4 x float> <float undef, float undef, float 0.000000e+00, float 0.000000e+00>, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
2401 %4 = shufflevector <2 x float> %1, <2 x float> undef, <4 x i32> zeroinitializer
2402 store <4 x float> %3, <4 x float>* %p1
2403 ret <4 x float> %4
2404 }
2406 ;
2407 ; Shuffle to logical bit shifts
2408 ;
2410 define <4 x i32> @shuffle_v4i32_z0zX(<4 x i32> %a) {
2411 ; SSE-LABEL: shuffle_v4i32_z0zX:
2412 ; SSE: # %bb.0:
2413 ; SSE-NEXT: psllq $32, %xmm0
2414 ; SSE-NEXT: retq
2415 ;
2416 ; AVX-LABEL: shuffle_v4i32_z0zX:
2417 ; AVX: # %bb.0:
2418 ; AVX-NEXT: vpsllq $32, %xmm0, %xmm0
2419 ; AVX-NEXT: retq
2420 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 4, i32 undef>
2421 ret <4 x i32> %shuffle
2422 }
2424 define <4 x i32> @shuffle_v4i32_1z3z(<4 x i32> %a) {
2425 ; SSE-LABEL: shuffle_v4i32_1z3z:
2426 ; SSE: # %bb.0:
2427 ; SSE-NEXT: psrlq $32, %xmm0
2428 ; SSE-NEXT: retq
2429 ;
2430 ; AVX-LABEL: shuffle_v4i32_1z3z:
2431 ; AVX: # %bb.0:
2432 ; AVX-NEXT: vpsrlq $32, %xmm0, %xmm0
2433 ; AVX-NEXT: retq
2434 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 4, i32 3, i32 4>
2435 ret <4 x i32> %shuffle
2436 }
2438 define <4 x float> @shuffle_mem_v4f32_0145(<4 x float> %a, <4 x float>* %pb) {
2439 ; SSE-LABEL: shuffle_mem_v4f32_0145:
2440 ; SSE: # %bb.0:
2441 ; SSE-NEXT: movhps {{.*#+}} xmm0 = xmm0[0,1],mem[0,1]
2442 ; SSE-NEXT: retq
2443 ;
2444 ; AVX-LABEL: shuffle_mem_v4f32_0145:
2445 ; AVX: # %bb.0:
2446 ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
2447 ; AVX-NEXT: retq
2448 %b = load <4 x float>, <4 x float>* %pb, align 1
2449 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
2450 ret <4 x float> %shuffle
2451 }
2453 define <4 x float> @shuffle_mem_v4f32_4523(<4 x float> %a, <4 x float>* %pb) {
2454 ; SSE2-LABEL: shuffle_mem_v4f32_4523:
2455 ; SSE2: # %bb.0:
2456 ; SSE2-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2457 ; SSE2-NEXT: retq
2458 ;
2459 ; SSE3-LABEL: shuffle_mem_v4f32_4523:
2460 ; SSE3: # %bb.0:
2461 ; SSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2462 ; SSE3-NEXT: retq
2463 ;
2464 ; SSSE3-LABEL: shuffle_mem_v4f32_4523:
2465 ; SSSE3: # %bb.0:
2466 ; SSSE3-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2467 ; SSSE3-NEXT: retq
2468 ;
2469 ; SSE41-LABEL: shuffle_mem_v4f32_4523:
2470 ; SSE41: # %bb.0:
2471 ; SSE41-NEXT: movups (%rdi), %xmm1
2472 ; SSE41-NEXT: blendps {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3]
2473 ; SSE41-NEXT: retq
2474 ;
2475 ; AVX-LABEL: shuffle_mem_v4f32_4523:
2476 ; AVX: # %bb.0:
2477 ; AVX-NEXT: vblendps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3]
2478 ; AVX-NEXT: retq
2479 %b = load <4 x float>, <4 x float>* %pb, align 1
2480 %shuffle = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 4, i32 5, i32 2, i32 3>
2481 ret <4 x float> %shuffle
2482 }