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[RISCV] Support 'f' Inline Assembly Constraint
[llvm-core.git] / test / CodeGen / XCore / 2009-03-27-v2f64-param.ll
blobe35a36a8a159d621aa2d66e23adbebe8e31352d5
1 ; RUN: llc < %s -march=xcore
2 ; PR3898
3
4 define i32 @vector_param(<2 x double> %x) nounwind {
5        ret i32 1
6 }
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