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[RISCV] Support 'f' Inline Assembly Constraint
[llvm-core.git]
/
test
/
CodeGen
/
XCore
/
call.ll
blob
06a12f1444054e60f88357d38f17b92436ffa886
1
; RUN: llc < %s -march=xcore | FileCheck %s
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; CHECK-LABEL: bl_imm:
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; CHECK: ldw [[R0:r[0-9]+]], cp
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; CHECK: bla [[R0]]
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define void @bl_imm() nounwind {
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entry:
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tail call void inttoptr (i64 65536 to void ()*)() nounwind
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ret void
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}