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[RISCV] Support 'f' Inline Assembly Constraint
[llvm-core.git]
/
test
/
CodeGen
/
XCore
/
constants.ll
blob
c289bf94ce30d153879b2143eba2e44817cc6d94
1
; RUN: llc < %s -march=xcore -mcpu=xs1b-generic | FileCheck %s
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; CHECK: .section .cp.rodata.cst4,"aMc",@progbits,4
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; CHECK: .LCPI0_0:
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; CHECK: .long 12345678
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; CHECK-LABEL: f:
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; CHECK: ldw r0, cp[.LCPI0_0]
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define i32 @f() {
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entry:
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ret i32 12345678
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}
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define i32 @g() {
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entry:
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; CHECK-LABEL: g:
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; CHECK: mkmsk r0, 1
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; CHECK: retsp 0
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ret i32 1;
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}