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[RISCV] Support 'f' Inline Assembly Constraint
[llvm-core.git]
/
test
/
CodeGen
/
XCore
/
private.ll
blob
a188864a866cb5e0b809c80834d6d96c6b176f0d
1
; Test to make sure that the 'private' is used correctly.
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;
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; RUN: llc < %s -march=xcore | FileCheck %s
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define private void @foo() {
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; CHECK: .Lfoo:
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ret void
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}
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@baz = private global i32 4
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define i32 @bar() {
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; CHECK-LABEL: bar:
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; CHECK: bl .Lfoo
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; CHECK: ldw r0, dp[.Lbaz]
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call void @foo()
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%1 = load i32, i32* @baz, align 4
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ret i32 %1
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}
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; CHECK: .Lbaz: