llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h

   1 //===-- AArch64InstPrinter.h - Convert AArch64 MCInst to assembly syntax --===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This class prints an AArch64 MCInst to a .s file.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
  14 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H
  15
  16 #include "MCTargetDesc/AArch64MCTargetDesc.h"
  17 #include "llvm/ADT/StringRef.h"
  18 #include "llvm/MC/MCInstPrinter.h"
  19 #include "../Utils/AArch64BaseInfo.h"
  20
  21 namespace llvm {
  22
  23 class AArch64InstPrinter : public MCInstPrinter {
  24 public:
  25   AArch64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
  26                      const MCRegisterInfo &MRI);
  27
  28   bool applyTargetSpecificCLOption(StringRef Opt) override;
  29
  30   void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
  31                  const MCSubtargetInfo &STI, raw_ostream &O) override;
  32   void printRegName(raw_ostream &OS, unsigned RegNo) const override;
  33
  34   // Autogenerated by tblgen.
  35   std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
  36   virtual void printInstruction(const MCInst *MI, uint64_t Address,
  37                                 const MCSubtargetInfo &STI, raw_ostream &O);
  38   virtual bool printAliasInstr(const MCInst *MI, uint64_t Address,
  39                                const MCSubtargetInfo &STI, raw_ostream &O);
  40   virtual void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
  41                                        unsigned OpIdx, unsigned PrintMethodIdx,
  42                                        const MCSubtargetInfo &STI,
  43                                        raw_ostream &O);
  44
  45   virtual StringRef getRegName(unsigned RegNo) const {
  46     return getRegisterName(RegNo);
  47   }
  48
  49   static const char *getRegisterName(unsigned RegNo,
  50                                      unsigned AltIdx = AArch64::NoRegAltName);
  51
  52 protected:
  53   bool printSysAlias(const MCInst *MI, const MCSubtargetInfo &STI,
  54                      raw_ostream &O);
  55   // Operand printers
  56   void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  57                     raw_ostream &O);
  58   void printImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  59                 raw_ostream &O);
  60   void printImmHex(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  61                    raw_ostream &O);
  62   template <int Size>
  63   void printSImm(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
  64                  raw_ostream &O);
  65   template <typename T> void printImmSVE(T Value, raw_ostream &O);
  66   void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
  67                            raw_ostream &O);
  68   template <int Amount>
  69   void printPostIncOperand(const MCInst *MI, unsigned OpNo,
  70                            const MCSubtargetInfo &STI, raw_ostream &O) {
  71     printPostIncOperand(MI, OpNo, Amount, O);
  72   }
  73
  74   void printVRegOperand(const MCInst *MI, unsigned OpNo,
  75                         const MCSubtargetInfo &STI, raw_ostream &O);
  76   void printSysCROperand(const MCInst *MI, unsigned OpNo,
  77                          const MCSubtargetInfo &STI, raw_ostream &O);
  78   void printAddSubImm(const MCInst *MI, unsigned OpNum,
  79                       const MCSubtargetInfo &STI, raw_ostream &O);
  80   template <typename T>
  81   void printLogicalImm(const MCInst *MI, unsigned OpNum,
  82                        const MCSubtargetInfo &STI, raw_ostream &O);
  83   void printShifter(const MCInst *MI, unsigned OpNum,
  84                     const MCSubtargetInfo &STI, raw_ostream &O);
  85   void printShiftedRegister(const MCInst *MI, unsigned OpNum,
  86                             const MCSubtargetInfo &STI, raw_ostream &O);
  87   void printExtendedRegister(const MCInst *MI, unsigned OpNum,
  88                              const MCSubtargetInfo &STI, raw_ostream &O);
  89   void printArithExtend(const MCInst *MI, unsigned OpNum,
  90                         const MCSubtargetInfo &STI, raw_ostream &O);
  91
  92   void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
  93                       char SrcRegKind, unsigned Width);
  94   template <char SrcRegKind, unsigned Width>
  95   void printMemExtend(const MCInst *MI, unsigned OpNum,
  96                       const MCSubtargetInfo &STI, raw_ostream &O) {
  97     printMemExtend(MI, OpNum, O, SrcRegKind, Width);
  98   }
  99   template <bool SignedExtend, int ExtWidth, char SrcRegKind, char Suffix>
 100   void printRegWithShiftExtend(const MCInst *MI, unsigned OpNum,
 101                                const MCSubtargetInfo &STI, raw_ostream &O);
 102   void printCondCode(const MCInst *MI, unsigned OpNum,
 103                      const MCSubtargetInfo &STI, raw_ostream &O);
 104   void printInverseCondCode(const MCInst *MI, unsigned OpNum,
 105                             const MCSubtargetInfo &STI, raw_ostream &O);
 106   void printAlignedLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
 107                          const MCSubtargetInfo &STI, raw_ostream &O);
 108   void printUImm12Offset(const MCInst *MI, unsigned OpNum, unsigned Scale,
 109                          raw_ostream &O);
 110   void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
 111                         raw_ostream &O);
 112
 113   template <int Scale>
 114   void printUImm12Offset(const MCInst *MI, unsigned OpNum,
 115                          const MCSubtargetInfo &STI, raw_ostream &O) {
 116     printUImm12Offset(MI, OpNum, Scale, O);
 117   }
 118
 119   template <int BitWidth>
 120   void printAMIndexedWB(const MCInst *MI, unsigned OpNum,
 121                         const MCSubtargetInfo &STI, raw_ostream &O) {
 122     printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
 123   }
 124
 125   void printAMNoIndex(const MCInst *MI, unsigned OpNum,
 126                       const MCSubtargetInfo &STI, raw_ostream &O);
 127
 128   template <int Scale>
 129   void printImmScale(const MCInst *MI, unsigned OpNum,
 130                      const MCSubtargetInfo &STI, raw_ostream &O);
 131
 132   template <bool IsSVEPrefetch = false>
 133   void printPrefetchOp(const MCInst *MI, unsigned OpNum,
 134                        const MCSubtargetInfo &STI, raw_ostream &O);
 135
 136   void printPSBHintOp(const MCInst *MI, unsigned OpNum,
 137                       const MCSubtargetInfo &STI, raw_ostream &O);
 138
 139   void printBTIHintOp(const MCInst *MI, unsigned OpNum,
 140                       const MCSubtargetInfo &STI, raw_ostream &O);
 141
 142   void printFPImmOperand(const MCInst *MI, unsigned OpNum,
 143                          const MCSubtargetInfo &STI, raw_ostream &O);
 144
 145   void printVectorList(const MCInst *MI, unsigned OpNum,
 146                        const MCSubtargetInfo &STI, raw_ostream &O,
 147                        StringRef LayoutSuffix);
 148
 149   void printMatrixTileList(const MCInst *MI, unsigned OpNum,
 150                            const MCSubtargetInfo &STI, raw_ostream &O);
 151
 152   /// Print a list of vector registers where the type suffix is implicit
 153   /// (i.e. attached to the instruction rather than the registers).
 154   void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
 155                                       const MCSubtargetInfo &STI,
 156                                       raw_ostream &O);
 157
 158   template <unsigned NumLanes, char LaneKind>
 159   void printTypedVectorList(const MCInst *MI, unsigned OpNum,
 160                             const MCSubtargetInfo &STI, raw_ostream &O);
 161
 162   void printVectorIndex(const MCInst *MI, unsigned OpNum,
 163                         const MCSubtargetInfo &STI, raw_ostream &O);
 164   void printMatrixIndex(const MCInst *MI, unsigned OpNum,
 165                         const MCSubtargetInfo &STI, raw_ostream &O);
 166   void printAdrpLabel(const MCInst *MI, uint64_t Address, unsigned OpNum,
 167                       const MCSubtargetInfo &STI, raw_ostream &O);
 168   void printBarrierOption(const MCInst *MI, unsigned OpNum,
 169                           const MCSubtargetInfo &STI, raw_ostream &O);
 170   void printBarriernXSOption(const MCInst *MI, unsigned OpNum,
 171                              const MCSubtargetInfo &STI, raw_ostream &O);
 172   void printMSRSystemRegister(const MCInst *MI, unsigned OpNum,
 173                               const MCSubtargetInfo &STI, raw_ostream &O);
 174   void printMRSSystemRegister(const MCInst *MI, unsigned OpNum,
 175                               const MCSubtargetInfo &STI, raw_ostream &O);
 176   void printSystemPStateField(const MCInst *MI, unsigned OpNum,
 177                               const MCSubtargetInfo &STI, raw_ostream &O);
 178   void printSIMDType10Operand(const MCInst *MI, unsigned OpNum,
 179                               const MCSubtargetInfo &STI, raw_ostream &O);
 180   template<int64_t Angle, int64_t Remainder>
 181   void printComplexRotationOp(const MCInst *MI, unsigned OpNo,
 182                             const MCSubtargetInfo &STI, raw_ostream &O);
 183   template<unsigned size>
 184   void printGPRSeqPairsClassOperand(const MCInst *MI, unsigned OpNum,
 185                                     const MCSubtargetInfo &STI,
 186                                     raw_ostream &O);
 187   template <typename T>
 188   void printImm8OptLsl(const MCInst *MI, unsigned OpNum,
 189                        const MCSubtargetInfo &STI, raw_ostream &O);
 190   template <typename T>
 191   void printSVELogicalImm(const MCInst *MI, unsigned OpNum,
 192                           const MCSubtargetInfo &STI, raw_ostream &O);
 193   void printSVEPattern(const MCInst *MI, unsigned OpNum,
 194                        const MCSubtargetInfo &STI, raw_ostream &O);
 195
 196   template <bool IsVertical>
 197   void printMatrixTileVector(const MCInst *MI, unsigned OpNum,
 198                              const MCSubtargetInfo &STI, raw_ostream &O);
 199   void printMatrixTile(const MCInst *MI, unsigned OpNum,
 200                        const MCSubtargetInfo &STI, raw_ostream &O);
 201   template <int EltSize>
 202   void printMatrix(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
 203                    raw_ostream &O);
 204   void printSVCROp(const MCInst *MI, unsigned OpNum, const MCSubtargetInfo &STI,
 205                    raw_ostream &O);
 206   template <char = 0>
 207   void printSVERegOp(const MCInst *MI, unsigned OpNum,
 208                     const MCSubtargetInfo &STI, raw_ostream &O);
 209   void printGPR64as32(const MCInst *MI, unsigned OpNum,
 210                       const MCSubtargetInfo &STI, raw_ostream &O);
 211   void printGPR64x8(const MCInst *MI, unsigned OpNum,
 212                     const MCSubtargetInfo &STI, raw_ostream &O);
 213   template <int Width>
 214   void printZPRasFPR(const MCInst *MI, unsigned OpNum,
 215                      const MCSubtargetInfo &STI, raw_ostream &O);
 216   template <unsigned ImmIs0, unsigned ImmIs1>
 217   void printExactFPImm(const MCInst *MI, unsigned OpNum,
 218                        const MCSubtargetInfo &STI, raw_ostream &O);
 219 };
 220
 221 class AArch64AppleInstPrinter : public AArch64InstPrinter {
 222 public:
 223   AArch64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
 224                           const MCRegisterInfo &MRI);
 225
 226   void printInst(const MCInst *MI, uint64_t Address, StringRef Annot,
 227                  const MCSubtargetInfo &STI, raw_ostream &O) override;
 228
 229   std::pair<const char *, uint64_t> getMnemonic(const MCInst *MI) override;
 230   void printInstruction(const MCInst *MI, uint64_t Address,
 231                         const MCSubtargetInfo &STI, raw_ostream &O) override;
 232   bool printAliasInstr(const MCInst *MI, uint64_t Address,
 233                        const MCSubtargetInfo &STI, raw_ostream &O) override;
 234   void printCustomAliasOperand(const MCInst *MI, uint64_t Address,
 235                                unsigned OpIdx, unsigned PrintMethodIdx,
 236                                const MCSubtargetInfo &STI,
 237                                raw_ostream &O) override;
 238
 239   StringRef getRegName(unsigned RegNo) const override {
 240     return getRegisterName(RegNo);
 241   }
 242
 243   static const char *getRegisterName(unsigned RegNo,
 244                                      unsigned AltIdx = AArch64::NoRegAltName);
 245 };
 246
 247 } // end namespace llvm
 248
 249 #endif // LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64INSTPRINTER_H