| blob | 201bc5be545068a126664cde38fd750fe50314cb |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
3 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
4 ; RUN: FileCheck %s --check-prefix=CHECK-LE-P8
5 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
6 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64le-unknown-linux-gnu < %s | \
7 ; RUN: FileCheck %s --check-prefix=CHECK-LE-P9
8 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
9 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
10 ; RUN: FileCheck %s --check-prefix=CHECK-BE-P8
11 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
12 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-unknown-linux-gnu < %s | \
13 ; RUN: FileCheck %s --check-prefix=CHECK-BE-P9
15 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
16 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
17 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P8
18 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
19 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc64-ibm-aix < %s | \
20 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-64-P9
21 ; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-asm-full-reg-names \
22 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
23 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P8
24 ; RUN: llc -verify-machineinstrs -mcpu=pwr9 -ppc-asm-full-reg-names \
25 ; RUN: -ppc-vsr-nums-as-vr -mtriple=powerpc-ibm-aix < %s | \
26 ; RUN: FileCheck %s --check-prefix=CHECK-AIX-32-P9
28 define void @test_none_v8i16(ptr %a0, ptr %a1, <16 x i8> %a, <8 x i16> %b, i8 %arg) {
29 ; CHECK-LE-P8-LABEL: test_none_v8i16:
30 ; CHECK-LE-P8: # %bb.0: # %entry
31 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI0_0@toc@ha
32 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
33 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI0_0@toc@l
34 ; CHECK-LE-P8-NEXT: mtvsrd v4, r3
35 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
36 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
37 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
38 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
39 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
40 ; CHECK-LE-P8-NEXT: blr
41 ;
42 ; CHECK-LE-P9-LABEL: test_none_v8i16:
43 ; CHECK-LE-P9: # %bb.0: # %entry
44 ; CHECK-LE-P9-NEXT: lxsihzx f0, 0, r3
45 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha
46 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI0_0@toc@l
47 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
48 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
49 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
50 ; CHECK-LE-P9-NEXT: blr
51 ;
52 ; CHECK-BE-P8-LABEL: test_none_v8i16:
53 ; CHECK-BE-P8: # %bb.0: # %entry
54 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
55 ; CHECK-BE-P8-NEXT: mtvsrwz v3, r3
56 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI0_0@toc@ha
57 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI0_0@toc@l
58 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
59 ; CHECK-BE-P8-NEXT: vperm v2, v2, v3, v4
60 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
61 ; CHECK-BE-P8-NEXT: blr
62 ;
63 ; CHECK-BE-P9-LABEL: test_none_v8i16:
64 ; CHECK-BE-P9: # %bb.0: # %entry
65 ; CHECK-BE-P9-NEXT: lxsihzx f0, 0, r3
66 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha
67 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI0_0@toc@l
68 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
69 ; CHECK-BE-P9-NEXT: xxperm vs0, v2, vs1
70 ; CHECK-BE-P9-NEXT: stxv vs0, 0(r3)
71 ; CHECK-BE-P9-NEXT: blr
72 ;
73 ; CHECK-AIX-64-P8-LABEL: test_none_v8i16:
74 ; CHECK-AIX-64-P8: # %bb.0: # %entry
75 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
76 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v3, r3
77 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C0(r2) # %const.0
78 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
79 ; CHECK-AIX-64-P8-NEXT: vperm v2, v2, v3, v4
80 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
81 ; CHECK-AIX-64-P8-NEXT: blr
82 ;
83 ; CHECK-AIX-64-P9-LABEL: test_none_v8i16:
84 ; CHECK-AIX-64-P9: # %bb.0: # %entry
85 ; CHECK-AIX-64-P9-NEXT: lxsihzx f0, 0, r3
86 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C0(r2) # %const.0
87 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
88 ; CHECK-AIX-64-P9-NEXT: xxperm vs0, v2, vs1
89 ; CHECK-AIX-64-P9-NEXT: stxv vs0, 0(r3)
90 ; CHECK-AIX-64-P9-NEXT: blr
91 ;
92 ; CHECK-AIX-32-P8-LABEL: test_none_v8i16:
93 ; CHECK-AIX-32-P8: # %bb.0: # %entry
94 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
95 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v3, r3
96 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C0(r2) # %const.0
97 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
98 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
99 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
100 ; CHECK-AIX-32-P8-NEXT: blr
101 ;
102 ; CHECK-AIX-32-P9-LABEL: test_none_v8i16:
103 ; CHECK-AIX-32-P9: # %bb.0: # %entry
104 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
105 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C0(r2) # %const.0
106 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
107 ; CHECK-AIX-32-P9-NEXT: xxperm vs0, v2, vs1
108 ; CHECK-AIX-32-P9-NEXT: stxv vs0, 0(r3)
109 ; CHECK-AIX-32-P9-NEXT: blr
110 entry:
111 %load0.tmp = load <2 x i8>, ptr %a0
112 %load0.tmp1 = bitcast <2 x i8> %load0.tmp to i16
113 %load0 = insertelement <8 x i16> %b, i16 %load0.tmp1, i64 0
114 %load1.tmp = insertelement <16 x i8> %a, i8 %arg, i32 0
115 %load1 = bitcast <16 x i8> %load1.tmp to <8 x i16>
116 %shuff = shufflevector <8 x i16> %load0, <8 x i16> %load1, <8 x i32> <i32 9, i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
117 store <8 x i16> %shuff, ptr undef
118 ret void
119 }
121 define void @test_v8i16_none(ptr %a0, ptr %a1, <16 x i8> %a, <8 x i16> %b, i8 %arg) {
122 ; CHECK-LE-P8-LABEL: test_v8i16_none:
123 ; CHECK-LE-P8: # %bb.0: # %entry
124 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI1_0@toc@ha
125 ; CHECK-LE-P8-NEXT: mtvsrd v4, r9
126 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
127 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI1_0@toc@l
128 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
129 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI1_1@toc@ha
130 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI1_1@toc@l
131 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
132 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
133 ; CHECK-LE-P8-NEXT: vperm v2, v2, v4, v3
134 ; CHECK-LE-P8-NEXT: mtvsrd v4, r3
135 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
136 ; CHECK-LE-P8-NEXT: vperm v2, v2, v4, v3
137 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
138 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
139 ; CHECK-LE-P8-NEXT: blr
140 ;
141 ; CHECK-LE-P9-LABEL: test_v8i16_none:
142 ; CHECK-LE-P9: # %bb.0: # %entry
143 ; CHECK-LE-P9-NEXT: lxsihzx f0, 0, r3
144 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha
145 ; CHECK-LE-P9-NEXT: mtvsrwz v3, r9
146 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI1_0@toc@l
147 ; CHECK-LE-P9-NEXT: vinsertb v2, v3, 15
148 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
149 ; CHECK-LE-P9-NEXT: xxperm vs0, v2, vs1
150 ; CHECK-LE-P9-NEXT: stxv vs0, 0(r3)
151 ; CHECK-LE-P9-NEXT: blr
152 ;
153 ; CHECK-BE-P8-LABEL: test_v8i16_none:
154 ; CHECK-BE-P8: # %bb.0: # %entry
155 ; CHECK-BE-P8-NEXT: addis r4, r2, .LCPI1_0@toc@ha
156 ; CHECK-BE-P8-NEXT: mtvsrwz v4, r9
157 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
158 ; CHECK-BE-P8-NEXT: addi r4, r4, .LCPI1_0@toc@l
159 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r4
160 ; CHECK-BE-P8-NEXT: vperm v2, v4, v2, v3
161 ; CHECK-BE-P8-NEXT: mtvsrwz v3, r3
162 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI1_1@toc@ha
163 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI1_1@toc@l
164 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
165 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
166 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
167 ; CHECK-BE-P8-NEXT: blr
168 ;
169 ; CHECK-BE-P9-LABEL: test_v8i16_none:
170 ; CHECK-BE-P9: # %bb.0: # %entry
171 ; CHECK-BE-P9-NEXT: lxsihzx f0, 0, r3
172 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha
173 ; CHECK-BE-P9-NEXT: mtvsrwz v3, r9
174 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI1_0@toc@l
175 ; CHECK-BE-P9-NEXT: vinsertb v2, v3, 0
176 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
177 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
178 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
179 ; CHECK-BE-P9-NEXT: blr
180 ;
181 ; CHECK-AIX-64-P8-LABEL: test_v8i16_none:
182 ; CHECK-AIX-64-P8: # %bb.0: # %entry
183 ; CHECK-AIX-64-P8-NEXT: ld r4, L..C1(r2) # %const.0
184 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v4, r5
185 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
186 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r4
187 ; CHECK-AIX-64-P8-NEXT: vperm v2, v4, v2, v3
188 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v3, r3
189 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C2(r2) # %const.1
190 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
191 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
192 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
193 ; CHECK-AIX-64-P8-NEXT: blr
194 ;
195 ; CHECK-AIX-64-P9-LABEL: test_v8i16_none:
196 ; CHECK-AIX-64-P9: # %bb.0: # %entry
197 ; CHECK-AIX-64-P9-NEXT: lxsihzx f0, 0, r3
198 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C1(r2) # %const.0
199 ; CHECK-AIX-64-P9-NEXT: mtvsrwz v3, r5
200 ; CHECK-AIX-64-P9-NEXT: vinsertb v2, v3, 0
201 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
202 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
203 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
204 ; CHECK-AIX-64-P9-NEXT: blr
205 ;
206 ; CHECK-AIX-32-P8-LABEL: test_v8i16_none:
207 ; CHECK-AIX-32-P8: # %bb.0: # %entry
208 ; CHECK-AIX-32-P8-NEXT: lwz r4, L..C1(r2) # %const.0
209 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v4, r5
210 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
211 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r4
212 ; CHECK-AIX-32-P8-NEXT: vperm v2, v4, v2, v3
213 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v3, r3
214 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C2(r2) # %const.1
215 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
216 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
217 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
218 ; CHECK-AIX-32-P8-NEXT: blr
219 ;
220 ; CHECK-AIX-32-P9-LABEL: test_v8i16_none:
221 ; CHECK-AIX-32-P9: # %bb.0: # %entry
222 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
223 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C1(r2) # %const.0
224 ; CHECK-AIX-32-P9-NEXT: mtvsrwz v3, r5
225 ; CHECK-AIX-32-P9-NEXT: vinsertb v2, v3, 0
226 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
227 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
228 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
229 ; CHECK-AIX-32-P9-NEXT: blr
230 entry:
231 %load0.tmp = load <2 x i8>, ptr %a0
232 %load0.tmp1 = bitcast <2 x i8> %load0.tmp to i16
233 %load0 = insertelement <8 x i16> %b, i16 %load0.tmp1, i64 0
234 %load1.tmp = insertelement <16 x i8> %a, i8 %arg, i32 0
235 %load1 = bitcast <16 x i8> %load1.tmp to <8 x i16>
236 %shuff = shufflevector <8 x i16> %load0, <8 x i16> %load1, <8 x i32> <i32 0, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14>
237 store <8 x i16> %shuff, ptr undef
238 ret void
239 }
241 define void @test_none_v4i32(ptr %ptr, ptr %ptr2, i8 %v3) local_unnamed_addr #0 {
242 ; CHECK-LE-P8-LABEL: test_none_v4i32:
243 ; CHECK-LE-P8: # %bb.0: # %entry
244 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI2_0@toc@ha
245 ; CHECK-LE-P8-NEXT: mtvsrd v3, r5
246 ; CHECK-LE-P8-NEXT: lxsiwzx v4, 0, r3
247 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI2_0@toc@l
248 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
249 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI2_1@toc@ha
250 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI2_1@toc@l
251 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
252 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
253 ; CHECK-LE-P8-NEXT: vperm v2, v3, v3, v2
254 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
255 ; CHECK-LE-P8-NEXT: vperm v2, v2, v4, v3
256 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
257 ; CHECK-LE-P8-NEXT: stfdx f0, 0, r3
258 ; CHECK-LE-P8-NEXT: blr
259 ;
260 ; CHECK-LE-P9-LABEL: test_none_v4i32:
261 ; CHECK-LE-P9: # %bb.0: # %entry
262 ; CHECK-LE-P9-NEXT: lxsiwzx v2, 0, r3
263 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI2_0@toc@ha
264 ; CHECK-LE-P9-NEXT: mtvsrd v3, r5
265 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI2_0@toc@l
266 ; CHECK-LE-P9-NEXT: lxv vs0, 0(r3)
267 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI2_1@toc@ha
268 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI2_1@toc@l
269 ; CHECK-LE-P9-NEXT: lxv v4, 0(r3)
270 ; CHECK-LE-P9-NEXT: xxperm v3, v3, vs0
271 ; CHECK-LE-P9-NEXT: vperm v2, v3, v2, v4
272 ; CHECK-LE-P9-NEXT: xxswapd vs0, v2
273 ; CHECK-LE-P9-NEXT: stfd f0, 0(r3)
274 ; CHECK-LE-P9-NEXT: blr
275 ;
276 ; CHECK-BE-P8-LABEL: test_none_v4i32:
277 ; CHECK-BE-P8: # %bb.0: # %entry
278 ; CHECK-BE-P8-NEXT: addis r4, r2, .LCPI2_0@toc@ha
279 ; CHECK-BE-P8-NEXT: mtvsrwz v2, r5
280 ; CHECK-BE-P8-NEXT: addi r4, r4, .LCPI2_0@toc@l
281 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r4
282 ; CHECK-BE-P8-NEXT: vperm v2, v2, v2, v3
283 ; CHECK-BE-P8-NEXT: lxsiwzx v3, 0, r3
284 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI2_1@toc@ha
285 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI2_1@toc@l
286 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
287 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
288 ; CHECK-BE-P8-NEXT: stxsdx v2, 0, r3
289 ; CHECK-BE-P8-NEXT: blr
290 ;
291 ; CHECK-BE-P9-LABEL: test_none_v4i32:
292 ; CHECK-BE-P9: # %bb.0: # %entry
293 ; CHECK-BE-P9-NEXT: lxsiwzx v2, 0, r3
294 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI2_0@toc@ha
295 ; CHECK-BE-P9-NEXT: mtvsrwz v3, r5
296 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI2_0@toc@l
297 ; CHECK-BE-P9-NEXT: lxv vs0, 0(r3)
298 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI2_1@toc@ha
299 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI2_1@toc@l
300 ; CHECK-BE-P9-NEXT: lxv v4, 0(r3)
301 ; CHECK-BE-P9-NEXT: xxperm v3, v3, vs0
302 ; CHECK-BE-P9-NEXT: vperm v2, v2, v3, v4
303 ; CHECK-BE-P9-NEXT: stxsd v2, 0(r3)
304 ; CHECK-BE-P9-NEXT: blr
305 ;
306 ; CHECK-AIX-64-P8-LABEL: test_none_v4i32:
307 ; CHECK-AIX-64-P8: # %bb.0: # %entry
308 ; CHECK-AIX-64-P8-NEXT: ld r4, L..C3(r2) # %const.0
309 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v2, r5
310 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r4
311 ; CHECK-AIX-64-P8-NEXT: vperm v2, v2, v2, v3
312 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v3, 0, r3
313 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C4(r2) # %const.1
314 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
315 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
316 ; CHECK-AIX-64-P8-NEXT: stxsdx v2, 0, r3
317 ; CHECK-AIX-64-P8-NEXT: blr
318 ;
319 ; CHECK-AIX-64-P9-LABEL: test_none_v4i32:
320 ; CHECK-AIX-64-P9: # %bb.0: # %entry
321 ; CHECK-AIX-64-P9-NEXT: lxsiwzx v2, 0, r3
322 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C2(r2) # %const.0
323 ; CHECK-AIX-64-P9-NEXT: mtvsrwz v3, r5
324 ; CHECK-AIX-64-P9-NEXT: lxv vs0, 0(r3)
325 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C3(r2) # %const.1
326 ; CHECK-AIX-64-P9-NEXT: lxv v4, 0(r3)
327 ; CHECK-AIX-64-P9-NEXT: xxperm v3, v3, vs0
328 ; CHECK-AIX-64-P9-NEXT: vperm v2, v2, v3, v4
329 ; CHECK-AIX-64-P9-NEXT: stxsd v2, 0(r3)
330 ; CHECK-AIX-64-P9-NEXT: blr
331 ;
332 ; CHECK-AIX-32-P8-LABEL: test_none_v4i32:
333 ; CHECK-AIX-32-P8: # %bb.0: # %entry
334 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
335 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -32
336 ; CHECK-AIX-32-P8-NEXT: stb r5, -32(r1)
337 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
338 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C3(r2) # %const.0
339 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
340 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -16
341 ; CHECK-AIX-32-P8-NEXT: vmrghh v3, v3, v3
342 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
343 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
344 ; CHECK-AIX-32-P8-NEXT: lwz r3, -12(r1)
345 ; CHECK-AIX-32-P8-NEXT: stw r3, 0(r3)
346 ; CHECK-AIX-32-P8-NEXT: lwz r3, -16(r1)
347 ; CHECK-AIX-32-P8-NEXT: stw r3, 0(r3)
348 ; CHECK-AIX-32-P8-NEXT: blr
349 ;
350 ; CHECK-AIX-32-P9-LABEL: test_none_v4i32:
351 ; CHECK-AIX-32-P9: # %bb.0: # %entry
352 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
353 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C2(r2) # %const.0
354 ; CHECK-AIX-32-P9-NEXT: stb r5, -32(r1)
355 ; CHECK-AIX-32-P9-NEXT: lxv v3, -32(r1)
356 ; CHECK-AIX-32-P9-NEXT: lxv v4, 0(r3)
357 ; CHECK-AIX-32-P9-NEXT: vmrghh v3, v3, v3
358 ; CHECK-AIX-32-P9-NEXT: vperm v2, v2, v3, v4
359 ; CHECK-AIX-32-P9-NEXT: stxv v2, -16(r1)
360 ; CHECK-AIX-32-P9-NEXT: lwz r3, -12(r1)
361 ; CHECK-AIX-32-P9-NEXT: stw r3, 0(r3)
362 ; CHECK-AIX-32-P9-NEXT: lwz r3, -16(r1)
363 ; CHECK-AIX-32-P9-NEXT: stw r3, 0(r3)
364 ; CHECK-AIX-32-P9-NEXT: blr
365 entry:
366 %0 = load <2 x i16>, ptr %ptr, align 4
367 %tmp = insertelement <4 x i8> undef, i8 %v3, i32 0
368 %tmp0 = bitcast <4 x i8> %tmp to <2 x i16>
369 %1 = shufflevector <2 x i16> %0, <2 x i16> %tmp0, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
370 store <4 x i16> %1, ptr undef, align 4
371 ret void
372 }
374 define void @test_v4i32_none(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
375 ; CHECK-LE-P8-LABEL: test_v4i32_none:
376 ; CHECK-LE-P8: # %bb.0: # %entry
377 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI3_0@toc@ha
378 ; CHECK-LE-P8-NEXT: lxsiwzx v3, 0, r3
379 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
380 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI3_0@toc@l
381 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
382 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
383 ; CHECK-LE-P8-NEXT: vperm v2, v4, v3, v2
384 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
385 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
386 ; CHECK-LE-P8-NEXT: blr
387 ;
388 ; CHECK-LE-P9-LABEL: test_v4i32_none:
389 ; CHECK-LE-P9: # %bb.0: # %entry
390 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r3
391 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha
392 ; CHECK-LE-P9-NEXT: xxlxor vs2, vs2, vs2
393 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI3_0@toc@l
394 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
395 ; CHECK-LE-P9-NEXT: xxperm vs0, vs2, vs1
396 ; CHECK-LE-P9-NEXT: stxv vs0, 0(r3)
397 ; CHECK-LE-P9-NEXT: blr
398 ;
399 ; CHECK-BE-P8-LABEL: test_v4i32_none:
400 ; CHECK-BE-P8: # %bb.0: # %entry
401 ; CHECK-BE-P8-NEXT: lxsiwzx v2, 0, r3
402 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI3_0@toc@ha
403 ; CHECK-BE-P8-NEXT: xxlxor v4, v4, v4
404 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI3_0@toc@l
405 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r3
406 ; CHECK-BE-P8-NEXT: vperm v2, v4, v2, v3
407 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
408 ; CHECK-BE-P8-NEXT: blr
409 ;
410 ; CHECK-BE-P9-LABEL: test_v4i32_none:
411 ; CHECK-BE-P9: # %bb.0: # %entry
412 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r3
413 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha
414 ; CHECK-BE-P9-NEXT: xxlxor vs2, vs2, vs2
415 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI3_0@toc@l
416 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
417 ; CHECK-BE-P9-NEXT: xxperm vs0, vs2, vs1
418 ; CHECK-BE-P9-NEXT: stxv vs0, 0(r3)
419 ; CHECK-BE-P9-NEXT: blr
420 ;
421 ; CHECK-AIX-64-P8-LABEL: test_v4i32_none:
422 ; CHECK-AIX-64-P8: # %bb.0: # %entry
423 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v2, 0, r3
424 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C5(r2) # %const.0
425 ; CHECK-AIX-64-P8-NEXT: xxlxor v4, v4, v4
426 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r3
427 ; CHECK-AIX-64-P8-NEXT: vperm v2, v4, v2, v3
428 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
429 ; CHECK-AIX-64-P8-NEXT: blr
430 ;
431 ; CHECK-AIX-64-P9-LABEL: test_v4i32_none:
432 ; CHECK-AIX-64-P9: # %bb.0: # %entry
433 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r3
434 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C4(r2) # %const.0
435 ; CHECK-AIX-64-P9-NEXT: xxlxor vs2, vs2, vs2
436 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
437 ; CHECK-AIX-64-P9-NEXT: xxperm vs0, vs2, vs1
438 ; CHECK-AIX-64-P9-NEXT: stxv vs0, 0(r3)
439 ; CHECK-AIX-64-P9-NEXT: blr
440 ;
441 ; CHECK-AIX-32-P8-LABEL: test_v4i32_none:
442 ; CHECK-AIX-32-P8: # %bb.0: # %entry
443 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
444 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C4(r2) # %const.0
445 ; CHECK-AIX-32-P8-NEXT: xxlxor v4, v4, v4
446 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
447 ; CHECK-AIX-32-P8-NEXT: vperm v2, v4, v2, v3
448 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
449 ; CHECK-AIX-32-P8-NEXT: blr
450 ;
451 ; CHECK-AIX-32-P9-LABEL: test_v4i32_none:
452 ; CHECK-AIX-32-P9: # %bb.0: # %entry
453 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r3
454 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C3(r2) # %const.0
455 ; CHECK-AIX-32-P9-NEXT: xxlxor vs2, vs2, vs2
456 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
457 ; CHECK-AIX-32-P9-NEXT: xxperm vs0, vs2, vs1
458 ; CHECK-AIX-32-P9-NEXT: stxv vs0, 0(r3)
459 ; CHECK-AIX-32-P9-NEXT: blr
460 entry:
461 %0 = load <2 x i16>, ptr %ptr1, align 1
462 %1 = load <2 x i16>, ptr %ptr2, align 1
463 %shuffle1 = shufflevector <2 x i16> %0, <2 x i16> %1, <4 x i32> <i32 1, i32 0, i32 1, i32 0>
464 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
465 store <4 x i32> %2, ptr undef, align 16
466 ret void
467 }
469 define void @test_none_v2i64(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
470 ; CHECK-LE-P8-LABEL: test_none_v2i64:
471 ; CHECK-LE-P8: # %bb.0: # %entry
472 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI4_0@toc@ha
473 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r3
474 ; CHECK-LE-P8-NEXT: addis r3, r2, .LCPI4_1@toc@ha
475 ; CHECK-LE-P8-NEXT: lxvd2x v4, 0, r4
476 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI4_0@toc@l
477 ; CHECK-LE-P8-NEXT: addi r3, r3, .LCPI4_1@toc@l
478 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
479 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
480 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r3
481 ; CHECK-LE-P8-NEXT: vperm v2, v3, v4, v2
482 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
483 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
484 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
485 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
486 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
487 ; CHECK-LE-P8-NEXT: blr
488 ;
489 ; CHECK-LE-P9-LABEL: test_none_v2i64:
490 ; CHECK-LE-P9: # %bb.0: # %entry
491 ; CHECK-LE-P9-NEXT: lfd f0, 0(r3)
492 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
493 ; CHECK-LE-P9-NEXT: lxv v2, 0(r4)
494 ; CHECK-LE-P9-NEXT: xxlxor v4, v4, v4
495 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
496 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
497 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI4_1@toc@ha
498 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI4_1@toc@l
499 ; CHECK-LE-P9-NEXT: lxv v3, 0(r3)
500 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
501 ; CHECK-LE-P9-NEXT: vperm v2, v4, v2, v3
502 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
503 ; CHECK-LE-P9-NEXT: blr
504 ;
505 ; CHECK-BE-P8-LABEL: test_none_v2i64:
506 ; CHECK-BE-P8: # %bb.0: # %entry
507 ; CHECK-BE-P8-NEXT: lxsdx v2, 0, r3
508 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI4_0@toc@ha
509 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r4
510 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI4_0@toc@l
511 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
512 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
513 ; CHECK-BE-P8-NEXT: xxlxor v3, v3, v3
514 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
515 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
516 ; CHECK-BE-P8-NEXT: blr
517 ;
518 ; CHECK-BE-P9-LABEL: test_none_v2i64:
519 ; CHECK-BE-P9: # %bb.0: # %entry
520 ; CHECK-BE-P9-NEXT: lxsd v2, 0(r3)
521 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
522 ; CHECK-BE-P9-NEXT: lxv vs0, 0(r4)
523 ; CHECK-BE-P9-NEXT: xxlxor v3, v3, v3
524 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
525 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
526 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
527 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
528 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
529 ; CHECK-BE-P9-NEXT: blr
530 ;
531 ; CHECK-AIX-64-P8-LABEL: test_none_v2i64:
532 ; CHECK-AIX-64-P8: # %bb.0: # %entry
533 ; CHECK-AIX-64-P8-NEXT: lxsdx v2, 0, r3
534 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C6(r2) # %const.0
535 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r4
536 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
537 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
538 ; CHECK-AIX-64-P8-NEXT: xxlxor v3, v3, v3
539 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
540 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
541 ; CHECK-AIX-64-P8-NEXT: blr
542 ;
543 ; CHECK-AIX-64-P9-LABEL: test_none_v2i64:
544 ; CHECK-AIX-64-P9: # %bb.0: # %entry
545 ; CHECK-AIX-64-P9-NEXT: lxsd v2, 0(r3)
546 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C5(r2) # %const.0
547 ; CHECK-AIX-64-P9-NEXT: lxv vs0, 0(r4)
548 ; CHECK-AIX-64-P9-NEXT: xxlxor v3, v3, v3
549 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
550 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
551 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
552 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
553 ; CHECK-AIX-64-P9-NEXT: blr
554 ;
555 ; CHECK-AIX-32-P8-LABEL: test_none_v2i64:
556 ; CHECK-AIX-32-P8: # %bb.0: # %entry
557 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
558 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C5(r2) # %const.0
559 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r4
560 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
561 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
562 ; CHECK-AIX-32-P8-NEXT: xxlxor v3, v3, v3
563 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
564 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
565 ; CHECK-AIX-32-P8-NEXT: blr
566 ;
567 ; CHECK-AIX-32-P9-LABEL: test_none_v2i64:
568 ; CHECK-AIX-32-P9: # %bb.0: # %entry
569 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
570 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C4(r2) # %const.0
571 ; CHECK-AIX-32-P9-NEXT: lxv vs0, 0(r4)
572 ; CHECK-AIX-32-P9-NEXT: xxlxor v3, v3, v3
573 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
574 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
575 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
576 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
577 ; CHECK-AIX-32-P9-NEXT: blr
578 entry:
579 %0 = load <4 x i16>, ptr %ptr1, align 1
580 %1 = load <4 x i32>, ptr %ptr2, align 1
581 %bc = trunc <4 x i32> %1 to <4 x i16>
582 %shuffle1 = shufflevector <4 x i16> %0, <4 x i16> %bc, <4 x i32> <i32 4, i32 5, i32 1, i32 0>
583 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
584 store <4 x i32> %2, ptr undef, align 16
585 ret void
586 }
588 define void @test_v2i64_none(ptr nocapture readonly %ptr1) {
589 ; CHECK-LE-P8-LABEL: test_v2i64_none:
590 ; CHECK-LE-P8: # %bb.0: # %entry
591 ; CHECK-LE-P8-NEXT: addis r4, r2, .LCPI5_0@toc@ha
592 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r3
593 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
594 ; CHECK-LE-P8-NEXT: addi r4, r4, .LCPI5_0@toc@l
595 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r4
596 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
597 ; CHECK-LE-P8-NEXT: vperm v2, v4, v3, v2
598 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
599 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
600 ; CHECK-LE-P8-NEXT: blr
601 ;
602 ; CHECK-LE-P9-LABEL: test_v2i64_none:
603 ; CHECK-LE-P9: # %bb.0: # %entry
604 ; CHECK-LE-P9-NEXT: lfd f0, 0(r3)
605 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha
606 ; CHECK-LE-P9-NEXT: xxlxor vs2, vs2, vs2
607 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l
608 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
609 ; CHECK-LE-P9-NEXT: xxperm vs0, vs2, vs1
610 ; CHECK-LE-P9-NEXT: stxv vs0, 0(r3)
611 ; CHECK-LE-P9-NEXT: blr
612 ;
613 ; CHECK-BE-P8-LABEL: test_v2i64_none:
614 ; CHECK-BE-P8: # %bb.0: # %entry
615 ; CHECK-BE-P8-NEXT: lxsdx v2, 0, r3
616 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI5_0@toc@ha
617 ; CHECK-BE-P8-NEXT: xxlxor v4, v4, v4
618 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI5_0@toc@l
619 ; CHECK-BE-P8-NEXT: lxvw4x v3, 0, r3
620 ; CHECK-BE-P8-NEXT: vperm v2, v4, v2, v3
621 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
622 ; CHECK-BE-P8-NEXT: blr
623 ;
624 ; CHECK-BE-P9-LABEL: test_v2i64_none:
625 ; CHECK-BE-P9: # %bb.0: # %entry
626 ; CHECK-BE-P9-NEXT: lfd f0, 0(r3)
627 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha
628 ; CHECK-BE-P9-NEXT: xxlxor vs2, vs2, vs2
629 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l
630 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
631 ; CHECK-BE-P9-NEXT: xxperm vs0, vs2, vs1
632 ; CHECK-BE-P9-NEXT: stxv vs0, 0(r3)
633 ; CHECK-BE-P9-NEXT: blr
634 ;
635 ; CHECK-AIX-64-P8-LABEL: test_v2i64_none:
636 ; CHECK-AIX-64-P8: # %bb.0: # %entry
637 ; CHECK-AIX-64-P8-NEXT: lxsdx v2, 0, r3
638 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C7(r2) # %const.0
639 ; CHECK-AIX-64-P8-NEXT: xxlxor v4, v4, v4
640 ; CHECK-AIX-64-P8-NEXT: lxvw4x v3, 0, r3
641 ; CHECK-AIX-64-P8-NEXT: vperm v2, v4, v2, v3
642 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
643 ; CHECK-AIX-64-P8-NEXT: blr
644 ;
645 ; CHECK-AIX-64-P9-LABEL: test_v2i64_none:
646 ; CHECK-AIX-64-P9: # %bb.0: # %entry
647 ; CHECK-AIX-64-P9-NEXT: lfd f0, 0(r3)
648 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C6(r2) # %const.0
649 ; CHECK-AIX-64-P9-NEXT: xxlxor vs2, vs2, vs2
650 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
651 ; CHECK-AIX-64-P9-NEXT: xxperm vs0, vs2, vs1
652 ; CHECK-AIX-64-P9-NEXT: stxv vs0, 0(r3)
653 ; CHECK-AIX-64-P9-NEXT: blr
654 ;
655 ; CHECK-AIX-32-P8-LABEL: test_v2i64_none:
656 ; CHECK-AIX-32-P8: # %bb.0: # %entry
657 ; CHECK-AIX-32-P8-NEXT: lwz r4, 4(r3)
658 ; CHECK-AIX-32-P8-NEXT: xxlxor v4, v4, v4
659 ; CHECK-AIX-32-P8-NEXT: stw r4, -16(r1)
660 ; CHECK-AIX-32-P8-NEXT: lwz r3, 0(r3)
661 ; CHECK-AIX-32-P8-NEXT: stw r3, -32(r1)
662 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -16
663 ; CHECK-AIX-32-P8-NEXT: lxvw4x vs0, 0, r3
664 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -32
665 ; CHECK-AIX-32-P8-NEXT: lxvw4x vs1, 0, r3
666 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C6(r2) # %const.0
667 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
668 ; CHECK-AIX-32-P8-NEXT: xxmrghw v2, vs1, vs0
669 ; CHECK-AIX-32-P8-NEXT: vperm v2, v4, v2, v3
670 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
671 ; CHECK-AIX-32-P8-NEXT: blr
672 ;
673 ; CHECK-AIX-32-P9-LABEL: test_v2i64_none:
674 ; CHECK-AIX-32-P9: # %bb.0: # %entry
675 ; CHECK-AIX-32-P9-NEXT: lwz r4, 4(r3)
676 ; CHECK-AIX-32-P9-NEXT: xxlxor vs2, vs2, vs2
677 ; CHECK-AIX-32-P9-NEXT: stw r4, -16(r1)
678 ; CHECK-AIX-32-P9-NEXT: lwz r3, 0(r3)
679 ; CHECK-AIX-32-P9-NEXT: lxv vs0, -16(r1)
680 ; CHECK-AIX-32-P9-NEXT: stw r3, -32(r1)
681 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C5(r2) # %const.0
682 ; CHECK-AIX-32-P9-NEXT: lxv vs1, -32(r1)
683 ; CHECK-AIX-32-P9-NEXT: xxmrghw vs0, vs1, vs0
684 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
685 ; CHECK-AIX-32-P9-NEXT: xxperm vs0, vs2, vs1
686 ; CHECK-AIX-32-P9-NEXT: stxv vs0, 0(r3)
687 ; CHECK-AIX-32-P9-NEXT: blr
688 entry:
689 %0 = load <4 x i16>, ptr %ptr1, align 1
690 %shuffle1 = shufflevector <4 x i16> %0, <4 x i16> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0>
691 %1 = zext <4 x i16> %shuffle1 to <4 x i32>
692 store <4 x i32> %1, ptr undef, align 16
693 ret void
694 }
696 define <16 x i8> @test_v8i16_v8i16(ptr %a, ptr %b) {
697 ; CHECK-LE-P8-LABEL: test_v8i16_v8i16:
698 ; CHECK-LE-P8: # %bb.0: # %entry
699 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
700 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
701 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI6_0@toc@l
702 ; CHECK-LE-P8-NEXT: mtvsrd v3, r3
703 ; CHECK-LE-P8-NEXT: lhz r3, 0(r4)
704 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
705 ; CHECK-LE-P8-NEXT: mtvsrd v4, r3
706 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
707 ; CHECK-LE-P8-NEXT: vperm v2, v4, v3, v2
708 ; CHECK-LE-P8-NEXT: blr
709 ;
710 ; CHECK-LE-P9-LABEL: test_v8i16_v8i16:
711 ; CHECK-LE-P9: # %bb.0: # %entry
712 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
713 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI6_0@toc@ha
714 ; CHECK-LE-P9-NEXT: lxsihzx f0, 0, r4
715 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI6_0@toc@l
716 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
717 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
718 ; CHECK-LE-P9-NEXT: blr
719 ;
720 ; CHECK-BE-P8-LABEL: test_v8i16_v8i16:
721 ; CHECK-BE-P8: # %bb.0: # %entry
722 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
723 ; CHECK-BE-P8-NEXT: mtvsrwz v2, r3
724 ; CHECK-BE-P8-NEXT: lhz r3, 0(r4)
725 ; CHECK-BE-P8-NEXT: mtvsrwz v3, r3
726 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI6_0@toc@ha
727 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI6_0@toc@l
728 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
729 ; CHECK-BE-P8-NEXT: vperm v2, v2, v3, v4
730 ; CHECK-BE-P8-NEXT: blr
731 ;
732 ; CHECK-BE-P9-LABEL: test_v8i16_v8i16:
733 ; CHECK-BE-P9: # %bb.0: # %entry
734 ; CHECK-BE-P9-NEXT: lxsihzx f0, 0, r3
735 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI6_0@toc@ha
736 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r4
737 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI6_0@toc@l
738 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
739 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
740 ; CHECK-BE-P9-NEXT: blr
741 ;
742 ; CHECK-AIX-64-P8-LABEL: test_v8i16_v8i16:
743 ; CHECK-AIX-64-P8: # %bb.0: # %entry
744 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
745 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v2, r3
746 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r4)
747 ; CHECK-AIX-64-P8-NEXT: mtvsrwz v3, r3
748 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C8(r2) # %const.0
749 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
750 ; CHECK-AIX-64-P8-NEXT: vperm v2, v2, v3, v4
751 ; CHECK-AIX-64-P8-NEXT: blr
752 ;
753 ; CHECK-AIX-64-P9-LABEL: test_v8i16_v8i16:
754 ; CHECK-AIX-64-P9: # %bb.0: # %entry
755 ; CHECK-AIX-64-P9-NEXT: lxsihzx f0, 0, r3
756 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C7(r2) # %const.0
757 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r4
758 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
759 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
760 ; CHECK-AIX-64-P9-NEXT: blr
761 ;
762 ; CHECK-AIX-32-P8-LABEL: test_v8i16_v8i16:
763 ; CHECK-AIX-32-P8: # %bb.0: # %entry
764 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
765 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v2, r3
766 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r4)
767 ; CHECK-AIX-32-P8-NEXT: mtvsrwz v3, r3
768 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C7(r2) # %const.0
769 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
770 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
771 ; CHECK-AIX-32-P8-NEXT: blr
772 ;
773 ; CHECK-AIX-32-P9-LABEL: test_v8i16_v8i16:
774 ; CHECK-AIX-32-P9: # %bb.0: # %entry
775 ; CHECK-AIX-32-P9-NEXT: lxsihzx f0, 0, r3
776 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C6(r2) # %const.0
777 ; CHECK-AIX-32-P9-NEXT: lxsihzx v2, 0, r4
778 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
779 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
780 ; CHECK-AIX-32-P9-NEXT: blr
781 entry:
782 %load1 = load <2 x i8>, ptr %a
783 %load2 = load <2 x i8>, ptr %b
784 %shuffle1 = shufflevector <2 x i8> %load1, <2 x i8> %load2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
785 %shuffle2 = shufflevector <8 x i8> %shuffle1, <8 x i8> %shuffle1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
786 ret <16 x i8> %shuffle2
787 }
789 define <16 x i8> @test_v8i16_v4i32(ptr %a, ptr %b) local_unnamed_addr {
790 ; CHECK-LE-P8-LABEL: test_v8i16_v4i32:
791 ; CHECK-LE-P8: # %bb.0: # %entry
792 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
793 ; CHECK-LE-P8-NEXT: mtfprd f0, r3
794 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
795 ; CHECK-LE-P8-NEXT: lfiwzx f0, 0, r4
796 ; CHECK-LE-P8-NEXT: xxswapd v3, f0
797 ; CHECK-LE-P8-NEXT: vmrglh v2, v3, v2
798 ; CHECK-LE-P8-NEXT: blr
799 ;
800 ; CHECK-LE-P9-LABEL: test_v8i16_v4i32:
801 ; CHECK-LE-P9: # %bb.0: # %entry
802 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
803 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r4
804 ; CHECK-LE-P9-NEXT: xxswapd v3, f0
805 ; CHECK-LE-P9-NEXT: vsplth v2, v2, 3
806 ; CHECK-LE-P9-NEXT: vmrglh v2, v3, v2
807 ; CHECK-LE-P9-NEXT: blr
808 ;
809 ; CHECK-BE-P8-LABEL: test_v8i16_v4i32:
810 ; CHECK-BE-P8: # %bb.0: # %entry
811 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
812 ; CHECK-BE-P8-NEXT: lfiwzx f0, 0, r4
813 ; CHECK-BE-P8-NEXT: sldi r3, r3, 48
814 ; CHECK-BE-P8-NEXT: mtvsrd v3, r3
815 ; CHECK-BE-P8-NEXT: xxsldwi v2, f0, f0, 1
816 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
817 ; CHECK-BE-P8-NEXT: blr
818 ;
819 ; CHECK-BE-P9-LABEL: test_v8i16_v4i32:
820 ; CHECK-BE-P9: # %bb.0: # %entry
821 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r3
822 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r4
823 ; CHECK-BE-P9-NEXT: xxsldwi v3, f0, f0, 1
824 ; CHECK-BE-P9-NEXT: vsplth v2, v2, 3
825 ; CHECK-BE-P9-NEXT: vmrghh v2, v2, v3
826 ; CHECK-BE-P9-NEXT: blr
827 ;
828 ; CHECK-AIX-64-P8-LABEL: test_v8i16_v4i32:
829 ; CHECK-AIX-64-P8: # %bb.0: # %entry
830 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
831 ; CHECK-AIX-64-P8-NEXT: lfiwzx f0, 0, r4
832 ; CHECK-AIX-64-P8-NEXT: sldi r3, r3, 48
833 ; CHECK-AIX-64-P8-NEXT: mtvsrd v3, r3
834 ; CHECK-AIX-64-P8-NEXT: xxsldwi v2, f0, f0, 1
835 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
836 ; CHECK-AIX-64-P8-NEXT: blr
837 ;
838 ; CHECK-AIX-64-P9-LABEL: test_v8i16_v4i32:
839 ; CHECK-AIX-64-P9: # %bb.0: # %entry
840 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r3
841 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r4
842 ; CHECK-AIX-64-P9-NEXT: xxsldwi v3, f0, f0, 1
843 ; CHECK-AIX-64-P9-NEXT: vsplth v2, v2, 3
844 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v2, v3
845 ; CHECK-AIX-64-P9-NEXT: blr
846 ;
847 ; CHECK-AIX-32-P8-LABEL: test_v8i16_v4i32:
848 ; CHECK-AIX-32-P8: # %bb.0: # %entry
849 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
850 ; CHECK-AIX-32-P8-NEXT: sth r3, -32(r1)
851 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -32
852 ; CHECK-AIX-32-P8-NEXT: lxvw4x v2, 0, r3
853 ; CHECK-AIX-32-P8-NEXT: lwz r3, 0(r4)
854 ; CHECK-AIX-32-P8-NEXT: stw r3, -16(r1)
855 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -16
856 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
857 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v2, v3
858 ; CHECK-AIX-32-P8-NEXT: blr
859 ;
860 ; CHECK-AIX-32-P9-LABEL: test_v8i16_v4i32:
861 ; CHECK-AIX-32-P9: # %bb.0: # %entry
862 ; CHECK-AIX-32-P9-NEXT: lhz r3, 0(r3)
863 ; CHECK-AIX-32-P9-NEXT: sth r3, -32(r1)
864 ; CHECK-AIX-32-P9-NEXT: lwz r3, 0(r4)
865 ; CHECK-AIX-32-P9-NEXT: lxv v2, -32(r1)
866 ; CHECK-AIX-32-P9-NEXT: stw r3, -16(r1)
867 ; CHECK-AIX-32-P9-NEXT: lxv v3, -16(r1)
868 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v2, v3
869 ; CHECK-AIX-32-P9-NEXT: blr
870 entry:
871 %0 = load <2 x i8>, ptr %a
872 %bc1 = bitcast <2 x i8> %0 to i16
873 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
874 %1 = load <2 x i8>, ptr %b, align 4
875 %bc2 = bitcast <2 x i8> %1 to i16
876 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
877 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
878 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
879 %shuffle = shufflevector <16 x i8> %2, <16 x i8> %3, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
880 ret <16 x i8> %shuffle
881 }
883 define <16 x i8> @test_v8i16_v2i64(ptr %a, ptr %b) local_unnamed_addr {
884 ; CHECK-LE-P8-LABEL: test_v8i16_v2i64:
885 ; CHECK-LE-P8: # %bb.0: # %entry
886 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
887 ; CHECK-LE-P8-NEXT: mtfprd f0, r3
888 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
889 ; CHECK-LE-P8-NEXT: lfdx f0, 0, r4
890 ; CHECK-LE-P8-NEXT: xxswapd v3, f0
891 ; CHECK-LE-P8-NEXT: vmrglh v2, v3, v2
892 ; CHECK-LE-P8-NEXT: blr
893 ;
894 ; CHECK-LE-P9-LABEL: test_v8i16_v2i64:
895 ; CHECK-LE-P9: # %bb.0: # %entry
896 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
897 ; CHECK-LE-P9-NEXT: lfd f0, 0(r4)
898 ; CHECK-LE-P9-NEXT: xxswapd v3, f0
899 ; CHECK-LE-P9-NEXT: vsplth v2, v2, 3
900 ; CHECK-LE-P9-NEXT: vmrglh v2, v3, v2
901 ; CHECK-LE-P9-NEXT: blr
902 ;
903 ; CHECK-BE-P8-LABEL: test_v8i16_v2i64:
904 ; CHECK-BE-P8: # %bb.0: # %entry
905 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
906 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
907 ; CHECK-BE-P8-NEXT: sldi r3, r3, 48
908 ; CHECK-BE-P8-NEXT: mtvsrd v2, r3
909 ; CHECK-BE-P8-NEXT: vmrghh v2, v2, v3
910 ; CHECK-BE-P8-NEXT: blr
911 ;
912 ; CHECK-BE-P9-LABEL: test_v8i16_v2i64:
913 ; CHECK-BE-P9: # %bb.0: # %entry
914 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r3
915 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
916 ; CHECK-BE-P9-NEXT: vsplth v2, v2, 3
917 ; CHECK-BE-P9-NEXT: vmrghh v2, v2, v3
918 ; CHECK-BE-P9-NEXT: blr
919 ;
920 ; CHECK-AIX-64-P8-LABEL: test_v8i16_v2i64:
921 ; CHECK-AIX-64-P8: # %bb.0: # %entry
922 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
923 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
924 ; CHECK-AIX-64-P8-NEXT: sldi r3, r3, 48
925 ; CHECK-AIX-64-P8-NEXT: mtvsrd v2, r3
926 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v2, v3
927 ; CHECK-AIX-64-P8-NEXT: blr
928 ;
929 ; CHECK-AIX-64-P9-LABEL: test_v8i16_v2i64:
930 ; CHECK-AIX-64-P9: # %bb.0: # %entry
931 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r3
932 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
933 ; CHECK-AIX-64-P9-NEXT: vsplth v2, v2, 3
934 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v2, v3
935 ; CHECK-AIX-64-P9-NEXT: blr
936 ;
937 ; CHECK-AIX-32-P8-LABEL: test_v8i16_v2i64:
938 ; CHECK-AIX-32-P8: # %bb.0: # %entry
939 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
940 ; CHECK-AIX-32-P8-NEXT: sth r3, -32(r1)
941 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -32
942 ; CHECK-AIX-32-P8-NEXT: lxvw4x v2, 0, r3
943 ; CHECK-AIX-32-P8-NEXT: lwz r3, 0(r4)
944 ; CHECK-AIX-32-P8-NEXT: stw r3, -16(r1)
945 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -16
946 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
947 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v2, v3
948 ; CHECK-AIX-32-P8-NEXT: blr
949 ;
950 ; CHECK-AIX-32-P9-LABEL: test_v8i16_v2i64:
951 ; CHECK-AIX-32-P9: # %bb.0: # %entry
952 ; CHECK-AIX-32-P9-NEXT: lhz r3, 0(r3)
953 ; CHECK-AIX-32-P9-NEXT: sth r3, -32(r1)
954 ; CHECK-AIX-32-P9-NEXT: lwz r3, 0(r4)
955 ; CHECK-AIX-32-P9-NEXT: lxv v2, -32(r1)
956 ; CHECK-AIX-32-P9-NEXT: stw r3, -16(r1)
957 ; CHECK-AIX-32-P9-NEXT: lxv v3, -16(r1)
958 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v2, v3
959 ; CHECK-AIX-32-P9-NEXT: blr
960 entry:
961 %0 = load <2 x i8>, ptr %a
962 %bc1 = bitcast <2 x i8> %0 to i16
963 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
964 %1 = load <2 x i8>, ptr %b, align 8
965 %bc2 = bitcast <2 x i8> %1 to i16
966 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
967 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
968 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
969 %shuffle = shufflevector <16 x i8> %2, <16 x i8> %3, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
970 ret <16 x i8> %shuffle
971 }
973 define void @test_v4i32_v4i32(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
974 ; CHECK-LE-P8-LABEL: test_v4i32_v4i32:
975 ; CHECK-LE-P8: # %bb.0: # %entry
976 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI9_0@toc@ha
977 ; CHECK-LE-P8-NEXT: lxsiwzx v3, 0, r3
978 ; CHECK-LE-P8-NEXT: addis r3, r2, .LCPI9_1@toc@ha
979 ; CHECK-LE-P8-NEXT: lxsiwzx v4, 0, r4
980 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI9_0@toc@l
981 ; CHECK-LE-P8-NEXT: addi r3, r3, .LCPI9_1@toc@l
982 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
983 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
984 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r3
985 ; CHECK-LE-P8-NEXT: vperm v2, v3, v4, v2
986 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
987 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
988 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
989 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
990 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
991 ; CHECK-LE-P8-NEXT: blr
992 ;
993 ; CHECK-LE-P9-LABEL: test_v4i32_v4i32:
994 ; CHECK-LE-P9: # %bb.0: # %entry
995 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r3
996 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI9_0@toc@ha
997 ; CHECK-LE-P9-NEXT: lxsiwzx v2, 0, r4
998 ; CHECK-LE-P9-NEXT: xxlxor v4, v4, v4
999 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI9_0@toc@l
1000 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
1001 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI9_1@toc@ha
1002 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI9_1@toc@l
1003 ; CHECK-LE-P9-NEXT: lxv v3, 0(r3)
1004 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
1005 ; CHECK-LE-P9-NEXT: vperm v2, v4, v2, v3
1006 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
1007 ; CHECK-LE-P9-NEXT: blr
1008 ;
1009 ; CHECK-BE-P8-LABEL: test_v4i32_v4i32:
1010 ; CHECK-BE-P8: # %bb.0: # %entry
1011 ; CHECK-BE-P8-NEXT: lxsiwzx v2, 0, r3
1012 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI9_0@toc@ha
1013 ; CHECK-BE-P8-NEXT: lxsiwzx v3, 0, r4
1014 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI9_0@toc@l
1015 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
1016 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
1017 ; CHECK-BE-P8-NEXT: xxlxor v3, v3, v3
1018 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
1019 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
1020 ; CHECK-BE-P8-NEXT: blr
1021 ;
1022 ; CHECK-BE-P9-LABEL: test_v4i32_v4i32:
1023 ; CHECK-BE-P9: # %bb.0: # %entry
1024 ; CHECK-BE-P9-NEXT: lxsiwzx v2, 0, r3
1025 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI9_0@toc@ha
1026 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r4
1027 ; CHECK-BE-P9-NEXT: xxlxor v3, v3, v3
1028 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI9_0@toc@l
1029 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
1030 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
1031 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1032 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
1033 ; CHECK-BE-P9-NEXT: blr
1034 ;
1035 ; CHECK-AIX-64-P8-LABEL: test_v4i32_v4i32:
1036 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1037 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v2, 0, r3
1038 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C9(r2) # %const.0
1039 ; CHECK-AIX-64-P8-NEXT: lxsiwzx v3, 0, r4
1040 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
1041 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
1042 ; CHECK-AIX-64-P8-NEXT: xxlxor v3, v3, v3
1043 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1044 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
1045 ; CHECK-AIX-64-P8-NEXT: blr
1046 ;
1047 ; CHECK-AIX-64-P9-LABEL: test_v4i32_v4i32:
1048 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1049 ; CHECK-AIX-64-P9-NEXT: lxsiwzx v2, 0, r3
1050 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C8(r2) # %const.0
1051 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r4
1052 ; CHECK-AIX-64-P9-NEXT: xxlxor v3, v3, v3
1053 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
1054 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
1055 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1056 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
1057 ; CHECK-AIX-64-P9-NEXT: blr
1058 ;
1059 ; CHECK-AIX-32-P8-LABEL: test_v4i32_v4i32:
1060 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1061 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1062 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C8(r2) # %const.0
1063 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1064 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1065 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1066 ; CHECK-AIX-32-P8-NEXT: xxlxor v3, v3, v3
1067 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
1068 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
1069 ; CHECK-AIX-32-P8-NEXT: blr
1070 ;
1071 ; CHECK-AIX-32-P9-LABEL: test_v4i32_v4i32:
1072 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1073 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
1074 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C7(r2) # %const.0
1075 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1076 ; CHECK-AIX-32-P9-NEXT: xxlxor v3, v3, v3
1077 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1078 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1079 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
1080 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
1081 ; CHECK-AIX-32-P9-NEXT: blr
1082 entry:
1083 %0 = load <2 x i16>, ptr %ptr1, align 1
1084 %1 = load <2 x i16>, ptr %ptr2, align 1
1085 %shuffle1 = shufflevector <2 x i16> %0, <2 x i16> %1, <4 x i32> <i32 2, i32 3, i32 1, i32 0>
1086 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
1087 store <4 x i32> %2, ptr undef, align 16
1088 ret void
1089 }
1091 define <16 x i8> @test_v4i32_v8i16(ptr %a, ptr %b) local_unnamed_addr {
1092 ; CHECK-LE-P8-LABEL: test_v4i32_v8i16:
1093 ; CHECK-LE-P8: # %bb.0: # %entry
1094 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
1095 ; CHECK-LE-P8-NEXT: mtfprd f0, r3
1096 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
1097 ; CHECK-LE-P8-NEXT: lfiwzx f0, 0, r4
1098 ; CHECK-LE-P8-NEXT: xxswapd v3, f0
1099 ; CHECK-LE-P8-NEXT: vmrglh v2, v2, v3
1100 ; CHECK-LE-P8-NEXT: blr
1101 ;
1102 ; CHECK-LE-P9-LABEL: test_v4i32_v8i16:
1103 ; CHECK-LE-P9: # %bb.0: # %entry
1104 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
1105 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r4
1106 ; CHECK-LE-P9-NEXT: xxswapd v3, f0
1107 ; CHECK-LE-P9-NEXT: vsplth v2, v2, 3
1108 ; CHECK-LE-P9-NEXT: vmrglh v2, v2, v3
1109 ; CHECK-LE-P9-NEXT: blr
1110 ;
1111 ; CHECK-BE-P8-LABEL: test_v4i32_v8i16:
1112 ; CHECK-BE-P8: # %bb.0: # %entry
1113 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
1114 ; CHECK-BE-P8-NEXT: lfiwzx f0, 0, r4
1115 ; CHECK-BE-P8-NEXT: sldi r3, r3, 48
1116 ; CHECK-BE-P8-NEXT: mtvsrd v3, r3
1117 ; CHECK-BE-P8-NEXT: xxsldwi v2, f0, f0, 1
1118 ; CHECK-BE-P8-NEXT: vmrghh v2, v2, v3
1119 ; CHECK-BE-P8-NEXT: blr
1120 ;
1121 ; CHECK-BE-P9-LABEL: test_v4i32_v8i16:
1122 ; CHECK-BE-P9: # %bb.0: # %entry
1123 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r3
1124 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r4
1125 ; CHECK-BE-P9-NEXT: xxsldwi v3, f0, f0, 1
1126 ; CHECK-BE-P9-NEXT: vsplth v2, v2, 3
1127 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1128 ; CHECK-BE-P9-NEXT: blr
1129 ;
1130 ; CHECK-AIX-64-P8-LABEL: test_v4i32_v8i16:
1131 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1132 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
1133 ; CHECK-AIX-64-P8-NEXT: lfiwzx f0, 0, r4
1134 ; CHECK-AIX-64-P8-NEXT: sldi r3, r3, 48
1135 ; CHECK-AIX-64-P8-NEXT: mtvsrd v3, r3
1136 ; CHECK-AIX-64-P8-NEXT: xxsldwi v2, f0, f0, 1
1137 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v2, v3
1138 ; CHECK-AIX-64-P8-NEXT: blr
1139 ;
1140 ; CHECK-AIX-64-P9-LABEL: test_v4i32_v8i16:
1141 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1142 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r3
1143 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r4
1144 ; CHECK-AIX-64-P9-NEXT: xxsldwi v3, f0, f0, 1
1145 ; CHECK-AIX-64-P9-NEXT: vsplth v2, v2, 3
1146 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1147 ; CHECK-AIX-64-P9-NEXT: blr
1148 ;
1149 ; CHECK-AIX-32-P8-LABEL: test_v4i32_v8i16:
1150 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1151 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
1152 ; CHECK-AIX-32-P8-NEXT: sth r3, -32(r1)
1153 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -32
1154 ; CHECK-AIX-32-P8-NEXT: lxvw4x v2, 0, r3
1155 ; CHECK-AIX-32-P8-NEXT: lwz r3, 0(r4)
1156 ; CHECK-AIX-32-P8-NEXT: stw r3, -16(r1)
1157 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -16
1158 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
1159 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
1160 ; CHECK-AIX-32-P8-NEXT: blr
1161 ;
1162 ; CHECK-AIX-32-P9-LABEL: test_v4i32_v8i16:
1163 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1164 ; CHECK-AIX-32-P9-NEXT: lhz r3, 0(r3)
1165 ; CHECK-AIX-32-P9-NEXT: sth r3, -32(r1)
1166 ; CHECK-AIX-32-P9-NEXT: lwz r3, 0(r4)
1167 ; CHECK-AIX-32-P9-NEXT: lxv v2, -32(r1)
1168 ; CHECK-AIX-32-P9-NEXT: stw r3, -16(r1)
1169 ; CHECK-AIX-32-P9-NEXT: lxv v3, -16(r1)
1170 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
1171 ; CHECK-AIX-32-P9-NEXT: blr
1172 entry:
1173 %0 = load <2 x i8>, ptr %a
1174 %bc1 = bitcast <2 x i8> %0 to i16
1175 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1176 %1 = load <2 x i8>, ptr %b, align 4
1177 %bc2 = bitcast <2 x i8> %1 to i16
1178 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1179 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1180 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1181 %shuffle = shufflevector <16 x i8> %3, <16 x i8> %2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1182 ret <16 x i8> %shuffle
1183 }
1185 define <16 x i8> @test_v4i32_v2i64(ptr %a, ptr %b) local_unnamed_addr {
1186 ; CHECK-LE-P8-LABEL: test_v4i32_v2i64:
1187 ; CHECK-LE-P8: # %bb.0: # %entry
1188 ; CHECK-LE-P8-NEXT: lfiwzx f0, 0, r3
1189 ; CHECK-LE-P8-NEXT: xxswapd v2, f0
1190 ; CHECK-LE-P8-NEXT: lfdx f0, 0, r4
1191 ; CHECK-LE-P8-NEXT: xxswapd v3, f0
1192 ; CHECK-LE-P8-NEXT: vmrglh v2, v3, v2
1193 ; CHECK-LE-P8-NEXT: blr
1194 ;
1195 ; CHECK-LE-P9-LABEL: test_v4i32_v2i64:
1196 ; CHECK-LE-P9: # %bb.0: # %entry
1197 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r3
1198 ; CHECK-LE-P9-NEXT: xxswapd v2, f0
1199 ; CHECK-LE-P9-NEXT: lfd f0, 0(r4)
1200 ; CHECK-LE-P9-NEXT: xxswapd v3, f0
1201 ; CHECK-LE-P9-NEXT: vmrglh v2, v3, v2
1202 ; CHECK-LE-P9-NEXT: blr
1203 ;
1204 ; CHECK-BE-P8-LABEL: test_v4i32_v2i64:
1205 ; CHECK-BE-P8: # %bb.0: # %entry
1206 ; CHECK-BE-P8-NEXT: lfiwzx f0, 0, r3
1207 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1208 ; CHECK-BE-P8-NEXT: xxsldwi v2, f0, f0, 1
1209 ; CHECK-BE-P8-NEXT: vmrghh v2, v2, v3
1210 ; CHECK-BE-P8-NEXT: blr
1211 ;
1212 ; CHECK-BE-P9-LABEL: test_v4i32_v2i64:
1213 ; CHECK-BE-P9: # %bb.0: # %entry
1214 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r3
1215 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
1216 ; CHECK-BE-P9-NEXT: xxsldwi v2, f0, f0, 1
1217 ; CHECK-BE-P9-NEXT: vmrghh v2, v2, v3
1218 ; CHECK-BE-P9-NEXT: blr
1219 ;
1220 ; CHECK-AIX-64-P8-LABEL: test_v4i32_v2i64:
1221 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1222 ; CHECK-AIX-64-P8-NEXT: lfiwzx f0, 0, r3
1223 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1224 ; CHECK-AIX-64-P8-NEXT: xxsldwi v2, f0, f0, 1
1225 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v2, v3
1226 ; CHECK-AIX-64-P8-NEXT: blr
1227 ;
1228 ; CHECK-AIX-64-P9-LABEL: test_v4i32_v2i64:
1229 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1230 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r3
1231 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
1232 ; CHECK-AIX-64-P9-NEXT: xxsldwi v2, f0, f0, 1
1233 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v2, v3
1234 ; CHECK-AIX-64-P9-NEXT: blr
1235 ;
1236 ; CHECK-AIX-32-P8-LABEL: test_v4i32_v2i64:
1237 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1238 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1239 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C9(r2) # %const.0
1240 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1241 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1242 ; CHECK-AIX-32-P8-NEXT: vperm v2, v2, v3, v4
1243 ; CHECK-AIX-32-P8-NEXT: blr
1244 ;
1245 ; CHECK-AIX-32-P9-LABEL: test_v4i32_v2i64:
1246 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1247 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r3
1248 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C8(r2) # %const.0
1249 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r4
1250 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1251 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1252 ; CHECK-AIX-32-P9-NEXT: blr
1253 entry:
1254 %0 = load <2 x i8>, ptr %a, align 4
1255 %bc1 = bitcast <2 x i8> %0 to i16
1256 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1257 %1 = load <2 x i8>, ptr %b, align 8
1258 %bc2 = bitcast <2 x i8> %1 to i16
1259 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1260 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1261 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1262 %shuffle = shufflevector <16 x i8> %2, <16 x i8> %3, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1263 ret <16 x i8> %shuffle
1264 }
1266 define void @test_v2i64_v2i64(ptr nocapture readonly %ptr1, ptr nocapture readonly %ptr2) {
1267 ; CHECK-LE-P8-LABEL: test_v2i64_v2i64:
1268 ; CHECK-LE-P8: # %bb.0: # %entry
1269 ; CHECK-LE-P8-NEXT: addis r5, r2, .LCPI12_0@toc@ha
1270 ; CHECK-LE-P8-NEXT: lxsdx v3, 0, r3
1271 ; CHECK-LE-P8-NEXT: addis r3, r2, .LCPI12_1@toc@ha
1272 ; CHECK-LE-P8-NEXT: lxsdx v4, 0, r4
1273 ; CHECK-LE-P8-NEXT: addi r5, r5, .LCPI12_0@toc@l
1274 ; CHECK-LE-P8-NEXT: addi r3, r3, .LCPI12_1@toc@l
1275 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r5
1276 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
1277 ; CHECK-LE-P8-NEXT: lxvd2x vs0, 0, r3
1278 ; CHECK-LE-P8-NEXT: vperm v2, v3, v4, v2
1279 ; CHECK-LE-P8-NEXT: xxlxor v4, v4, v4
1280 ; CHECK-LE-P8-NEXT: xxswapd v3, vs0
1281 ; CHECK-LE-P8-NEXT: vperm v2, v4, v2, v3
1282 ; CHECK-LE-P8-NEXT: xxswapd vs0, v2
1283 ; CHECK-LE-P8-NEXT: stxvd2x vs0, 0, r3
1284 ; CHECK-LE-P8-NEXT: blr
1285 ;
1286 ; CHECK-LE-P9-LABEL: test_v2i64_v2i64:
1287 ; CHECK-LE-P9: # %bb.0: # %entry
1288 ; CHECK-LE-P9-NEXT: lfd f0, 0(r3)
1289 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI12_0@toc@ha
1290 ; CHECK-LE-P9-NEXT: lxsd v2, 0(r4)
1291 ; CHECK-LE-P9-NEXT: xxlxor v4, v4, v4
1292 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI12_0@toc@l
1293 ; CHECK-LE-P9-NEXT: lxv vs1, 0(r3)
1294 ; CHECK-LE-P9-NEXT: addis r3, r2, .LCPI12_1@toc@ha
1295 ; CHECK-LE-P9-NEXT: addi r3, r3, .LCPI12_1@toc@l
1296 ; CHECK-LE-P9-NEXT: lxv v3, 0(r3)
1297 ; CHECK-LE-P9-NEXT: xxperm v2, vs0, vs1
1298 ; CHECK-LE-P9-NEXT: vperm v2, v4, v2, v3
1299 ; CHECK-LE-P9-NEXT: stxv v2, 0(r3)
1300 ; CHECK-LE-P9-NEXT: blr
1301 ;
1302 ; CHECK-BE-P8-LABEL: test_v2i64_v2i64:
1303 ; CHECK-BE-P8: # %bb.0: # %entry
1304 ; CHECK-BE-P8-NEXT: lxsdx v2, 0, r3
1305 ; CHECK-BE-P8-NEXT: addis r3, r2, .LCPI12_0@toc@ha
1306 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1307 ; CHECK-BE-P8-NEXT: addi r3, r3, .LCPI12_0@toc@l
1308 ; CHECK-BE-P8-NEXT: lxvw4x v4, 0, r3
1309 ; CHECK-BE-P8-NEXT: vperm v2, v3, v2, v4
1310 ; CHECK-BE-P8-NEXT: xxlxor v3, v3, v3
1311 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
1312 ; CHECK-BE-P8-NEXT: stxvw4x v2, 0, r3
1313 ; CHECK-BE-P8-NEXT: blr
1314 ;
1315 ; CHECK-BE-P9-LABEL: test_v2i64_v2i64:
1316 ; CHECK-BE-P9: # %bb.0: # %entry
1317 ; CHECK-BE-P9-NEXT: lxsd v2, 0(r3)
1318 ; CHECK-BE-P9-NEXT: addis r3, r2, .LCPI12_0@toc@ha
1319 ; CHECK-BE-P9-NEXT: lfd f0, 0(r4)
1320 ; CHECK-BE-P9-NEXT: xxlxor v3, v3, v3
1321 ; CHECK-BE-P9-NEXT: addi r3, r3, .LCPI12_0@toc@l
1322 ; CHECK-BE-P9-NEXT: lxv vs1, 0(r3)
1323 ; CHECK-BE-P9-NEXT: xxperm v2, vs0, vs1
1324 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1325 ; CHECK-BE-P9-NEXT: stxv v2, 0(r3)
1326 ; CHECK-BE-P9-NEXT: blr
1327 ;
1328 ; CHECK-AIX-64-P8-LABEL: test_v2i64_v2i64:
1329 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1330 ; CHECK-AIX-64-P8-NEXT: lxsdx v2, 0, r3
1331 ; CHECK-AIX-64-P8-NEXT: ld r3, L..C10(r2) # %const.0
1332 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1333 ; CHECK-AIX-64-P8-NEXT: lxvw4x v4, 0, r3
1334 ; CHECK-AIX-64-P8-NEXT: vperm v2, v3, v2, v4
1335 ; CHECK-AIX-64-P8-NEXT: xxlxor v3, v3, v3
1336 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1337 ; CHECK-AIX-64-P8-NEXT: stxvw4x v2, 0, r3
1338 ; CHECK-AIX-64-P8-NEXT: blr
1339 ;
1340 ; CHECK-AIX-64-P9-LABEL: test_v2i64_v2i64:
1341 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1342 ; CHECK-AIX-64-P9-NEXT: lxsd v2, 0(r3)
1343 ; CHECK-AIX-64-P9-NEXT: ld r3, L..C9(r2) # %const.0
1344 ; CHECK-AIX-64-P9-NEXT: lfd f0, 0(r4)
1345 ; CHECK-AIX-64-P9-NEXT: xxlxor v3, v3, v3
1346 ; CHECK-AIX-64-P9-NEXT: lxv vs1, 0(r3)
1347 ; CHECK-AIX-64-P9-NEXT: xxperm v2, vs0, vs1
1348 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1349 ; CHECK-AIX-64-P9-NEXT: stxv v2, 0(r3)
1350 ; CHECK-AIX-64-P9-NEXT: blr
1351 ;
1352 ; CHECK-AIX-32-P8-LABEL: test_v2i64_v2i64:
1353 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1354 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1355 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C10(r2) # %const.0
1356 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1357 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1358 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1359 ; CHECK-AIX-32-P8-NEXT: xxlxor v3, v3, v3
1360 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
1361 ; CHECK-AIX-32-P8-NEXT: stxvw4x v2, 0, r3
1362 ; CHECK-AIX-32-P8-NEXT: blr
1363 ;
1364 ; CHECK-AIX-32-P9-LABEL: test_v2i64_v2i64:
1365 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1366 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
1367 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C9(r2) # %const.0
1368 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1369 ; CHECK-AIX-32-P9-NEXT: xxlxor v3, v3, v3
1370 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1371 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1372 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
1373 ; CHECK-AIX-32-P9-NEXT: stxv v2, 0(r3)
1374 ; CHECK-AIX-32-P9-NEXT: blr
1375 entry:
1376 %0 = load <4 x i16>, ptr %ptr1, align 1
1377 %1 = load <4 x i16>, ptr %ptr2, align 1
1378 %shuffle1 = shufflevector <4 x i16> %0, <4 x i16> %1, <4 x i32> <i32 4, i32 5, i32 1, i32 0>
1379 %2 = zext <4 x i16> %shuffle1 to <4 x i32>
1380 store <4 x i32> %2, ptr undef, align 16
1381 ret void
1382 }
1384 define <16 x i8> @test_v2i64_v4i32(ptr %a, ptr %b) local_unnamed_addr {
1385 ; CHECK-LE-P8-LABEL: test_v2i64_v4i32:
1386 ; CHECK-LE-P8: # %bb.0: # %entry
1387 ; CHECK-LE-P8-NEXT: lfiwzx f0, 0, r3
1388 ; CHECK-LE-P8-NEXT: xxswapd v2, f0
1389 ; CHECK-LE-P8-NEXT: lfdx f0, 0, r4
1390 ; CHECK-LE-P8-NEXT: xxswapd v3, f0
1391 ; CHECK-LE-P8-NEXT: vmrglh v2, v2, v3
1392 ; CHECK-LE-P8-NEXT: blr
1393 ;
1394 ; CHECK-LE-P9-LABEL: test_v2i64_v4i32:
1395 ; CHECK-LE-P9: # %bb.0: # %entry
1396 ; CHECK-LE-P9-NEXT: lfiwzx f0, 0, r3
1397 ; CHECK-LE-P9-NEXT: xxswapd v2, f0
1398 ; CHECK-LE-P9-NEXT: lfd f0, 0(r4)
1399 ; CHECK-LE-P9-NEXT: xxswapd v3, f0
1400 ; CHECK-LE-P9-NEXT: vmrglh v2, v2, v3
1401 ; CHECK-LE-P9-NEXT: blr
1402 ;
1403 ; CHECK-BE-P8-LABEL: test_v2i64_v4i32:
1404 ; CHECK-BE-P8: # %bb.0: # %entry
1405 ; CHECK-BE-P8-NEXT: lfiwzx f0, 0, r3
1406 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1407 ; CHECK-BE-P8-NEXT: xxsldwi v2, f0, f0, 1
1408 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
1409 ; CHECK-BE-P8-NEXT: blr
1410 ;
1411 ; CHECK-BE-P9-LABEL: test_v2i64_v4i32:
1412 ; CHECK-BE-P9: # %bb.0: # %entry
1413 ; CHECK-BE-P9-NEXT: lfiwzx f0, 0, r3
1414 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
1415 ; CHECK-BE-P9-NEXT: xxsldwi v2, f0, f0, 1
1416 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1417 ; CHECK-BE-P9-NEXT: blr
1418 ;
1419 ; CHECK-AIX-64-P8-LABEL: test_v2i64_v4i32:
1420 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1421 ; CHECK-AIX-64-P8-NEXT: lfiwzx f0, 0, r3
1422 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1423 ; CHECK-AIX-64-P8-NEXT: xxsldwi v2, f0, f0, 1
1424 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1425 ; CHECK-AIX-64-P8-NEXT: blr
1426 ;
1427 ; CHECK-AIX-64-P9-LABEL: test_v2i64_v4i32:
1428 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1429 ; CHECK-AIX-64-P9-NEXT: lfiwzx f0, 0, r3
1430 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
1431 ; CHECK-AIX-64-P9-NEXT: xxsldwi v2, f0, f0, 1
1432 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1433 ; CHECK-AIX-64-P9-NEXT: blr
1434 ;
1435 ; CHECK-AIX-32-P8-LABEL: test_v2i64_v4i32:
1436 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1437 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v2, 0, r3
1438 ; CHECK-AIX-32-P8-NEXT: lwz r3, L..C11(r2) # %const.0
1439 ; CHECK-AIX-32-P8-NEXT: lxsiwzx v3, 0, r4
1440 ; CHECK-AIX-32-P8-NEXT: lxvw4x v4, 0, r3
1441 ; CHECK-AIX-32-P8-NEXT: vperm v2, v3, v2, v4
1442 ; CHECK-AIX-32-P8-NEXT: blr
1443 ;
1444 ; CHECK-AIX-32-P9-LABEL: test_v2i64_v4i32:
1445 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1446 ; CHECK-AIX-32-P9-NEXT: lxsiwzx v2, 0, r3
1447 ; CHECK-AIX-32-P9-NEXT: lwz r3, L..C10(r2) # %const.0
1448 ; CHECK-AIX-32-P9-NEXT: lfiwzx f0, 0, r4
1449 ; CHECK-AIX-32-P9-NEXT: lxv vs1, 0(r3)
1450 ; CHECK-AIX-32-P9-NEXT: xxperm v2, vs0, vs1
1451 ; CHECK-AIX-32-P9-NEXT: blr
1452 entry:
1453 %0 = load <2 x i8>, ptr %a, align 4
1454 %bc1 = bitcast <2 x i8> %0 to i16
1455 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1456 %1 = load <2 x i8>, ptr %b, align 8
1457 %bc2 = bitcast <2 x i8> %1 to i16
1458 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1459 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1460 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1461 %shuffle = shufflevector <16 x i8> %3, <16 x i8> %2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1462 ret <16 x i8> %shuffle
1463 }
1465 define <16 x i8> @test_v2i64_v8i16(ptr %a, ptr %b) local_unnamed_addr {
1466 ; CHECK-LE-P8-LABEL: test_v2i64_v8i16:
1467 ; CHECK-LE-P8: # %bb.0: # %entry
1468 ; CHECK-LE-P8-NEXT: lhz r3, 0(r3)
1469 ; CHECK-LE-P8-NEXT: mtfprd f0, r3
1470 ; CHECK-LE-P8-NEXT: xxswapd v2, vs0
1471 ; CHECK-LE-P8-NEXT: lfdx f0, 0, r4
1472 ; CHECK-LE-P8-NEXT: xxswapd v3, f0
1473 ; CHECK-LE-P8-NEXT: vmrglh v2, v2, v3
1474 ; CHECK-LE-P8-NEXT: blr
1475 ;
1476 ; CHECK-LE-P9-LABEL: test_v2i64_v8i16:
1477 ; CHECK-LE-P9: # %bb.0: # %entry
1478 ; CHECK-LE-P9-NEXT: lxsihzx v2, 0, r3
1479 ; CHECK-LE-P9-NEXT: lfd f0, 0(r4)
1480 ; CHECK-LE-P9-NEXT: xxswapd v3, f0
1481 ; CHECK-LE-P9-NEXT: vsplth v2, v2, 3
1482 ; CHECK-LE-P9-NEXT: vmrglh v2, v2, v3
1483 ; CHECK-LE-P9-NEXT: blr
1484 ;
1485 ; CHECK-BE-P8-LABEL: test_v2i64_v8i16:
1486 ; CHECK-BE-P8: # %bb.0: # %entry
1487 ; CHECK-BE-P8-NEXT: lhz r3, 0(r3)
1488 ; CHECK-BE-P8-NEXT: lxsdx v3, 0, r4
1489 ; CHECK-BE-P8-NEXT: sldi r3, r3, 48
1490 ; CHECK-BE-P8-NEXT: mtvsrd v2, r3
1491 ; CHECK-BE-P8-NEXT: vmrghh v2, v3, v2
1492 ; CHECK-BE-P8-NEXT: blr
1493 ;
1494 ; CHECK-BE-P9-LABEL: test_v2i64_v8i16:
1495 ; CHECK-BE-P9: # %bb.0: # %entry
1496 ; CHECK-BE-P9-NEXT: lxsihzx v2, 0, r3
1497 ; CHECK-BE-P9-NEXT: lxsd v3, 0(r4)
1498 ; CHECK-BE-P9-NEXT: vsplth v2, v2, 3
1499 ; CHECK-BE-P9-NEXT: vmrghh v2, v3, v2
1500 ; CHECK-BE-P9-NEXT: blr
1501 ;
1502 ; CHECK-AIX-64-P8-LABEL: test_v2i64_v8i16:
1503 ; CHECK-AIX-64-P8: # %bb.0: # %entry
1504 ; CHECK-AIX-64-P8-NEXT: lhz r3, 0(r3)
1505 ; CHECK-AIX-64-P8-NEXT: lxsdx v3, 0, r4
1506 ; CHECK-AIX-64-P8-NEXT: sldi r3, r3, 48
1507 ; CHECK-AIX-64-P8-NEXT: mtvsrd v2, r3
1508 ; CHECK-AIX-64-P8-NEXT: vmrghh v2, v3, v2
1509 ; CHECK-AIX-64-P8-NEXT: blr
1510 ;
1511 ; CHECK-AIX-64-P9-LABEL: test_v2i64_v8i16:
1512 ; CHECK-AIX-64-P9: # %bb.0: # %entry
1513 ; CHECK-AIX-64-P9-NEXT: lxsihzx v2, 0, r3
1514 ; CHECK-AIX-64-P9-NEXT: lxsd v3, 0(r4)
1515 ; CHECK-AIX-64-P9-NEXT: vsplth v2, v2, 3
1516 ; CHECK-AIX-64-P9-NEXT: vmrghh v2, v3, v2
1517 ; CHECK-AIX-64-P9-NEXT: blr
1518 ;
1519 ; CHECK-AIX-32-P8-LABEL: test_v2i64_v8i16:
1520 ; CHECK-AIX-32-P8: # %bb.0: # %entry
1521 ; CHECK-AIX-32-P8-NEXT: lhz r3, 0(r3)
1522 ; CHECK-AIX-32-P8-NEXT: sth r3, -32(r1)
1523 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -32
1524 ; CHECK-AIX-32-P8-NEXT: lxvw4x v2, 0, r3
1525 ; CHECK-AIX-32-P8-NEXT: lwz r3, 0(r4)
1526 ; CHECK-AIX-32-P8-NEXT: stw r3, -16(r1)
1527 ; CHECK-AIX-32-P8-NEXT: addi r3, r1, -16
1528 ; CHECK-AIX-32-P8-NEXT: lxvw4x v3, 0, r3
1529 ; CHECK-AIX-32-P8-NEXT: vmrghh v2, v3, v2
1530 ; CHECK-AIX-32-P8-NEXT: blr
1531 ;
1532 ; CHECK-AIX-32-P9-LABEL: test_v2i64_v8i16:
1533 ; CHECK-AIX-32-P9: # %bb.0: # %entry
1534 ; CHECK-AIX-32-P9-NEXT: lhz r3, 0(r3)
1535 ; CHECK-AIX-32-P9-NEXT: sth r3, -32(r1)
1536 ; CHECK-AIX-32-P9-NEXT: lwz r3, 0(r4)
1537 ; CHECK-AIX-32-P9-NEXT: lxv v2, -32(r1)
1538 ; CHECK-AIX-32-P9-NEXT: stw r3, -16(r1)
1539 ; CHECK-AIX-32-P9-NEXT: lxv v3, -16(r1)
1540 ; CHECK-AIX-32-P9-NEXT: vmrghh v2, v3, v2
1541 ; CHECK-AIX-32-P9-NEXT: blr
1542 entry:
1543 %0 = load <2 x i8>, ptr %a
1544 %bc1 = bitcast <2 x i8> %0 to i16
1545 %vecinit3 = insertelement <8 x i16> poison, i16 %bc1, i64 0
1546 %1 = load <2 x i8>, ptr %b, align 8
1547 %bc2 = bitcast <2 x i8> %1 to i16
1548 %vecinit6 = insertelement <8 x i16> undef, i16 %bc2, i64 0
1549 %2 = bitcast <8 x i16> %vecinit3 to <16 x i8>
1550 %3 = bitcast <8 x i16> %vecinit6 to <16 x i8>
1551 %shuffle = shufflevector <16 x i8> %3, <16 x i8> %2, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
1552 ret <16 x i8> %shuffle
1553 }