1 //===-- RISCVAsmBackend.h - RISC-V Assembler Backend ----------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #ifndef LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
10 #define LLVM_LIB_TARGET_RISCV_MCTARGETDESC_RISCVASMBACKEND_H
12 #include "MCTargetDesc/RISCVBaseInfo.h"
13 #include "MCTargetDesc/RISCVFixupKinds.h"
14 #include "MCTargetDesc/RISCVMCTargetDesc.h"
15 #include "llvm/MC/MCAsmBackend.h"
16 #include "llvm/MC/MCFixupKindInfo.h"
17 #include "llvm/MC/MCSubtargetInfo.h"
21 class MCObjectTargetWriter
;
24 class RISCVAsmBackend
: public MCAsmBackend
{
25 const MCSubtargetInfo
&STI
;
28 bool ForceRelocs
= false;
29 const MCTargetOptions
&TargetOptions
;
32 RISCVAsmBackend(const MCSubtargetInfo
&STI
, uint8_t OSABI
, bool Is64Bit
,
33 const MCTargetOptions
&Options
)
34 : MCAsmBackend(llvm::endianness::little
, RISCV::fixup_riscv_relax
),
35 STI(STI
), OSABI(OSABI
), Is64Bit(Is64Bit
), TargetOptions(Options
) {
36 RISCVFeatures::validate(STI
.getTargetTriple(), STI
.getFeatureBits());
38 ~RISCVAsmBackend() override
= default;
40 void setForceRelocs() { ForceRelocs
= true; }
42 // Return Size with extra Nop Bytes for alignment directive in code section.
43 bool shouldInsertExtraNopBytesForCodeAlign(const MCAlignFragment
&AF
,
44 unsigned &Size
) override
;
46 // Insert target specific fixup type for alignment directive in code section.
47 bool shouldInsertFixupForCodeAlign(MCAssembler
&Asm
,
48 const MCAsmLayout
&Layout
,
49 MCAlignFragment
&AF
) override
;
51 bool evaluateTargetFixup(const MCAssembler
&Asm
, const MCAsmLayout
&Layout
,
52 const MCFixup
&Fixup
, const MCFragment
*DF
,
53 const MCValue
&Target
, uint64_t &Value
,
54 bool &WasForced
) override
;
56 bool handleAddSubRelocations(const MCAsmLayout
&Layout
, const MCFragment
&F
,
57 const MCFixup
&Fixup
, const MCValue
&Target
,
58 uint64_t &FixedValue
) const override
;
60 void applyFixup(const MCAssembler
&Asm
, const MCFixup
&Fixup
,
61 const MCValue
&Target
, MutableArrayRef
<char> Data
,
62 uint64_t Value
, bool IsResolved
,
63 const MCSubtargetInfo
*STI
) const override
;
65 std::unique_ptr
<MCObjectTargetWriter
>
66 createObjectTargetWriter() const override
;
68 bool shouldForceRelocation(const MCAssembler
&Asm
, const MCFixup
&Fixup
,
69 const MCValue
&Target
) override
;
71 bool fixupNeedsRelaxation(const MCFixup
&Fixup
, uint64_t Value
,
72 const MCRelaxableFragment
*DF
,
73 const MCAsmLayout
&Layout
) const override
{
74 llvm_unreachable("Handled by fixupNeedsRelaxationAdvanced");
77 bool fixupNeedsRelaxationAdvanced(const MCFixup
&Fixup
, bool Resolved
,
79 const MCRelaxableFragment
*DF
,
80 const MCAsmLayout
&Layout
,
81 const bool WasForced
) const override
;
83 unsigned getNumFixupKinds() const override
{
84 return RISCV::NumTargetFixupKinds
;
87 std::optional
<MCFixupKind
> getFixupKind(StringRef Name
) const override
;
89 const MCFixupKindInfo
&getFixupKindInfo(MCFixupKind Kind
) const override
;
91 bool mayNeedRelaxation(const MCInst
&Inst
,
92 const MCSubtargetInfo
&STI
) const override
;
93 unsigned getRelaxedOpcode(unsigned Op
) const;
95 void relaxInstruction(MCInst
&Inst
,
96 const MCSubtargetInfo
&STI
) const override
;
98 bool relaxDwarfLineAddr(MCDwarfLineAddrFragment
&DF
, MCAsmLayout
&Layout
,
99 bool &WasRelaxed
) const override
;
100 bool relaxDwarfCFA(MCDwarfCallFrameFragment
&DF
, MCAsmLayout
&Layout
,
101 bool &WasRelaxed
) const override
;
103 bool writeNopData(raw_ostream
&OS
, uint64_t Count
,
104 const MCSubtargetInfo
*STI
) const override
;
106 const MCTargetOptions
&getTargetOptions() const { return TargetOptions
; }