1 // RUN
: not llvm-mc
-triple
=amdgcn
-mcpu
=gfx1100
-mattr
=+wavefrontsize32
,-wavefrontsize64
-show-encoding
%s | FileCheck
--check-prefixes
=GFX11
,W32
%s
2 // RUN
: not llvm-mc
-triple
=amdgcn
-mcpu
=gfx1100
-mattr
=-wavefrontsize32
,+wavefrontsize64
-show-encoding
%s | FileCheck
--check-prefixes
=GFX11
,W64
%s
3 // RUN
: not llvm-mc
-triple
=amdgcn
-mcpu
=gfx1100
-mattr
=+wavefrontsize32
,-wavefrontsize64
%s
2>&1 | FileCheck
--check-prefix
=W32-ERR
--implicit-check-
not=error
: %s
4 // RUN
: not llvm-mc
-triple
=amdgcn
-mcpu
=gfx1100
-mattr
=-wavefrontsize32
,+wavefrontsize64
%s
2>&1 | FileCheck
--check-prefix
=W64-ERR
--implicit-check-
not=error
: %s
6 v_add_co_ci_u32_dpp v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[3,2,1,0]
7 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
8 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
10 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3]
11 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xff]
12 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
14 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_mirror
15 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0xff]
16 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
18 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_half_mirror
19 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0xff]
20 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
22 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shl
:1
23 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0xff]
24 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
26 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shl
:15
27 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0xff]
28 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
30 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shr
:1
31 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0xff]
32 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
34 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shr
:15
35 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0xff]
36 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
38 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_ror
:1
39 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0xff]
40 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
42 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_ror
:15
43 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0xff]
44 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
46 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_share
:0 row_mask
:0xf bank_mask
:0xf
47 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x50,0x01,0xff]
48 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
50 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_share
:15 row_mask
:0x0 bank_mask
:0x1
51 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x5f,0x01,0x01]
52 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
54 v_add_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
55 // W32
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x60,0x09,0x13]
56 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
58 v_add_co_ci_u32 v255
, vcc_lo
, v255
, v255
, vcc_lo row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
59 // W32
: encoding
: [0xfa,0xfe,0xff,0x41,0xff,0x6f,0x05,0x30]
60 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
62 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc quad_perm
:[3,2,1,0]
63 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x1b,0x00,0xff]
64 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
66 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3]
67 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0xe4,0x00,0xff]
68 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
70 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_mirror
71 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x40,0x01,0xff]
72 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
74 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_half_mirror
75 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x41,0x01,0xff]
76 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
78 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shl
:1
79 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x01,0x01,0xff]
80 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
82 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shl
:15
83 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x0f,0x01,0xff]
84 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
86 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shr
:1
87 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x11,0x01,0xff]
88 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
90 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shr
:15
91 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x1f,0x01,0xff]
92 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
94 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_ror
:1
95 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x21,0x01,0xff]
96 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
98 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_ror
:15
99 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x2f,0x01,0xff]
100 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
102 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_share
:0 row_mask
:0xf bank_mask
:0xf
103 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x50,0x01,0xff]
104 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
106 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_share
:15 row_mask
:0x0 bank_mask
:0x1
107 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x5f,0x01,0x01]
108 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
110 v_add_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
111 // W64
: encoding
: [0xfa,0x04,0x0a,0x40,0x01,0x60,0x09,0x13]
112 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
114 v_add_co_ci_u32 v255
, vcc
, v255
, v255
, vcc row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
115 // W64
: encoding
: [0xfa,0xfe,0xff,0x41,0xff,0x6f,0x05,0x30]
116 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
118 v_add_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
119 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x1b,0x00,0xff]
121 v_add_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
122 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0xe4,0x00,0xff]
124 v_add_f16 v5
, v1
, v2 row_mirror
125 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x40,0x01,0xff]
127 v_add_f16 v5
, v1
, v2 row_half_mirror
128 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x41,0x01,0xff]
130 v_add_f16 v5
, v1
, v2 row_shl
:1
131 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x01,0x01,0xff]
133 v_add_f16 v5
, v1
, v2 row_shl
:15
134 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x0f,0x01,0xff]
136 v_add_f16 v5
, v1
, v2 row_shr
:1
137 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x11,0x01,0xff]
139 v_add_f16 v5
, v1
, v2 row_shr
:15
140 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x1f,0x01,0xff]
142 v_add_f16 v5
, v1
, v2 row_ror
:1
143 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x21,0x01,0xff]
145 v_add_f16 v5
, v1
, v2 row_ror
:15
146 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x2f,0x01,0xff]
148 v_add_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
149 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x50,0x01,0xff]
151 v_add_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
152 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x5f,0x01,0x01]
154 v_add_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
155 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x64,0x01,0x60,0x09,0x13]
157 v_add_f16 v127
, -|v127|
, -|v127| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
158 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x64,0x7f,0x6f,0xf5,0x30]
160 v_add_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
161 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x1b,0x00,0xff]
163 v_add_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
164 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0xe4,0x00,0xff]
166 v_add_f32 v5
, v1
, v2 row_mirror
167 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x40,0x01,0xff]
169 v_add_f32 v5
, v1
, v2 row_half_mirror
170 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x41,0x01,0xff]
172 v_add_f32 v5
, v1
, v2 row_shl
:1
173 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x01,0x01,0xff]
175 v_add_f32 v5
, v1
, v2 row_shl
:15
176 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x0f,0x01,0xff]
178 v_add_f32 v5
, v1
, v2 row_shr
:1
179 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x11,0x01,0xff]
181 v_add_f32 v5
, v1
, v2 row_shr
:15
182 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x1f,0x01,0xff]
184 v_add_f32 v5
, v1
, v2 row_ror
:1
185 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x21,0x01,0xff]
187 v_add_f32 v5
, v1
, v2 row_ror
:15
188 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x2f,0x01,0xff]
190 v_add_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
191 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x50,0x01,0xff]
193 v_add_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
194 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x5f,0x01,0x01]
196 v_add_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
197 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x06,0x01,0x60,0x09,0x13]
199 v_add_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
200 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x07,0xff,0x6f,0xf5,0x30]
202 v_add_nc_u32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
203 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x1b,0x00,0xff]
205 v_add_nc_u32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
206 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0xe4,0x00,0xff]
208 v_add_nc_u32 v5
, v1
, v2 row_mirror
209 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x40,0x01,0xff]
211 v_add_nc_u32 v5
, v1
, v2 row_half_mirror
212 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x41,0x01,0xff]
214 v_add_nc_u32 v5
, v1
, v2 row_shl
:1
215 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x01,0x01,0xff]
217 v_add_nc_u32 v5
, v1
, v2 row_shl
:15
218 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x0f,0x01,0xff]
220 v_add_nc_u32 v5
, v1
, v2 row_shr
:1
221 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x11,0x01,0xff]
223 v_add_nc_u32 v5
, v1
, v2 row_shr
:15
224 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x1f,0x01,0xff]
226 v_add_nc_u32 v5
, v1
, v2 row_ror
:1
227 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x21,0x01,0xff]
229 v_add_nc_u32 v5
, v1
, v2 row_ror
:15
230 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x2f,0x01,0xff]
232 v_add_nc_u32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
233 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x50,0x01,0xff]
235 v_add_nc_u32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
236 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x5f,0x01,0x01]
238 v_add_nc_u32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
239 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4a,0x01,0x60,0x09,0x13]
241 v_add_nc_u32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
242 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x4b,0xff,0x6f,0x05,0x30]
244 v_and_b32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
245 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x1b,0x00,0xff]
247 v_and_b32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
248 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0xe4,0x00,0xff]
250 v_and_b32 v5
, v1
, v2 row_mirror
251 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x40,0x01,0xff]
253 v_and_b32 v5
, v1
, v2 row_half_mirror
254 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x41,0x01,0xff]
256 v_and_b32 v5
, v1
, v2 row_shl
:1
257 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x01,0x01,0xff]
259 v_and_b32 v5
, v1
, v2 row_shl
:15
260 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x0f,0x01,0xff]
262 v_and_b32 v5
, v1
, v2 row_shr
:1
263 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x11,0x01,0xff]
265 v_and_b32 v5
, v1
, v2 row_shr
:15
266 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x1f,0x01,0xff]
268 v_and_b32 v5
, v1
, v2 row_ror
:1
269 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x21,0x01,0xff]
271 v_and_b32 v5
, v1
, v2 row_ror
:15
272 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x2f,0x01,0xff]
274 v_and_b32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
275 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x50,0x01,0xff]
277 v_and_b32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
278 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x5f,0x01,0x01]
280 v_and_b32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
281 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x36,0x01,0x60,0x09,0x13]
283 v_and_b32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
284 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x37,0xff,0x6f,0x05,0x30]
286 v_ashrrev_i32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
287 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x1b,0x00,0xff]
289 v_ashrrev_i32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
290 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0xe4,0x00,0xff]
292 v_ashrrev_i32 v5
, v1
, v2 row_mirror
293 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x40,0x01,0xff]
295 v_ashrrev_i32 v5
, v1
, v2 row_half_mirror
296 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x41,0x01,0xff]
298 v_ashrrev_i32 v5
, v1
, v2 row_shl
:1
299 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x01,0x01,0xff]
301 v_ashrrev_i32 v5
, v1
, v2 row_shl
:15
302 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x0f,0x01,0xff]
304 v_ashrrev_i32 v5
, v1
, v2 row_shr
:1
305 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x11,0x01,0xff]
307 v_ashrrev_i32 v5
, v1
, v2 row_shr
:15
308 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x1f,0x01,0xff]
310 v_ashrrev_i32 v5
, v1
, v2 row_ror
:1
311 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x21,0x01,0xff]
313 v_ashrrev_i32 v5
, v1
, v2 row_ror
:15
314 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x2f,0x01,0xff]
316 v_ashrrev_i32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
317 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x50,0x01,0xff]
319 v_ashrrev_i32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
320 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x5f,0x01,0x01]
322 v_ashrrev_i32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
323 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x34,0x01,0x60,0x09,0x13]
325 v_ashrrev_i32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
326 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x35,0xff,0x6f,0x05,0x30]
328 v_cndmask_b32 v5
, v1
, v2
, vcc_lo quad_perm
:[3,2,1,0]
329 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0xff]
330 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
332 v_cndmask_b32 v5
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3]
333 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xff]
334 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
336 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_mirror
337 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0xff]
338 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
340 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_half_mirror
341 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0xff]
342 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
344 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_shl
:1
345 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0xff]
346 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
348 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_shl
:15
349 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0xff]
350 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
352 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_shr
:1
353 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0xff]
354 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
356 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_shr
:15
357 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0xff]
358 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
360 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_ror
:1
361 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0xff]
362 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
364 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_ror
:15
365 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0xff]
366 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
368 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_share
:0 row_mask
:0xf bank_mask
:0xf
369 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x50,0x01,0xff]
370 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
372 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_share
:15 row_mask
:0x0 bank_mask
:0x1
373 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x5f,0x01,0x01]
374 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
376 v_cndmask_b32 v5
, v1
, v2
, vcc_lo row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
377 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x60,0x09,0x13]
378 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
380 v_cndmask_b32 v5
, -v1
, |v2|
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 bound_ctrl
:0
381 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x90,0x00]
382 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
384 v_cndmask_b32 v5
, |v1|
, -v2
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 bound_ctrl
:0
385 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x60,0x00]
386 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
388 v_cndmask_b32 v5
, -|v1|
, -|v2|
, vcc_lo quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 bound_ctrl
:0
389 // W32
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0xf0,0x00]
390 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
392 v_cndmask_b32 v255
, v255
, v255
, vcc_lo row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
393 // W32
: encoding
: [0xfa,0xfe,0xff,0x03,0xff,0x6f,0x05,0x30]
394 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
396 v_cndmask_b32 v5
, v1
, v2
, vcc quad_perm
:[3,2,1,0]
397 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x1b,0x00,0xff]
398 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
400 v_cndmask_b32 v5
, v1
, v2
, vcc quad_perm
:[0,1,2,3]
401 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0xff]
402 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
404 v_cndmask_b32 v5
, v1
, v2
, vcc row_mirror
405 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x40,0x01,0xff]
406 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
408 v_cndmask_b32 v5
, v1
, v2
, vcc row_half_mirror
409 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x41,0x01,0xff]
410 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
412 v_cndmask_b32 v5
, v1
, v2
, vcc row_shl
:1
413 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x01,0x01,0xff]
414 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
416 v_cndmask_b32 v5
, v1
, v2
, vcc row_shl
:15
417 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x0f,0x01,0xff]
418 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
420 v_cndmask_b32 v5
, v1
, v2
, vcc row_shr
:1
421 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x11,0x01,0xff]
422 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
424 v_cndmask_b32 v5
, v1
, v2
, vcc row_shr
:15
425 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x1f,0x01,0xff]
426 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
428 v_cndmask_b32 v5
, v1
, v2
, vcc row_ror
:1
429 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x21,0x01,0xff]
430 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
432 v_cndmask_b32 v5
, v1
, v2
, vcc row_ror
:15
433 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x2f,0x01,0xff]
434 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
436 v_cndmask_b32 v5
, v1
, v2
, vcc row_share
:0 row_mask
:0xf bank_mask
:0xf
437 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x50,0x01,0xff]
438 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
440 v_cndmask_b32 v5
, v1
, v2
, vcc row_share
:15 row_mask
:0x0 bank_mask
:0x1
441 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x5f,0x01,0x01]
442 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
444 v_cndmask_b32 v5
, v1
, v2
, vcc row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
445 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0x60,0x09,0x13]
446 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
448 v_cndmask_b32 v255
, v255
, v255
, vcc row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
449 // W64
: encoding
: [0xfa,0xfe,0xff,0x03,0xff,0x6f,0x05,0x30]
450 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
452 v_cndmask_b32_dpp v5
, -v1
, |v2|
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 bound_ctrl
:0
453 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x90,0x00]
454 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
456 v_cndmask_b32_dpp v5
, |v1|
, -v2
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 bound_ctrl
:0
457 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0x60,0x00]
458 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
460 v_cndmask_b32_dpp v5
, -|v1|
, -|v2|
, vcc quad_perm
:[0,1,2,3] row_mask
:0x0 bank_mask
:0x0 bound_ctrl
:0
461 // W64
: encoding
: [0xfa,0x04,0x0a,0x02,0x01,0xe4,0xf0,0x00]
462 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
464 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
465 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0xff]
467 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
468 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xff]
470 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_mirror
471 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0xff]
473 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_half_mirror
474 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0xff]
476 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_shl
:1
477 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0xff]
479 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_shl
:15
480 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0xff]
482 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_shr
:1
483 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0xff]
485 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_shr
:15
486 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0xff]
488 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_ror
:1
489 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0xff]
491 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_ror
:15
492 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0xff]
494 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
495 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x50,0x01,0xff]
497 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
498 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x5f,0x01,0x01]
500 v_cvt_pk_rtz_f16_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
501 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x60,0x09,0x13]
503 v_cvt_pk_rtz_f16_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
504 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x5f,0xff,0x6f,0xf5,0x30]
506 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
507 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x1b,0x00,0xff]
509 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
510 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0xe4,0x00,0xff]
512 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_mirror
513 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x40,0x01,0xff]
515 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_half_mirror
516 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x41,0x01,0xff]
518 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_shl
:1
519 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x01,0x01,0xff]
521 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_shl
:15
522 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x0f,0x01,0xff]
524 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_shr
:1
525 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x11,0x01,0xff]
527 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_shr
:15
528 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x1f,0x01,0xff]
530 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_ror
:1
531 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x21,0x01,0xff]
533 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_ror
:15
534 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x2f,0x01,0xff]
536 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
537 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x50,0x01,0xff]
539 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
540 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x5f,0x01,0x01]
542 v_cvt_pkrtz_f16_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
543 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x5e,0x01,0x60,0x09,0x13]
545 v_cvt_pkrtz_f16_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
546 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x5f,0xff,0x6f,0xf5,0x30]
548 v_dot2acc_f32_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
549 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0xff]
551 v_dot2acc_f32_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
552 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xff]
554 v_dot2acc_f32_f16 v5
, v1
, v2 row_mirror
555 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0xff]
557 v_dot2acc_f32_f16 v5
, v1
, v2 row_half_mirror
558 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0xff]
560 v_dot2acc_f32_f16 v5
, v1
, v2 row_shl
:1
561 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0xff]
563 v_dot2acc_f32_f16 v5
, v1
, v2 row_shl
:15
564 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0xff]
566 v_dot2acc_f32_f16 v5
, v1
, v2 row_shr
:1
567 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0xff]
569 v_dot2acc_f32_f16 v5
, v1
, v2 row_shr
:15
570 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0xff]
572 v_dot2acc_f32_f16 v5
, v1
, v2 row_ror
:1
573 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0xff]
575 v_dot2acc_f32_f16 v5
, v1
, v2 row_ror
:15
576 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0xff]
578 v_dot2acc_f32_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
579 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x50,0x01,0xff]
581 v_dot2acc_f32_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
582 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x5f,0x01,0x01]
584 v_dot2acc_f32_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
585 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x60,0x09,0x13]
587 v_dot2acc_f32_f16 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
588 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x05,0xff,0x6f,0xf5,0x30]
590 v_dot2c_f32_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
591 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x1b,0x00,0xff]
593 v_dot2c_f32_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
594 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0xe4,0x00,0xff]
596 v_dot2c_f32_f16 v5
, v1
, v2 row_mirror
597 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x40,0x01,0xff]
599 v_dot2c_f32_f16 v5
, v1
, v2 row_half_mirror
600 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x41,0x01,0xff]
602 v_dot2c_f32_f16 v5
, v1
, v2 row_shl
:1
603 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x01,0x01,0xff]
605 v_dot2c_f32_f16 v5
, v1
, v2 row_shl
:15
606 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x0f,0x01,0xff]
608 v_dot2c_f32_f16 v5
, v1
, v2 row_shr
:1
609 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x11,0x01,0xff]
611 v_dot2c_f32_f16 v5
, v1
, v2 row_shr
:15
612 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x1f,0x01,0xff]
614 v_dot2c_f32_f16 v5
, v1
, v2 row_ror
:1
615 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x21,0x01,0xff]
617 v_dot2c_f32_f16 v5
, v1
, v2 row_ror
:15
618 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x2f,0x01,0xff]
620 v_dot2c_f32_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
621 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x50,0x01,0xff]
623 v_dot2c_f32_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
624 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x5f,0x01,0x01]
626 v_dot2c_f32_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
627 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x04,0x01,0x60,0x09,0x13]
629 v_dot2c_f32_f16 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
630 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x05,0xff,0x6f,0xf5,0x30]
632 v_fmac_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
633 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x1b,0x00,0xff]
635 v_fmac_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
636 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0xe4,0x00,0xff]
638 v_fmac_f16 v5
, v1
, v2 row_mirror
639 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x40,0x01,0xff]
641 v_fmac_f16 v5
, v1
, v2 row_half_mirror
642 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x41,0x01,0xff]
644 v_fmac_f16 v5
, v1
, v2 row_shl
:1
645 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x01,0x01,0xff]
647 v_fmac_f16 v5
, v1
, v2 row_shl
:15
648 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x0f,0x01,0xff]
650 v_fmac_f16 v5
, v1
, v2 row_shr
:1
651 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x11,0x01,0xff]
653 v_fmac_f16 v5
, v1
, v2 row_shr
:15
654 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x1f,0x01,0xff]
656 v_fmac_f16 v5
, v1
, v2 row_ror
:1
657 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x21,0x01,0xff]
659 v_fmac_f16 v5
, v1
, v2 row_ror
:15
660 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x2f,0x01,0xff]
662 v_fmac_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
663 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x50,0x01,0xff]
665 v_fmac_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
666 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x5f,0x01,0x01]
668 v_fmac_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
669 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6c,0x01,0x60,0x09,0x13]
671 v_fmac_f16 v127
, -|v127|
, -|v127| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
672 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x6c,0x7f,0x6f,0xf5,0x30]
674 v_fmac_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
675 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x1b,0x00,0xff]
677 v_fmac_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
678 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0xe4,0x00,0xff]
680 v_fmac_f32 v5
, v1
, v2 row_mirror
681 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x40,0x01,0xff]
683 v_fmac_f32 v5
, v1
, v2 row_half_mirror
684 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x41,0x01,0xff]
686 v_fmac_f32 v5
, v1
, v2 row_shl
:1
687 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x01,0x01,0xff]
689 v_fmac_f32 v5
, v1
, v2 row_shl
:15
690 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x0f,0x01,0xff]
692 v_fmac_f32 v5
, v1
, v2 row_shr
:1
693 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x11,0x01,0xff]
695 v_fmac_f32 v5
, v1
, v2 row_shr
:15
696 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x1f,0x01,0xff]
698 v_fmac_f32 v5
, v1
, v2 row_ror
:1
699 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x21,0x01,0xff]
701 v_fmac_f32 v5
, v1
, v2 row_ror
:15
702 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x2f,0x01,0xff]
704 v_fmac_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
705 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x50,0x01,0xff]
707 v_fmac_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
708 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x5f,0x01,0x01]
710 v_fmac_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
711 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x56,0x01,0x60,0x09,0x13]
713 v_fmac_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
714 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x57,0xff,0x6f,0xf5,0x30]
716 v_ldexp_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
717 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x1b,0x00,0xff]
719 v_ldexp_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
720 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0xe4,0x00,0xff]
722 v_ldexp_f16 v5
, v1
, v2 row_mirror
723 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x40,0x01,0xff]
725 v_ldexp_f16 v5
, v1
, v2 row_half_mirror
726 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x41,0x01,0xff]
728 v_ldexp_f16 v5
, v1
, v2 row_shl
:1
729 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x01,0x01,0xff]
731 v_ldexp_f16 v5
, v1
, v2 row_shl
:15
732 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x0f,0x01,0xff]
734 v_ldexp_f16 v5
, v1
, v2 row_shr
:1
735 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x11,0x01,0xff]
737 v_ldexp_f16 v5
, v1
, v2 row_shr
:15
738 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x1f,0x01,0xff]
740 v_ldexp_f16 v5
, v1
, v2 row_ror
:1
741 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x21,0x01,0xff]
743 v_ldexp_f16 v5
, v1
, v2 row_ror
:15
744 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x2f,0x01,0xff]
746 v_ldexp_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
747 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x50,0x01,0xff]
749 v_ldexp_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
750 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x5f,0x01,0x01]
752 v_ldexp_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
753 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x76,0x01,0x60,0x09,0x13]
755 v_ldexp_f16 v127
, -|v127|
, v127 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
756 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x76,0x7f,0x6f,0x35,0x30]
758 v_lshlrev_b32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
759 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x1b,0x00,0xff]
761 v_lshlrev_b32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
762 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0xe4,0x00,0xff]
764 v_lshlrev_b32 v5
, v1
, v2 row_mirror
765 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x40,0x01,0xff]
767 v_lshlrev_b32 v5
, v1
, v2 row_half_mirror
768 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x41,0x01,0xff]
770 v_lshlrev_b32 v5
, v1
, v2 row_shl
:1
771 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x01,0x01,0xff]
773 v_lshlrev_b32 v5
, v1
, v2 row_shl
:15
774 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x0f,0x01,0xff]
776 v_lshlrev_b32 v5
, v1
, v2 row_shr
:1
777 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x11,0x01,0xff]
779 v_lshlrev_b32 v5
, v1
, v2 row_shr
:15
780 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x1f,0x01,0xff]
782 v_lshlrev_b32 v5
, v1
, v2 row_ror
:1
783 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x21,0x01,0xff]
785 v_lshlrev_b32 v5
, v1
, v2 row_ror
:15
786 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x2f,0x01,0xff]
788 v_lshlrev_b32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
789 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x50,0x01,0xff]
791 v_lshlrev_b32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
792 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x5f,0x01,0x01]
794 v_lshlrev_b32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
795 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x30,0x01,0x60,0x09,0x13]
797 v_lshlrev_b32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
798 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x31,0xff,0x6f,0x05,0x30]
800 v_lshrrev_b32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
801 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x1b,0x00,0xff]
803 v_lshrrev_b32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
804 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0xe4,0x00,0xff]
806 v_lshrrev_b32 v5
, v1
, v2 row_mirror
807 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x40,0x01,0xff]
809 v_lshrrev_b32 v5
, v1
, v2 row_half_mirror
810 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x41,0x01,0xff]
812 v_lshrrev_b32 v5
, v1
, v2 row_shl
:1
813 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x01,0x01,0xff]
815 v_lshrrev_b32 v5
, v1
, v2 row_shl
:15
816 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x0f,0x01,0xff]
818 v_lshrrev_b32 v5
, v1
, v2 row_shr
:1
819 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x11,0x01,0xff]
821 v_lshrrev_b32 v5
, v1
, v2 row_shr
:15
822 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x1f,0x01,0xff]
824 v_lshrrev_b32 v5
, v1
, v2 row_ror
:1
825 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x21,0x01,0xff]
827 v_lshrrev_b32 v5
, v1
, v2 row_ror
:15
828 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x2f,0x01,0xff]
830 v_lshrrev_b32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
831 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x50,0x01,0xff]
833 v_lshrrev_b32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
834 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x5f,0x01,0x01]
836 v_lshrrev_b32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
837 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x32,0x01,0x60,0x09,0x13]
839 v_lshrrev_b32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
840 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x33,0xff,0x6f,0x05,0x30]
842 v_max_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
843 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x1b,0x00,0xff]
845 v_max_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
846 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0xe4,0x00,0xff]
848 v_max_f16 v5
, v1
, v2 row_mirror
849 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x40,0x01,0xff]
851 v_max_f16 v5
, v1
, v2 row_half_mirror
852 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x41,0x01,0xff]
854 v_max_f16 v5
, v1
, v2 row_shl
:1
855 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x01,0x01,0xff]
857 v_max_f16 v5
, v1
, v2 row_shl
:15
858 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x0f,0x01,0xff]
860 v_max_f16 v5
, v1
, v2 row_shr
:1
861 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x11,0x01,0xff]
863 v_max_f16 v5
, v1
, v2 row_shr
:15
864 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x1f,0x01,0xff]
866 v_max_f16 v5
, v1
, v2 row_ror
:1
867 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x21,0x01,0xff]
869 v_max_f16 v5
, v1
, v2 row_ror
:15
870 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x2f,0x01,0xff]
872 v_max_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
873 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x50,0x01,0xff]
875 v_max_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
876 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x5f,0x01,0x01]
878 v_max_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
879 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x72,0x01,0x60,0x09,0x13]
881 v_max_f16 v127
, -|v127|
, -|v127| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
882 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x72,0x7f,0x6f,0xf5,0x30]
884 v_max_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
885 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x1b,0x00,0xff]
887 v_max_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
888 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0xe4,0x00,0xff]
890 v_max_f32 v5
, v1
, v2 row_mirror
891 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x40,0x01,0xff]
893 v_max_f32 v5
, v1
, v2 row_half_mirror
894 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x41,0x01,0xff]
896 v_max_f32 v5
, v1
, v2 row_shl
:1
897 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x01,0x01,0xff]
899 v_max_f32 v5
, v1
, v2 row_shl
:15
900 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x0f,0x01,0xff]
902 v_max_f32 v5
, v1
, v2 row_shr
:1
903 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x11,0x01,0xff]
905 v_max_f32 v5
, v1
, v2 row_shr
:15
906 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x1f,0x01,0xff]
908 v_max_f32 v5
, v1
, v2 row_ror
:1
909 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x21,0x01,0xff]
911 v_max_f32 v5
, v1
, v2 row_ror
:15
912 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x2f,0x01,0xff]
914 v_max_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
915 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x50,0x01,0xff]
917 v_max_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
918 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x5f,0x01,0x01]
920 v_max_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
921 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x20,0x01,0x60,0x09,0x13]
923 v_max_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
924 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x21,0xff,0x6f,0xf5,0x30]
926 v_max_i32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
927 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x1b,0x00,0xff]
929 v_max_i32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
930 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0xe4,0x00,0xff]
932 v_max_i32 v5
, v1
, v2 row_mirror
933 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x40,0x01,0xff]
935 v_max_i32 v5
, v1
, v2 row_half_mirror
936 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x41,0x01,0xff]
938 v_max_i32 v5
, v1
, v2 row_shl
:1
939 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x01,0x01,0xff]
941 v_max_i32 v5
, v1
, v2 row_shl
:15
942 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x0f,0x01,0xff]
944 v_max_i32 v5
, v1
, v2 row_shr
:1
945 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x11,0x01,0xff]
947 v_max_i32 v5
, v1
, v2 row_shr
:15
948 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x1f,0x01,0xff]
950 v_max_i32 v5
, v1
, v2 row_ror
:1
951 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x21,0x01,0xff]
953 v_max_i32 v5
, v1
, v2 row_ror
:15
954 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x2f,0x01,0xff]
956 v_max_i32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
957 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x50,0x01,0xff]
959 v_max_i32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
960 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x5f,0x01,0x01]
962 v_max_i32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
963 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x24,0x01,0x60,0x09,0x13]
965 v_max_i32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
966 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x25,0xff,0x6f,0x05,0x30]
968 v_max_u32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
969 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x1b,0x00,0xff]
971 v_max_u32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
972 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0xe4,0x00,0xff]
974 v_max_u32 v5
, v1
, v2 row_mirror
975 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x40,0x01,0xff]
977 v_max_u32 v5
, v1
, v2 row_half_mirror
978 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x41,0x01,0xff]
980 v_max_u32 v5
, v1
, v2 row_shl
:1
981 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x01,0x01,0xff]
983 v_max_u32 v5
, v1
, v2 row_shl
:15
984 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x0f,0x01,0xff]
986 v_max_u32 v5
, v1
, v2 row_shr
:1
987 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x11,0x01,0xff]
989 v_max_u32 v5
, v1
, v2 row_shr
:15
990 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x1f,0x01,0xff]
992 v_max_u32 v5
, v1
, v2 row_ror
:1
993 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x21,0x01,0xff]
995 v_max_u32 v5
, v1
, v2 row_ror
:15
996 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x2f,0x01,0xff]
998 v_max_u32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
999 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x50,0x01,0xff]
1001 v_max_u32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1002 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x5f,0x01,0x01]
1004 v_max_u32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1005 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x28,0x01,0x60,0x09,0x13]
1007 v_max_u32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1008 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x29,0xff,0x6f,0x05,0x30]
1010 v_min_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1011 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x1b,0x00,0xff]
1013 v_min_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1014 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0xe4,0x00,0xff]
1016 v_min_f16 v5
, v1
, v2 row_mirror
1017 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x40,0x01,0xff]
1019 v_min_f16 v5
, v1
, v2 row_half_mirror
1020 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x41,0x01,0xff]
1022 v_min_f16 v5
, v1
, v2 row_shl
:1
1023 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x01,0x01,0xff]
1025 v_min_f16 v5
, v1
, v2 row_shl
:15
1026 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x0f,0x01,0xff]
1028 v_min_f16 v5
, v1
, v2 row_shr
:1
1029 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x11,0x01,0xff]
1031 v_min_f16 v5
, v1
, v2 row_shr
:15
1032 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x1f,0x01,0xff]
1034 v_min_f16 v5
, v1
, v2 row_ror
:1
1035 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x21,0x01,0xff]
1037 v_min_f16 v5
, v1
, v2 row_ror
:15
1038 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x2f,0x01,0xff]
1040 v_min_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1041 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x50,0x01,0xff]
1043 v_min_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1044 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x5f,0x01,0x01]
1046 v_min_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1047 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x74,0x01,0x60,0x09,0x13]
1049 v_min_f16 v127
, -|v127|
, -|v127| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1050 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x74,0x7f,0x6f,0xf5,0x30]
1052 v_min_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1053 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x1b,0x00,0xff]
1055 v_min_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1056 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0xe4,0x00,0xff]
1058 v_min_f32 v5
, v1
, v2 row_mirror
1059 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x40,0x01,0xff]
1061 v_min_f32 v5
, v1
, v2 row_half_mirror
1062 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x41,0x01,0xff]
1064 v_min_f32 v5
, v1
, v2 row_shl
:1
1065 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x01,0x01,0xff]
1067 v_min_f32 v5
, v1
, v2 row_shl
:15
1068 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x0f,0x01,0xff]
1070 v_min_f32 v5
, v1
, v2 row_shr
:1
1071 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x11,0x01,0xff]
1073 v_min_f32 v5
, v1
, v2 row_shr
:15
1074 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x1f,0x01,0xff]
1076 v_min_f32 v5
, v1
, v2 row_ror
:1
1077 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x21,0x01,0xff]
1079 v_min_f32 v5
, v1
, v2 row_ror
:15
1080 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x2f,0x01,0xff]
1082 v_min_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1083 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x50,0x01,0xff]
1085 v_min_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1086 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x5f,0x01,0x01]
1088 v_min_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1089 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x1e,0x01,0x60,0x09,0x13]
1091 v_min_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1092 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x1f,0xff,0x6f,0xf5,0x30]
1094 v_min_i32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1095 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x1b,0x00,0xff]
1097 v_min_i32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1098 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0xe4,0x00,0xff]
1100 v_min_i32 v5
, v1
, v2 row_mirror
1101 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x40,0x01,0xff]
1103 v_min_i32 v5
, v1
, v2 row_half_mirror
1104 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x41,0x01,0xff]
1106 v_min_i32 v5
, v1
, v2 row_shl
:1
1107 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x01,0x01,0xff]
1109 v_min_i32 v5
, v1
, v2 row_shl
:15
1110 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x0f,0x01,0xff]
1112 v_min_i32 v5
, v1
, v2 row_shr
:1
1113 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x11,0x01,0xff]
1115 v_min_i32 v5
, v1
, v2 row_shr
:15
1116 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x1f,0x01,0xff]
1118 v_min_i32 v5
, v1
, v2 row_ror
:1
1119 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x21,0x01,0xff]
1121 v_min_i32 v5
, v1
, v2 row_ror
:15
1122 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x2f,0x01,0xff]
1124 v_min_i32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1125 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x50,0x01,0xff]
1127 v_min_i32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1128 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x5f,0x01,0x01]
1130 v_min_i32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1131 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x22,0x01,0x60,0x09,0x13]
1133 v_min_i32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1134 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x23,0xff,0x6f,0x05,0x30]
1136 v_min_u32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1137 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x1b,0x00,0xff]
1139 v_min_u32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1140 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0xe4,0x00,0xff]
1142 v_min_u32 v5
, v1
, v2 row_mirror
1143 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x40,0x01,0xff]
1145 v_min_u32 v5
, v1
, v2 row_half_mirror
1146 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x41,0x01,0xff]
1148 v_min_u32 v5
, v1
, v2 row_shl
:1
1149 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x01,0x01,0xff]
1151 v_min_u32 v5
, v1
, v2 row_shl
:15
1152 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x0f,0x01,0xff]
1154 v_min_u32 v5
, v1
, v2 row_shr
:1
1155 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x11,0x01,0xff]
1157 v_min_u32 v5
, v1
, v2 row_shr
:15
1158 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x1f,0x01,0xff]
1160 v_min_u32 v5
, v1
, v2 row_ror
:1
1161 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x21,0x01,0xff]
1163 v_min_u32 v5
, v1
, v2 row_ror
:15
1164 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x2f,0x01,0xff]
1166 v_min_u32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1167 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x50,0x01,0xff]
1169 v_min_u32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1170 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x5f,0x01,0x01]
1172 v_min_u32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1173 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x26,0x01,0x60,0x09,0x13]
1175 v_min_u32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1176 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x27,0xff,0x6f,0x05,0x30]
1178 v_mul_dx9_zero_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1179 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0xff]
1181 v_mul_dx9_zero_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1182 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xff]
1184 v_mul_dx9_zero_f32 v5
, v1
, v2 row_mirror
1185 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0xff]
1187 v_mul_dx9_zero_f32 v5
, v1
, v2 row_half_mirror
1188 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0xff]
1190 v_mul_dx9_zero_f32 v5
, v1
, v2 row_shl
:1
1191 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0xff]
1193 v_mul_dx9_zero_f32 v5
, v1
, v2 row_shl
:15
1194 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0xff]
1196 v_mul_dx9_zero_f32 v5
, v1
, v2 row_shr
:1
1197 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0xff]
1199 v_mul_dx9_zero_f32 v5
, v1
, v2 row_shr
:15
1200 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0xff]
1202 v_mul_dx9_zero_f32 v5
, v1
, v2 row_ror
:1
1203 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0xff]
1205 v_mul_dx9_zero_f32 v5
, v1
, v2 row_ror
:15
1206 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0xff]
1208 v_mul_dx9_zero_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1209 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x50,0x01,0xff]
1211 v_mul_dx9_zero_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1212 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x5f,0x01,0x01]
1214 v_mul_dx9_zero_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1215 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x60,0x09,0x13]
1217 v_mul_dx9_zero_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1218 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x0f,0xff,0x6f,0xf5,0x30]
1220 v_mul_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1221 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x1b,0x00,0xff]
1223 v_mul_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1224 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0xe4,0x00,0xff]
1226 v_mul_f16 v5
, v1
, v2 row_mirror
1227 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x40,0x01,0xff]
1229 v_mul_f16 v5
, v1
, v2 row_half_mirror
1230 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x41,0x01,0xff]
1232 v_mul_f16 v5
, v1
, v2 row_shl
:1
1233 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x01,0x01,0xff]
1235 v_mul_f16 v5
, v1
, v2 row_shl
:15
1236 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x0f,0x01,0xff]
1238 v_mul_f16 v5
, v1
, v2 row_shr
:1
1239 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x11,0x01,0xff]
1241 v_mul_f16 v5
, v1
, v2 row_shr
:15
1242 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x1f,0x01,0xff]
1244 v_mul_f16 v5
, v1
, v2 row_ror
:1
1245 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x21,0x01,0xff]
1247 v_mul_f16 v5
, v1
, v2 row_ror
:15
1248 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x2f,0x01,0xff]
1250 v_mul_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1251 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x50,0x01,0xff]
1253 v_mul_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1254 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x5f,0x01,0x01]
1256 v_mul_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1257 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x6a,0x01,0x60,0x09,0x13]
1259 v_mul_f16 v127
, -|v127|
, -|v127| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1260 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x6a,0x7f,0x6f,0xf5,0x30]
1262 v_mul_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1263 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x1b,0x00,0xff]
1265 v_mul_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1266 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0xe4,0x00,0xff]
1268 v_mul_f32 v5
, v1
, v2 row_mirror
1269 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x40,0x01,0xff]
1271 v_mul_f32 v5
, v1
, v2 row_half_mirror
1272 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x41,0x01,0xff]
1274 v_mul_f32 v5
, v1
, v2 row_shl
:1
1275 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x01,0x01,0xff]
1277 v_mul_f32 v5
, v1
, v2 row_shl
:15
1278 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x0f,0x01,0xff]
1280 v_mul_f32 v5
, v1
, v2 row_shr
:1
1281 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x11,0x01,0xff]
1283 v_mul_f32 v5
, v1
, v2 row_shr
:15
1284 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x1f,0x01,0xff]
1286 v_mul_f32 v5
, v1
, v2 row_ror
:1
1287 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x21,0x01,0xff]
1289 v_mul_f32 v5
, v1
, v2 row_ror
:15
1290 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x2f,0x01,0xff]
1292 v_mul_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1293 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x50,0x01,0xff]
1295 v_mul_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1296 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x5f,0x01,0x01]
1298 v_mul_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1299 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x10,0x01,0x60,0x09,0x13]
1301 v_mul_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1302 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x11,0xff,0x6f,0xf5,0x30]
1304 v_mul_hi_i32_i24 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1305 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x1b,0x00,0xff]
1307 v_mul_hi_i32_i24 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1308 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0xe4,0x00,0xff]
1310 v_mul_hi_i32_i24 v5
, v1
, v2 row_mirror
1311 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x40,0x01,0xff]
1313 v_mul_hi_i32_i24 v5
, v1
, v2 row_half_mirror
1314 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x41,0x01,0xff]
1316 v_mul_hi_i32_i24 v5
, v1
, v2 row_shl
:1
1317 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x01,0x01,0xff]
1319 v_mul_hi_i32_i24 v5
, v1
, v2 row_shl
:15
1320 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x0f,0x01,0xff]
1322 v_mul_hi_i32_i24 v5
, v1
, v2 row_shr
:1
1323 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x11,0x01,0xff]
1325 v_mul_hi_i32_i24 v5
, v1
, v2 row_shr
:15
1326 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x1f,0x01,0xff]
1328 v_mul_hi_i32_i24 v5
, v1
, v2 row_ror
:1
1329 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x21,0x01,0xff]
1331 v_mul_hi_i32_i24 v5
, v1
, v2 row_ror
:15
1332 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x2f,0x01,0xff]
1334 v_mul_hi_i32_i24 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1335 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x50,0x01,0xff]
1337 v_mul_hi_i32_i24 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1338 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x5f,0x01,0x01]
1340 v_mul_hi_i32_i24 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1341 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x14,0x01,0x60,0x09,0x13]
1343 v_mul_hi_i32_i24 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1344 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x15,0xff,0x6f,0x05,0x30]
1346 v_mul_hi_u32_u24 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1347 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x1b,0x00,0xff]
1349 v_mul_hi_u32_u24 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1350 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0xe4,0x00,0xff]
1352 v_mul_hi_u32_u24 v5
, v1
, v2 row_mirror
1353 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x40,0x01,0xff]
1355 v_mul_hi_u32_u24 v5
, v1
, v2 row_half_mirror
1356 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x41,0x01,0xff]
1358 v_mul_hi_u32_u24 v5
, v1
, v2 row_shl
:1
1359 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x01,0x01,0xff]
1361 v_mul_hi_u32_u24 v5
, v1
, v2 row_shl
:15
1362 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x0f,0x01,0xff]
1364 v_mul_hi_u32_u24 v5
, v1
, v2 row_shr
:1
1365 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x11,0x01,0xff]
1367 v_mul_hi_u32_u24 v5
, v1
, v2 row_shr
:15
1368 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x1f,0x01,0xff]
1370 v_mul_hi_u32_u24 v5
, v1
, v2 row_ror
:1
1371 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x21,0x01,0xff]
1373 v_mul_hi_u32_u24 v5
, v1
, v2 row_ror
:15
1374 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x2f,0x01,0xff]
1376 v_mul_hi_u32_u24 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1377 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x50,0x01,0xff]
1379 v_mul_hi_u32_u24 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1380 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x5f,0x01,0x01]
1382 v_mul_hi_u32_u24 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1383 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x18,0x01,0x60,0x09,0x13]
1385 v_mul_hi_u32_u24 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1386 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x19,0xff,0x6f,0x05,0x30]
1388 v_mul_i32_i24 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1389 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x1b,0x00,0xff]
1391 v_mul_i32_i24 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1392 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0xe4,0x00,0xff]
1394 v_mul_i32_i24 v5
, v1
, v2 row_mirror
1395 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x40,0x01,0xff]
1397 v_mul_i32_i24 v5
, v1
, v2 row_half_mirror
1398 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x41,0x01,0xff]
1400 v_mul_i32_i24 v5
, v1
, v2 row_shl
:1
1401 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x01,0x01,0xff]
1403 v_mul_i32_i24 v5
, v1
, v2 row_shl
:15
1404 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x0f,0x01,0xff]
1406 v_mul_i32_i24 v5
, v1
, v2 row_shr
:1
1407 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x11,0x01,0xff]
1409 v_mul_i32_i24 v5
, v1
, v2 row_shr
:15
1410 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x1f,0x01,0xff]
1412 v_mul_i32_i24 v5
, v1
, v2 row_ror
:1
1413 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x21,0x01,0xff]
1415 v_mul_i32_i24 v5
, v1
, v2 row_ror
:15
1416 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x2f,0x01,0xff]
1418 v_mul_i32_i24 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1419 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x50,0x01,0xff]
1421 v_mul_i32_i24 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1422 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x5f,0x01,0x01]
1424 v_mul_i32_i24 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1425 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x12,0x01,0x60,0x09,0x13]
1427 v_mul_i32_i24 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1428 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x13,0xff,0x6f,0x05,0x30]
1430 v_mul_legacy_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1431 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x1b,0x00,0xff]
1433 v_mul_legacy_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1434 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0xe4,0x00,0xff]
1436 v_mul_legacy_f32 v5
, v1
, v2 row_mirror
1437 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x40,0x01,0xff]
1439 v_mul_legacy_f32 v5
, v1
, v2 row_half_mirror
1440 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x41,0x01,0xff]
1442 v_mul_legacy_f32 v5
, v1
, v2 row_shl
:1
1443 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x01,0x01,0xff]
1445 v_mul_legacy_f32 v5
, v1
, v2 row_shl
:15
1446 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x0f,0x01,0xff]
1448 v_mul_legacy_f32 v5
, v1
, v2 row_shr
:1
1449 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x11,0x01,0xff]
1451 v_mul_legacy_f32 v5
, v1
, v2 row_shr
:15
1452 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x1f,0x01,0xff]
1454 v_mul_legacy_f32 v5
, v1
, v2 row_ror
:1
1455 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x21,0x01,0xff]
1457 v_mul_legacy_f32 v5
, v1
, v2 row_ror
:15
1458 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x2f,0x01,0xff]
1460 v_mul_legacy_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1461 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x50,0x01,0xff]
1463 v_mul_legacy_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1464 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x5f,0x01,0x01]
1466 v_mul_legacy_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1467 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0e,0x01,0x60,0x09,0x13]
1469 v_mul_legacy_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1470 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x0f,0xff,0x6f,0xf5,0x30]
1472 v_mul_u32_u24 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1473 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x1b,0x00,0xff]
1475 v_mul_u32_u24 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1476 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0xe4,0x00,0xff]
1478 v_mul_u32_u24 v5
, v1
, v2 row_mirror
1479 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x40,0x01,0xff]
1481 v_mul_u32_u24 v5
, v1
, v2 row_half_mirror
1482 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x41,0x01,0xff]
1484 v_mul_u32_u24 v5
, v1
, v2 row_shl
:1
1485 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x01,0x01,0xff]
1487 v_mul_u32_u24 v5
, v1
, v2 row_shl
:15
1488 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x0f,0x01,0xff]
1490 v_mul_u32_u24 v5
, v1
, v2 row_shr
:1
1491 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x11,0x01,0xff]
1493 v_mul_u32_u24 v5
, v1
, v2 row_shr
:15
1494 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x1f,0x01,0xff]
1496 v_mul_u32_u24 v5
, v1
, v2 row_ror
:1
1497 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x21,0x01,0xff]
1499 v_mul_u32_u24 v5
, v1
, v2 row_ror
:15
1500 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x2f,0x01,0xff]
1502 v_mul_u32_u24 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1503 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x50,0x01,0xff]
1505 v_mul_u32_u24 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1506 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x5f,0x01,0x01]
1508 v_mul_u32_u24 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1509 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x16,0x01,0x60,0x09,0x13]
1511 v_mul_u32_u24 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1512 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x17,0xff,0x6f,0x05,0x30]
1514 v_or_b32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1515 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x1b,0x00,0xff]
1517 v_or_b32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1518 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0xe4,0x00,0xff]
1520 v_or_b32 v5
, v1
, v2 row_mirror
1521 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x40,0x01,0xff]
1523 v_or_b32 v5
, v1
, v2 row_half_mirror
1524 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x41,0x01,0xff]
1526 v_or_b32 v5
, v1
, v2 row_shl
:1
1527 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x01,0x01,0xff]
1529 v_or_b32 v5
, v1
, v2 row_shl
:15
1530 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x0f,0x01,0xff]
1532 v_or_b32 v5
, v1
, v2 row_shr
:1
1533 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x11,0x01,0xff]
1535 v_or_b32 v5
, v1
, v2 row_shr
:15
1536 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x1f,0x01,0xff]
1538 v_or_b32 v5
, v1
, v2 row_ror
:1
1539 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x21,0x01,0xff]
1541 v_or_b32 v5
, v1
, v2 row_ror
:15
1542 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x2f,0x01,0xff]
1544 v_or_b32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1545 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x50,0x01,0xff]
1547 v_or_b32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1548 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x5f,0x01,0x01]
1550 v_or_b32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1551 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x38,0x01,0x60,0x09,0x13]
1553 v_or_b32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1554 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x39,0xff,0x6f,0x05,0x30]
1556 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[3,2,1,0]
1557 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0xff]
1558 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1560 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3]
1561 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xff]
1562 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1564 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_mirror
1565 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0xff]
1566 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1568 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_half_mirror
1569 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0xff]
1570 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1572 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shl
:1
1573 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0xff]
1574 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1576 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shl
:15
1577 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0xff]
1578 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1580 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shr
:1
1581 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0xff]
1582 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1584 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shr
:15
1585 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0xff]
1586 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1588 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_ror
:1
1589 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0xff]
1590 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1592 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_ror
:15
1593 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0xff]
1594 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1596 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_share
:0 row_mask
:0xf bank_mask
:0xf
1597 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x50,0x01,0xff]
1598 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1600 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_share
:15 row_mask
:0x0 bank_mask
:0x1
1601 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x5f,0x01,0x01]
1602 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1604 v_sub_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1605 // W32
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x60,0x09,0x13]
1606 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1608 v_sub_co_ci_u32 v255
, vcc_lo
, v255
, v255
, vcc_lo row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1609 // W32
: encoding
: [0xfa,0xfe,0xff,0x43,0xff,0x6f,0x05,0x30]
1610 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1612 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc quad_perm
:[3,2,1,0]
1613 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x1b,0x00,0xff]
1614 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1616 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3]
1617 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0xe4,0x00,0xff]
1618 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1620 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_mirror
1621 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x40,0x01,0xff]
1622 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1624 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_half_mirror
1625 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x41,0x01,0xff]
1626 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1628 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shl
:1
1629 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x01,0x01,0xff]
1630 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1632 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shl
:15
1633 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x0f,0x01,0xff]
1634 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1636 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shr
:1
1637 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x11,0x01,0xff]
1638 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1640 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shr
:15
1641 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x1f,0x01,0xff]
1642 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1644 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_ror
:1
1645 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x21,0x01,0xff]
1646 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1648 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_ror
:15
1649 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x2f,0x01,0xff]
1650 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1652 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_share
:0 row_mask
:0xf bank_mask
:0xf
1653 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x50,0x01,0xff]
1654 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1656 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_share
:15 row_mask
:0x0 bank_mask
:0x1
1657 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x5f,0x01,0x01]
1658 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1660 v_sub_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1661 // W64
: encoding
: [0xfa,0x04,0x0a,0x42,0x01,0x60,0x09,0x13]
1662 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1664 v_sub_co_ci_u32 v255
, vcc
, v255
, v255
, vcc row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1665 // W64
: encoding
: [0xfa,0xfe,0xff,0x43,0xff,0x6f,0x05,0x30]
1666 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1668 v_sub_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1669 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x1b,0x00,0xff]
1671 v_sub_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1672 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0xe4,0x00,0xff]
1674 v_sub_f16 v5
, v1
, v2 row_mirror
1675 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x40,0x01,0xff]
1677 v_sub_f16 v5
, v1
, v2 row_half_mirror
1678 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x41,0x01,0xff]
1680 v_sub_f16 v5
, v1
, v2 row_shl
:1
1681 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x01,0x01,0xff]
1683 v_sub_f16 v5
, v1
, v2 row_shl
:15
1684 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x0f,0x01,0xff]
1686 v_sub_f16 v5
, v1
, v2 row_shr
:1
1687 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x11,0x01,0xff]
1689 v_sub_f16 v5
, v1
, v2 row_shr
:15
1690 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x1f,0x01,0xff]
1692 v_sub_f16 v5
, v1
, v2 row_ror
:1
1693 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x21,0x01,0xff]
1695 v_sub_f16 v5
, v1
, v2 row_ror
:15
1696 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x2f,0x01,0xff]
1698 v_sub_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1699 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x50,0x01,0xff]
1701 v_sub_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1702 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x5f,0x01,0x01]
1704 v_sub_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1705 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x66,0x01,0x60,0x09,0x13]
1707 v_sub_f16 v127
, -|v127|
, -|v127| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1708 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x66,0x7f,0x6f,0xf5,0x30]
1710 v_sub_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1711 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x1b,0x00,0xff]
1713 v_sub_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1714 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0xe4,0x00,0xff]
1716 v_sub_f32 v5
, v1
, v2 row_mirror
1717 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x40,0x01,0xff]
1719 v_sub_f32 v5
, v1
, v2 row_half_mirror
1720 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x41,0x01,0xff]
1722 v_sub_f32 v5
, v1
, v2 row_shl
:1
1723 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x01,0x01,0xff]
1725 v_sub_f32 v5
, v1
, v2 row_shl
:15
1726 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x0f,0x01,0xff]
1728 v_sub_f32 v5
, v1
, v2 row_shr
:1
1729 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x11,0x01,0xff]
1731 v_sub_f32 v5
, v1
, v2 row_shr
:15
1732 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x1f,0x01,0xff]
1734 v_sub_f32 v5
, v1
, v2 row_ror
:1
1735 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x21,0x01,0xff]
1737 v_sub_f32 v5
, v1
, v2 row_ror
:15
1738 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x2f,0x01,0xff]
1740 v_sub_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1741 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x50,0x01,0xff]
1743 v_sub_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1744 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x5f,0x01,0x01]
1746 v_sub_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1747 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x08,0x01,0x60,0x09,0x13]
1749 v_sub_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1750 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x09,0xff,0x6f,0xf5,0x30]
1752 v_sub_nc_u32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1753 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x1b,0x00,0xff]
1755 v_sub_nc_u32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1756 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0xe4,0x00,0xff]
1758 v_sub_nc_u32 v5
, v1
, v2 row_mirror
1759 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x40,0x01,0xff]
1761 v_sub_nc_u32 v5
, v1
, v2 row_half_mirror
1762 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x41,0x01,0xff]
1764 v_sub_nc_u32 v5
, v1
, v2 row_shl
:1
1765 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x01,0x01,0xff]
1767 v_sub_nc_u32 v5
, v1
, v2 row_shl
:15
1768 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x0f,0x01,0xff]
1770 v_sub_nc_u32 v5
, v1
, v2 row_shr
:1
1771 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x11,0x01,0xff]
1773 v_sub_nc_u32 v5
, v1
, v2 row_shr
:15
1774 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x1f,0x01,0xff]
1776 v_sub_nc_u32 v5
, v1
, v2 row_ror
:1
1777 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x21,0x01,0xff]
1779 v_sub_nc_u32 v5
, v1
, v2 row_ror
:15
1780 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x2f,0x01,0xff]
1782 v_sub_nc_u32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1783 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x50,0x01,0xff]
1785 v_sub_nc_u32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1786 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x5f,0x01,0x01]
1788 v_sub_nc_u32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1789 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4c,0x01,0x60,0x09,0x13]
1791 v_sub_nc_u32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1792 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x4d,0xff,0x6f,0x05,0x30]
1794 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[3,2,1,0]
1795 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0xff]
1796 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1798 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo quad_perm
:[0,1,2,3]
1799 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xff]
1800 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1802 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_mirror
1803 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0xff]
1804 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1806 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_half_mirror
1807 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0xff]
1808 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1810 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shl
:1
1811 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0xff]
1812 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1814 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shl
:15
1815 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0xff]
1816 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1818 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shr
:1
1819 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0xff]
1820 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1822 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_shr
:15
1823 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0xff]
1824 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1826 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_ror
:1
1827 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0xff]
1828 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1830 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_ror
:15
1831 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0xff]
1832 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1834 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_share
:0 row_mask
:0xf bank_mask
:0xf
1835 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x50,0x01,0xff]
1836 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1838 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_share
:15 row_mask
:0x0 bank_mask
:0x1
1839 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x5f,0x01,0x01]
1840 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1842 v_subrev_co_ci_u32 v5
, vcc_lo
, v1
, v2
, vcc_lo row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1843 // W32
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x60,0x09,0x13]
1844 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1846 v_subrev_co_ci_u32 v255
, vcc_lo
, v255
, v255
, vcc_lo row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1847 // W32
: encoding
: [0xfa,0xfe,0xff,0x45,0xff,0x6f,0x05,0x30]
1848 // W64-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1850 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc quad_perm
:[3,2,1,0]
1851 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x1b,0x00,0xff]
1852 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1854 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc quad_perm
:[0,1,2,3]
1855 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0xe4,0x00,0xff]
1856 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1858 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_mirror
1859 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x40,0x01,0xff]
1860 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1862 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_half_mirror
1863 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x41,0x01,0xff]
1864 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1866 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shl
:1
1867 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x01,0x01,0xff]
1868 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1870 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shl
:15
1871 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x0f,0x01,0xff]
1872 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1874 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shr
:1
1875 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x11,0x01,0xff]
1876 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1878 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_shr
:15
1879 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x1f,0x01,0xff]
1880 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1882 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_ror
:1
1883 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x21,0x01,0xff]
1884 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1886 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_ror
:15
1887 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x2f,0x01,0xff]
1888 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1890 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_share
:0 row_mask
:0xf bank_mask
:0xf
1891 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x50,0x01,0xff]
1892 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1894 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_share
:15 row_mask
:0x0 bank_mask
:0x1
1895 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x5f,0x01,0x01]
1896 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1898 v_subrev_co_ci_u32 v5
, vcc
, v1
, v2
, vcc row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1899 // W64
: encoding
: [0xfa,0x04,0x0a,0x44,0x01,0x60,0x09,0x13]
1900 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1902 v_subrev_co_ci_u32 v255
, vcc
, v255
, v255
, vcc row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1903 // W64
: encoding
: [0xfa,0xfe,0xff,0x45,0xff,0x6f,0x05,0x30]
1904 // W32-ERR
: :[[@LINE-
2]]:{{[0-9]+}}: error
: operands are
not valid for this GPU
or mode
1906 v_subrev_f16 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1907 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x1b,0x00,0xff]
1909 v_subrev_f16 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1910 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0xe4,0x00,0xff]
1912 v_subrev_f16 v5
, v1
, v2 row_mirror
1913 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x40,0x01,0xff]
1915 v_subrev_f16 v5
, v1
, v2 row_half_mirror
1916 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x41,0x01,0xff]
1918 v_subrev_f16 v5
, v1
, v2 row_shl
:1
1919 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x01,0x01,0xff]
1921 v_subrev_f16 v5
, v1
, v2 row_shl
:15
1922 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x0f,0x01,0xff]
1924 v_subrev_f16 v5
, v1
, v2 row_shr
:1
1925 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x11,0x01,0xff]
1927 v_subrev_f16 v5
, v1
, v2 row_shr
:15
1928 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x1f,0x01,0xff]
1930 v_subrev_f16 v5
, v1
, v2 row_ror
:1
1931 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x21,0x01,0xff]
1933 v_subrev_f16 v5
, v1
, v2 row_ror
:15
1934 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x2f,0x01,0xff]
1936 v_subrev_f16 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1937 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x50,0x01,0xff]
1939 v_subrev_f16 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1940 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x5f,0x01,0x01]
1942 v_subrev_f16 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1943 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x68,0x01,0x60,0x09,0x13]
1945 v_subrev_f16 v127
, -|v127|
, -|v127| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1946 // GFX11
: encoding
: [0xfa,0xfe,0xfe,0x68,0x7f,0x6f,0xf5,0x30]
1948 v_subrev_f32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1949 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x1b,0x00,0xff]
1951 v_subrev_f32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1952 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0xe4,0x00,0xff]
1954 v_subrev_f32 v5
, v1
, v2 row_mirror
1955 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x40,0x01,0xff]
1957 v_subrev_f32 v5
, v1
, v2 row_half_mirror
1958 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x41,0x01,0xff]
1960 v_subrev_f32 v5
, v1
, v2 row_shl
:1
1961 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x01,0x01,0xff]
1963 v_subrev_f32 v5
, v1
, v2 row_shl
:15
1964 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x0f,0x01,0xff]
1966 v_subrev_f32 v5
, v1
, v2 row_shr
:1
1967 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x11,0x01,0xff]
1969 v_subrev_f32 v5
, v1
, v2 row_shr
:15
1970 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x1f,0x01,0xff]
1972 v_subrev_f32 v5
, v1
, v2 row_ror
:1
1973 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x21,0x01,0xff]
1975 v_subrev_f32 v5
, v1
, v2 row_ror
:15
1976 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x2f,0x01,0xff]
1978 v_subrev_f32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
1979 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x50,0x01,0xff]
1981 v_subrev_f32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
1982 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x5f,0x01,0x01]
1984 v_subrev_f32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
1985 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x0a,0x01,0x60,0x09,0x13]
1987 v_subrev_f32 v255
, -|v255|
, -|v255| row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
1988 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x0b,0xff,0x6f,0xf5,0x30]
1990 v_subrev_nc_u32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
1991 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x1b,0x00,0xff]
1993 v_subrev_nc_u32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
1994 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0xe4,0x00,0xff]
1996 v_subrev_nc_u32 v5
, v1
, v2 row_mirror
1997 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x40,0x01,0xff]
1999 v_subrev_nc_u32 v5
, v1
, v2 row_half_mirror
2000 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x41,0x01,0xff]
2002 v_subrev_nc_u32 v5
, v1
, v2 row_shl
:1
2003 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x01,0x01,0xff]
2005 v_subrev_nc_u32 v5
, v1
, v2 row_shl
:15
2006 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x0f,0x01,0xff]
2008 v_subrev_nc_u32 v5
, v1
, v2 row_shr
:1
2009 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x11,0x01,0xff]
2011 v_subrev_nc_u32 v5
, v1
, v2 row_shr
:15
2012 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x1f,0x01,0xff]
2014 v_subrev_nc_u32 v5
, v1
, v2 row_ror
:1
2015 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x21,0x01,0xff]
2017 v_subrev_nc_u32 v5
, v1
, v2 row_ror
:15
2018 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x2f,0x01,0xff]
2020 v_subrev_nc_u32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
2021 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x50,0x01,0xff]
2023 v_subrev_nc_u32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2024 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x5f,0x01,0x01]
2026 v_subrev_nc_u32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2027 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x4e,0x01,0x60,0x09,0x13]
2029 v_subrev_nc_u32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2030 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x4f,0xff,0x6f,0x05,0x30]
2032 v_xnor_b32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
2033 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x1b,0x00,0xff]
2035 v_xnor_b32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
2036 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0xe4,0x00,0xff]
2038 v_xnor_b32 v5
, v1
, v2 row_mirror
2039 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x40,0x01,0xff]
2041 v_xnor_b32 v5
, v1
, v2 row_half_mirror
2042 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x41,0x01,0xff]
2044 v_xnor_b32 v5
, v1
, v2 row_shl
:1
2045 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x01,0x01,0xff]
2047 v_xnor_b32 v5
, v1
, v2 row_shl
:15
2048 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x0f,0x01,0xff]
2050 v_xnor_b32 v5
, v1
, v2 row_shr
:1
2051 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x11,0x01,0xff]
2053 v_xnor_b32 v5
, v1
, v2 row_shr
:15
2054 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x1f,0x01,0xff]
2056 v_xnor_b32 v5
, v1
, v2 row_ror
:1
2057 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x21,0x01,0xff]
2059 v_xnor_b32 v5
, v1
, v2 row_ror
:15
2060 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x2f,0x01,0xff]
2062 v_xnor_b32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
2063 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x50,0x01,0xff]
2065 v_xnor_b32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2066 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x5f,0x01,0x01]
2068 v_xnor_b32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2069 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3c,0x01,0x60,0x09,0x13]
2071 v_xnor_b32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2072 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x3d,0xff,0x6f,0x05,0x30]
2074 v_xor_b32 v5
, v1
, v2 quad_perm
:[3,2,1,0]
2075 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x1b,0x00,0xff]
2077 v_xor_b32 v5
, v1
, v2 quad_perm
:[0,1,2,3]
2078 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0xe4,0x00,0xff]
2080 v_xor_b32 v5
, v1
, v2 row_mirror
2081 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x40,0x01,0xff]
2083 v_xor_b32 v5
, v1
, v2 row_half_mirror
2084 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x41,0x01,0xff]
2086 v_xor_b32 v5
, v1
, v2 row_shl
:1
2087 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x01,0x01,0xff]
2089 v_xor_b32 v5
, v1
, v2 row_shl
:15
2090 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x0f,0x01,0xff]
2092 v_xor_b32 v5
, v1
, v2 row_shr
:1
2093 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x11,0x01,0xff]
2095 v_xor_b32 v5
, v1
, v2 row_shr
:15
2096 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x1f,0x01,0xff]
2098 v_xor_b32 v5
, v1
, v2 row_ror
:1
2099 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x21,0x01,0xff]
2101 v_xor_b32 v5
, v1
, v2 row_ror
:15
2102 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x2f,0x01,0xff]
2104 v_xor_b32 v5
, v1
, v2 row_share
:0 row_mask
:0xf bank_mask
:0xf
2105 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x50,0x01,0xff]
2107 v_xor_b32 v5
, v1
, v2 row_share
:15 row_mask
:0x0 bank_mask
:0x1
2108 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x5f,0x01,0x01]
2110 v_xor_b32 v5
, v1
, v2 row_xmask
:0 row_mask
:0x1 bank_mask
:0x3 bound_ctrl
:1 fi
:0
2111 // GFX11
: encoding
: [0xfa,0x04,0x0a,0x3a,0x01,0x60,0x09,0x13]
2113 v_xor_b32 v255
, v255
, v255 row_xmask
:15 row_mask
:0x3 bank_mask
:0x0 bound_ctrl
:0 fi
:1
2114 // GFX11
: encoding
: [0xfa,0xfe,0xff,0x3b,0xff,0x6f,0x05,0x30]