[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / CodeGen / AMDGPU / phys-partial-liveness.mir
blob91d0e7c3b4b35fa523ac5e8adc2eae44760c3550
1 # RUN: llc -mtriple=amdgcn--amdpal -mcpu=gfx1100 -debug-only=regalloc -verify-machineinstrs -run-pass=liveintervals -o - %s 2>&1 | FileCheck %s
2 # REQUIRES: asserts
4 # CHECK: Computing live-in reg-units in ABI blocks.
5 # CHECK: 0B      %bb.0 SGPR16_LO16#0 SGPR16_HI16#0
6 # CHECK: SGPR16_LO16 [0B,16r:0)[32r,144r:1) 0@0B-phi 1@32r
7 # CHECK: SGPR16_HI16 [0B,16r:0)[32r,144r:1) 0@0B-phi 1@32r
9 # CHECK: Computing live-in reg-units in ABI blocks.
10 # CHECK: 0B      %bb.0 SGPR2_LO16#0 SGPR2_HI16#0 SGPR3_LO16#0 SGPR3_HI16#0 SGPR7_LO16#0 SGPR7_HI16#0
11 # CHECK: SGPR2_LO16 [0B,64r:0) 0@0B-phi
12 # CHECK: SGPR2_HI16 [0B,64r:0) 0@0B-phi
13 # CHECK: SGPR3_LO16 [0B,16r:0)[48r,64r:1) 0@0B-phi 1@48r
14 # CHECK: SGPR3_HI16 [0B,16r:0)[48r,64r:1) 0@0B-phi 1@48r
15 # CHECK: SGPR7_LO16 [0B,48r:0) 0@0B-phi
16 # CHECK: SGPR7_HI16 [0B,48r:0) 0@0B-phi
18 ---
19 name: phys_reg_partial_liveness_1
20 tracksRegLiveness: true
21 body:             |
22   bb.0:
23     successors: %bb.1
24     liveins: $sgpr16
26     $sgpr1 = S_AND_B32 3, killed $sgpr16, implicit-def $scc
27     $sgpr16 = S_AND_B32 2, killed $sgpr1, implicit-def $scc
29   bb.1:
30     successors: %bb.2
31     liveins: $sgpr16_sgpr17_sgpr18_sgpr19:0x0000000000000003
33     $sgpr18 = S_MOV_B32 -1
34     $sgpr17 = S_MOV_B32 -2097152000
35     $sgpr19 = S_MOV_B32 -2122316801
36     renamable $sgpr42 = COPY renamable $sgpr16
38   bb.2:
39     liveins: $sgpr16_sgpr17_sgpr18_sgpr19:0x00000000000000FF, $sgpr42
41     $sgpr2 = S_BUFFER_LOAD_DWORD_IMM $sgpr16_sgpr17_sgpr18_sgpr19, 3780, 0 :: (dereferenceable invariant load (s32))
42     $sgpr0 = S_AND_B32 $sgpr42, $sgpr2, implicit-def $scc
43     S_ENDPGM 0, implicit $sgpr0
44 ...
46 ---
47 name: phys_reg_partial_liveness_2
48 tracksRegLiveness: true
49 body:             |
50   bb.0:
51     successors: %bb.1
52     liveins: $sgpr2, $sgpr3, $sgpr7
54     $sgpr1 = S_AND_B32 1, killed $sgpr3, implicit-def $scc
56   bb.1:
57     successors: %bb.2
58     liveins: $sgpr2_sgpr3:0x0000000000000003, $sgpr7
60     $sgpr3 = COPY $sgpr7
61     $sgpr0 = S_LOAD_DWORD_IMM $sgpr2_sgpr3, 0, 0 :: (dereferenceable invariant load (s32))
63   bb.2:
64     liveins: $sgpr0
66     S_ENDPGM 0, implicit $sgpr0
67 ...