[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / CSSC / umax_64_imm.s
blob2adb041a0d3a8741dbacf81c392c327dd7301910
1 // RUN: llvm-mc -triple=aarch64 -show-encoding --print-imm-hex=false -mattr=+v9.4a < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+v9.4a < %s \
6 // RUN: | llvm-objdump -d --print-imm-hex=false --mattr=+v9.4a - \
7 // RUN: | FileCheck %s --check-prefix=CHECK-INST
8 // Disassemble encoding and check the re-encoding (-show-encoding) matches.
9 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+v9.4a < %s \
10 // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
11 // RUN: | llvm-mc -triple=aarch64 -mattr=+v9.4a -disassemble -show-encoding \
12 // RUN: --print-imm-hex=false \
13 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
15 umax x0, x0, #0
16 // CHECK-INST: umax x0, x0, #0
17 // CHECK-ENCODING: [0x00,0x00,0xc4,0x91]
18 // CHECK-ERROR: instruction requires: cssc
20 umax x21, x10, #85
21 // CHECK-INST: umax x21, x10, #85
22 // CHECK-ENCODING: [0x55,0x55,0xc5,0x91]
23 // CHECK-ERROR: instruction requires: cssc
25 umax x23, x13, #59
26 // CHECK-INST: umax x23, x13, #59
27 // CHECK-ENCODING: [0xb7,0xed,0xc4,0x91]
28 // CHECK-ERROR: instruction requires: cssc
30 umax xzr, xzr, #255
31 // CHECK-INST: umax xzr, xzr, #255
32 // CHECK-ENCODING: [0xff,0xff,0xc7,0x91]
33 // CHECK-ERROR: instruction requires: cssc