[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / bfdot.s
blob407bd9c9631b6e329f5d346dbfd4bf7b082e514a
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve,+bf16 < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme,+bf16 < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
8 bfdot z0.S, z1.H, z2.H
9 // CHECK-INST: bfdot z0.s, z1.h, z2.h
10 // CHECK-ENCODING: [0x20,0x80,0x62,0x64]
11 // CHECK-ERROR: instruction requires: bf16 sve or sme
13 bfdot z0.S, z1.H, z2.H[0]
14 // CHECK-INST: bfdot z0.s, z1.h, z2.h[0]
15 // CHECK-ENCODING: [0x20,0x40,0x62,0x64]
16 // CHECK-ERROR: instruction requires: bf16 sve or sme
18 bfdot z0.S, z1.H, z2.H[3]
19 // CHECK-INST: bfdot z0.s, z1.h, z2.h[3]
20 // CHECK-ENCODING: [0x20,0x40,0x7a,0x64]
21 // CHECK-ERROR: instruction requires: bf16 sve or sme
23 // --------------------------------------------------------------------------//
24 // Test compatibility with MOVPRFX instruction.
26 movprfx z0, z7
27 // CHECK-INST: movprfx z0, z7
28 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
29 // CHECK-ERROR: instruction requires: sve or sme
31 bfdot z0.S, z1.H, z2.H
32 // CHECK-INST: bfdot z0.s, z1.h, z2.h
33 // CHECK-ENCODING: [0x20,0x80,0x62,0x64]
34 // CHECK-ERROR: instruction requires: bf16 sve or sme
36 movprfx z0, z7
37 // CHECK-INST: movprfx z0, z7
38 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
39 // CHECK-ERROR: instruction requires: sve or sme
41 bfdot z0.S, z1.H, z2.H[0]
42 // CHECK-INST: bfdot z0.s, z1.h, z2.h[0]
43 // CHECK-ENCODING: [0x20,0x40,0x62,0x64]
44 // CHECK-ERROR: instruction requires: bf16 sve or sme
46 movprfx z0, z7
47 // CHECK-INST: movprfx z0, z7
48 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
49 // CHECK-ERROR: instruction requires: sve or sme
51 bfdot z0.S, z1.H, z2.H[3]
52 // CHECK-INST: bfdot z0.s, z1.h, z2.h[3]
53 // CHECK-ENCODING: [0x20,0x40,0x7a,0x64]
54 // CHECK-ERROR: instruction requires: bf16 sve or sme