[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / cmphs.s
blob9fcacc50d877294b29959c938ca53ae573dac98c
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
13 cmphs p0.b, p0/z, z0.b, z0.b
14 // CHECK-INST: cmphs p0.b, p0/z, z0.b, z0.b
15 // CHECK-ENCODING: [0x00,0x00,0x00,0x24]
16 // CHECK-ERROR: instruction requires: sve or sme
17 // CHECK-UNKNOWN: 24000000 <unknown>
19 cmphs p0.h, p0/z, z0.h, z0.h
20 // CHECK-INST: cmphs p0.h, p0/z, z0.h, z0.h
21 // CHECK-ENCODING: [0x00,0x00,0x40,0x24]
22 // CHECK-ERROR: instruction requires: sve or sme
23 // CHECK-UNKNOWN: 24400000 <unknown>
25 cmphs p0.s, p0/z, z0.s, z0.s
26 // CHECK-INST: cmphs p0.s, p0/z, z0.s, z0.s
27 // CHECK-ENCODING: [0x00,0x00,0x80,0x24]
28 // CHECK-ERROR: instruction requires: sve or sme
29 // CHECK-UNKNOWN: 24800000 <unknown>
31 cmphs p0.d, p0/z, z0.d, z0.d
32 // CHECK-INST: cmphs p0.d, p0/z, z0.d, z0.d
33 // CHECK-ENCODING: [0x00,0x00,0xc0,0x24]
34 // CHECK-ERROR: instruction requires: sve or sme
35 // CHECK-UNKNOWN: 24c00000 <unknown>
37 cmphs p0.b, p0/z, z0.b, z0.d
38 // CHECK-INST: cmphs p0.b, p0/z, z0.b, z0.d
39 // CHECK-ENCODING: [0x00,0xc0,0x00,0x24]
40 // CHECK-ERROR: instruction requires: sve or sme
41 // CHECK-UNKNOWN: 2400c000 <unknown>
43 cmphs p0.h, p0/z, z0.h, z0.d
44 // CHECK-INST: cmphs p0.h, p0/z, z0.h, z0.d
45 // CHECK-ENCODING: [0x00,0xc0,0x40,0x24]
46 // CHECK-ERROR: instruction requires: sve or sme
47 // CHECK-UNKNOWN: 2440c000 <unknown>
49 cmphs p0.s, p0/z, z0.s, z0.d
50 // CHECK-INST: cmphs p0.s, p0/z, z0.s, z0.d
51 // CHECK-ENCODING: [0x00,0xc0,0x80,0x24]
52 // CHECK-ERROR: instruction requires: sve or sme
53 // CHECK-UNKNOWN: 2480c000 <unknown>
55 cmphs p0.b, p0/z, z0.b, #0
56 // CHECK-INST: cmphs p0.b, p0/z, z0.b, #0
57 // CHECK-ENCODING: [0x00,0x00,0x20,0x24]
58 // CHECK-ERROR: instruction requires: sve or sme
59 // CHECK-UNKNOWN: 24200000 <unknown>
61 cmphs p0.h, p0/z, z0.h, #0
62 // CHECK-INST: cmphs p0.h, p0/z, z0.h, #0
63 // CHECK-ENCODING: [0x00,0x00,0x60,0x24]
64 // CHECK-ERROR: instruction requires: sve or sme
65 // CHECK-UNKNOWN: 24600000 <unknown>
67 cmphs p0.s, p0/z, z0.s, #0
68 // CHECK-INST: cmphs p0.s, p0/z, z0.s, #0
69 // CHECK-ENCODING: [0x00,0x00,0xa0,0x24]
70 // CHECK-ERROR: instruction requires: sve or sme
71 // CHECK-UNKNOWN: 24a00000 <unknown>
73 cmphs p0.d, p0/z, z0.d, #0
74 // CHECK-INST: cmphs p0.d, p0/z, z0.d, #0
75 // CHECK-ENCODING: [0x00,0x00,0xe0,0x24]
76 // CHECK-ERROR: instruction requires: sve or sme
77 // CHECK-UNKNOWN: 24e00000 <unknown>
79 cmphs p0.b, p0/z, z0.b, #127
80 // CHECK-INST: cmphs p0.b, p0/z, z0.b, #127
81 // CHECK-ENCODING: [0x00,0xc0,0x3f,0x24]
82 // CHECK-ERROR: instruction requires: sve or sme
83 // CHECK-UNKNOWN: 243fc000 <unknown>
85 cmphs p0.h, p0/z, z0.h, #127
86 // CHECK-INST: cmphs p0.h, p0/z, z0.h, #127
87 // CHECK-ENCODING: [0x00,0xc0,0x7f,0x24]
88 // CHECK-ERROR: instruction requires: sve or sme
89 // CHECK-UNKNOWN: 247fc000 <unknown>
91 cmphs p0.s, p0/z, z0.s, #127
92 // CHECK-INST: cmphs p0.s, p0/z, z0.s, #127
93 // CHECK-ENCODING: [0x00,0xc0,0xbf,0x24]
94 // CHECK-ERROR: instruction requires: sve or sme
95 // CHECK-UNKNOWN: 24bfc000 <unknown>
97 cmphs p0.d, p0/z, z0.d, #127
98 // CHECK-INST: cmphs p0.d, p0/z, z0.d, #127
99 // CHECK-ENCODING: [0x00,0xc0,0xff,0x24]
100 // CHECK-ERROR: instruction requires: sve or sme
101 // CHECK-UNKNOWN: 24ffc000 <unknown>