[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / cntp.s
blobce70f800cda565042b031a887fabc217fc6a9171
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 cntp x0, p15, p0.b
13 // CHECK-INST: cntp x0, p15, p0.b
14 // CHECK-ENCODING: [0x00,0xbc,0x20,0x25]
15 // CHECK-ERROR: instruction requires: sve or sme
16 // CHECK-UNKNOWN: 2520bc00 <unknown>
18 cntp x0, p15, p0.h
19 // CHECK-INST: cntp x0, p15, p0.h
20 // CHECK-ENCODING: [0x00,0xbc,0x60,0x25]
21 // CHECK-ERROR: instruction requires: sve or sme
22 // CHECK-UNKNOWN: 2560bc00 <unknown>
24 cntp x0, p15, p0.s
25 // CHECK-INST: cntp x0, p15, p0.s
26 // CHECK-ENCODING: [0x00,0xbc,0xa0,0x25]
27 // CHECK-ERROR: instruction requires: sve or sme
28 // CHECK-UNKNOWN: 25a0bc00 <unknown>
30 cntp x0, p15, p0.d
31 // CHECK-INST: cntp x0, p15, p0.d
32 // CHECK-ENCODING: [0x00,0xbc,0xe0,0x25]
33 // CHECK-ERROR: instruction requires: sve or sme
34 // CHECK-UNKNOWN: 25e0bc00 <unknown>