llvm/test/MC/AArch64/SVE/ld1sw.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
   4 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   6 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
  10 // RUN:   | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11
  12 ld1sw   z0.d, p0/z, [x0]
  13 // CHECK-INST: ld1sw   { z0.d }, p0/z, [x0]
  14 // CHECK-ENCODING: [0x00,0xa0,0x80,0xa4]
  15 // CHECK-ERROR: instruction requires: sve or sme
  16 // CHECK-UNKNOWN: a480a000 <unknown>
  17
  18 ld1sw   { z0.d }, p0/z, [x0]
  19 // CHECK-INST: ld1sw   { z0.d }, p0/z, [x0]
  20 // CHECK-ENCODING: [0x00,0xa0,0x80,0xa4]
  21 // CHECK-ERROR: instruction requires: sve or sme
  22 // CHECK-UNKNOWN: a480a000 <unknown>
  23
  24 ld1sw   { z31.d }, p7/z, [sp, #-1, mul vl]
  25 // CHECK-INST: ld1sw   { z31.d }, p7/z, [sp, #-1, mul vl]
  26 // CHECK-ENCODING: [0xff,0xbf,0x8f,0xa4]
  27 // CHECK-ERROR: instruction requires: sve or sme
  28 // CHECK-UNKNOWN: a48fbfff <unknown>
  29
  30 ld1sw   { z21.d }, p5/z, [x10, #5, mul vl]
  31 // CHECK-INST: ld1sw   { z21.d }, p5/z, [x10, #5, mul vl]
  32 // CHECK-ENCODING: [0x55,0xb5,0x85,0xa4]
  33 // CHECK-ERROR: instruction requires: sve or sme
  34 // CHECK-UNKNOWN: a485b555 <unknown>
  35
  36 ld1sw    { z23.d }, p3/z, [sp, x8, lsl #2]
  37 // CHECK-INST: ld1sw    { z23.d }, p3/z, [sp, x8, lsl #2]
  38 // CHECK-ENCODING: [0xf7,0x4f,0x88,0xa4]
  39 // CHECK-ERROR: instruction requires: sve or sme
  40 // CHECK-UNKNOWN: a4884ff7 <unknown>
  41
  42 ld1sw    { z23.d }, p3/z, [x13, x8, lsl #2]
  43 // CHECK-INST: ld1sw    { z23.d }, p3/z, [x13, x8, lsl #2]
  44 // CHECK-ENCODING: [0xb7,0x4d,0x88,0xa4]
  45 // CHECK-ERROR: instruction requires: sve or sme
  46 // CHECK-UNKNOWN: a4884db7 <unknown>