[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / ldff1b.s
blobc3e47ebe63e3c79e5a84f0bafec509009a6b3418
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 ldff1b { z31.b }, p7/z, [sp]
13 // CHECK-INST: ldff1b { z31.b }, p7/z, [sp]
14 // CHECK-ENCODING: [0xff,0x7f,0x1f,0xa4]
15 // CHECK-ERROR: instruction requires: sve
16 // CHECK-UNKNOWN: a41f7fff <unknown>
18 ldff1b { z31.h }, p7/z, [sp]
19 // CHECK-INST: ldff1b { z31.h }, p7/z, [sp]
20 // CHECK-ENCODING: [0xff,0x7f,0x3f,0xa4]
21 // CHECK-ERROR: instruction requires: sve
22 // CHECK-UNKNOWN: a43f7fff <unknown>
24 ldff1b { z31.s }, p7/z, [sp]
25 // CHECK-INST: ldff1b { z31.s }, p7/z, [sp]
26 // CHECK-ENCODING: [0xff,0x7f,0x5f,0xa4]
27 // CHECK-ERROR: instruction requires: sve
28 // CHECK-UNKNOWN: a45f7fff <unknown>
30 ldff1b { z31.d }, p7/z, [sp]
31 // CHECK-INST: ldff1b { z31.d }, p7/z, [sp]
32 // CHECK-ENCODING: [0xff,0x7f,0x7f,0xa4]
33 // CHECK-ERROR: instruction requires: sve
34 // CHECK-UNKNOWN: a47f7fff <unknown>
36 ldff1b { z31.b }, p7/z, [sp, xzr]
37 // CHECK-INST: ldff1b { z31.b }, p7/z, [sp]
38 // CHECK-ENCODING: [0xff,0x7f,0x1f,0xa4]
39 // CHECK-ERROR: instruction requires: sve
40 // CHECK-UNKNOWN: a41f7fff <unknown>
42 ldff1b { z31.h }, p7/z, [sp, xzr]
43 // CHECK-INST: ldff1b { z31.h }, p7/z, [sp]
44 // CHECK-ENCODING: [0xff,0x7f,0x3f,0xa4]
45 // CHECK-ERROR: instruction requires: sve
46 // CHECK-UNKNOWN: a43f7fff <unknown>
48 ldff1b { z31.s }, p7/z, [sp, xzr]
49 // CHECK-INST: ldff1b { z31.s }, p7/z, [sp]
50 // CHECK-ENCODING: [0xff,0x7f,0x5f,0xa4]
51 // CHECK-ERROR: instruction requires: sve
52 // CHECK-UNKNOWN: a45f7fff <unknown>
54 ldff1b { z31.d }, p7/z, [sp, xzr]
55 // CHECK-INST: ldff1b { z31.d }, p7/z, [sp]
56 // CHECK-ENCODING: [0xff,0x7f,0x7f,0xa4]
57 // CHECK-ERROR: instruction requires: sve
58 // CHECK-UNKNOWN: a47f7fff <unknown>
60 ldff1b { z0.h }, p0/z, [x0, x0]
61 // CHECK-INST: ldff1b { z0.h }, p0/z, [x0, x0]
62 // CHECK-ENCODING: [0x00,0x60,0x20,0xa4]
63 // CHECK-ERROR: instruction requires: sve
64 // CHECK-UNKNOWN: a4206000 <unknown>
66 ldff1b { z0.s }, p0/z, [x0, x0]
67 // CHECK-INST: ldff1b { z0.s }, p0/z, [x0, x0]
68 // CHECK-ENCODING: [0x00,0x60,0x40,0xa4]
69 // CHECK-ERROR: instruction requires: sve
70 // CHECK-UNKNOWN: a4406000 <unknown>
72 ldff1b { z0.d }, p0/z, [x0, x0]
73 // CHECK-INST: ldff1b { z0.d }, p0/z, [x0, x0]
74 // CHECK-ENCODING: [0x00,0x60,0x60,0xa4]
75 // CHECK-ERROR: instruction requires: sve
76 // CHECK-UNKNOWN: a4606000 <unknown>
78 ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
79 // CHECK-INST: ldff1b { z0.s }, p0/z, [x0, z0.s, uxtw]
80 // CHECK-ENCODING: [0x00,0x60,0x00,0x84]
81 // CHECK-ERROR: instruction requires: sve
82 // CHECK-UNKNOWN: 84006000 <unknown>
84 ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
85 // CHECK-INST: ldff1b { z0.s }, p0/z, [x0, z0.s, sxtw]
86 // CHECK-ENCODING: [0x00,0x60,0x40,0x84]
87 // CHECK-ERROR: instruction requires: sve
88 // CHECK-UNKNOWN: 84406000 <unknown>
90 ldff1b { z31.d }, p7/z, [sp, z31.d]
91 // CHECK-INST: ldff1b { z31.d }, p7/z, [sp, z31.d]
92 // CHECK-ENCODING: [0xff,0xff,0x5f,0xc4]
93 // CHECK-ERROR: instruction requires: sve
94 // CHECK-UNKNOWN: c45fffff <unknown>
96 ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
97 // CHECK-INST: ldff1b { z21.d }, p5/z, [x10, z21.d, uxtw]
98 // CHECK-ENCODING: [0x55,0x75,0x15,0xc4]
99 // CHECK-ERROR: instruction requires: sve
100 // CHECK-UNKNOWN: c4157555 <unknown>
102 ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
103 // CHECK-INST: ldff1b { z21.d }, p5/z, [x10, z21.d, sxtw]
104 // CHECK-ENCODING: [0x55,0x75,0x55,0xc4]
105 // CHECK-ERROR: instruction requires: sve
106 // CHECK-UNKNOWN: c4557555 <unknown>
108 ldff1b { z31.s }, p7/z, [z31.s, #31]
109 // CHECK-INST: ldff1b { z31.s }, p7/z, [z31.s, #31]
110 // CHECK-ENCODING: [0xff,0xff,0x3f,0x84]
111 // CHECK-ERROR: instruction requires: sve
112 // CHECK-UNKNOWN: 843fffff <unknown>
114 ldff1b { z0.s }, p0/z, [z0.s]
115 // CHECK-INST: ldff1b { z0.s }, p0/z, [z0.s]
116 // CHECK-ENCODING: [0x00,0xe0,0x20,0x84]
117 // CHECK-ERROR: instruction requires: sve
118 // CHECK-UNKNOWN: 8420e000 <unknown>
120 ldff1b { z31.d }, p7/z, [z31.d, #31]
121 // CHECK-INST: ldff1b { z31.d }, p7/z, [z31.d, #31]
122 // CHECK-ENCODING: [0xff,0xff,0x3f,0xc4]
123 // CHECK-ERROR: instruction requires: sve
124 // CHECK-UNKNOWN: c43fffff <unknown>
126 ldff1b { z0.d }, p0/z, [z0.d]
127 // CHECK-INST: ldff1b { z0.d }, p0/z, [z0.d]
128 // CHECK-ENCODING: [0x00,0xe0,0x20,0xc4]
129 // CHECK-ERROR: instruction requires: sve
130 // CHECK-UNKNOWN: c420e000 <unknown>