llvm/test/MC/AArch64/SVE/matrix-multiply-fp-diagnostics.s

   1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve,+f32mm,+f64mm  2>&1 < %s | FileCheck %s
   2
   3 // --------------------------------------------------------------------------//
   4 // FMMLA (SVE)
   5
   6 // Invalid element size
   7
   8 fmmla z0.h, z1.h, z2.h
   9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  10
  11 // Mis-matched element size
  12
  13 fmmla z0.d, z1.s, z2.s
  14 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  15 fmmla z0.s, z1.d, z2.s
  16 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  17 fmmla z0.s, z1.s, z2.d
  18 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
  19
  20
  21 // --------------------------------------------------------------------------//
  22 // LD1RO (SVE, scalar plus immediate)
  23
  24 // Immediate too high (>224)
  25 ld1rob { z0.b }, p1/z, [x2, #256]
  26 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  27 ld1roh { z0.h }, p1/z, [x2, #256]
  28 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  29 ld1row { z0.s }, p1/z, [x2, #256]
  30 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  31 ld1rod { z0.d }, p1/z, [x2, #256]
  32 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  33
  34 // Immediate too low (<-256)
  35 ld1rob { z0.b }, p1/z, [x2, #-288]
  36 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  37 ld1roh { z0.h }, p1/z, [x2, #-288]
  38 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  39 ld1row { z0.s }, p1/z, [x2, #-288]
  40 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  41 ld1rod { z0.d }, p1/z, [x2, #-288]
  42 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  43
  44 // Immediate not a multiple of 32
  45 ld1rob { z0.b }, p1/z, [x2, #16]
  46 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  47 ld1roh { z0.h }, p1/z, [x2, #16]
  48 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  49 ld1row { z0.s }, p1/z, [x2, #16]
  50 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  51 ld1rod { z0.d }, p1/z, [x2, #16]
  52 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: index must be a multiple of 32 in range [-256, 224].
  53
  54 // Prediate register too high
  55 ld1rob { z0.b }, p8/z, [x2]
  56 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  57 ld1roh { z0.h }, p8/z, [x2]
  58 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  59 ld1row { z0.s }, p8/z, [x2]
  60 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  61 ld1rod { z0.d }, p8/z, [x2]
  62 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  63
  64
  65 // --------------------------------------------------------------------------//
  66 // LD1RO (SVE, scalar plus scalar)
  67
  68 // Shift amount not matched to data width
  69 ld1rob { z0.b }, p1/z, [x2, x3, lsl #1]
  70 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 without shift
  71 ld1roh { z0.h }, p1/z, [x2, x3, lsl #0]
  72 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #1'
  73 ld1row { z0.s }, p1/z, [x2, x3, lsl #3]
  74 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #2'
  75 ld1rod { z0.d }, p1/z, [x2, x3, lsl #2]
  76 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: register must be x0..x30 with required shift 'lsl #3'
  77
  78 // Prediate register too high
  79 ld1rob { z0.b }, p8/z, [x2, x3, lsl #0]
  80 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  81 ld1roh { z0.h }, p8/z, [x2, x3, lsl #1]
  82 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  83 ld1row { z0.s }, p8/z, [x2, x3, lsl #2]
  84 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
  85 ld1rod { z0.d }, p8/z, [x2, x3, lsl #3]
  86 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)