[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / sdot.s
blob980d1d33408c67004d4f56a1793c01c319dfd810
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 sdot z0.s, z1.b, z31.b
13 // CHECK-INST: sdot z0.s, z1.b, z31.b
14 // CHECK-ENCODING: [0x20,0x00,0x9f,0x44]
15 // CHECK-ERROR: instruction requires: sve or sme
16 // CHECK-UNKNOWN: 449f0020 <unknown>
18 sdot z0.d, z1.h, z31.h
19 // CHECK-INST: sdot z0.d, z1.h, z31.h
20 // CHECK-ENCODING: [0x20,0x00,0xdf,0x44]
21 // CHECK-ERROR: instruction requires: sve or sme
22 // CHECK-UNKNOWN: 44df0020 <unknown>
24 sdot z0.s, z1.b, z7.b[3]
25 // CHECK-INST: sdot z0.s, z1.b, z7.b[3]
26 // CHECK-ENCODING: [0x20,0x00,0xbf,0x44]
27 // CHECK-ERROR: instruction requires: sve or sme
28 // CHECK-UNKNOWN: 44bf0020 <unknown>
30 sdot z0.d, z1.h, z15.h[1]
31 // CHECK-INST: sdot z0.d, z1.h, z15.h[1]
32 // CHECK-ENCODING: [0x20,0x00,0xff,0x44]
33 // CHECK-ERROR: instruction requires: sve or sme
34 // CHECK-UNKNOWN: 44ff0020 <unknown>
37 // --------------------------------------------------------------------------//
38 // Test compatibility with MOVPRFX instruction.
40 movprfx z0, z7
41 // CHECK-INST: movprfx z0, z7
42 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
43 // CHECK-ERROR: instruction requires: sve or sme
44 // CHECK-UNKNOWN: 0420bce0 <unknown>
46 sdot z0.d, z1.h, z31.h
47 // CHECK-INST: sdot z0.d, z1.h, z31.h
48 // CHECK-ENCODING: [0x20,0x00,0xdf,0x44]
49 // CHECK-ERROR: instruction requires: sve or sme
50 // CHECK-UNKNOWN: 44df0020 <unknown>
52 movprfx z0, z7
53 // CHECK-INST: movprfx z0, z7
54 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
55 // CHECK-ERROR: instruction requires: sve or sme
56 // CHECK-UNKNOWN: 0420bce0 <unknown>
58 sdot z0.d, z1.h, z15.h[1]
59 // CHECK-INST: sdot z0.d, z1.h, z15.h[1]
60 // CHECK-ENCODING: [0x20,0x00,0xff,0x44]
61 // CHECK-ERROR: instruction requires: sve or sme
62 // CHECK-UNKNOWN: 44ff0020 <unknown>