[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / smax.s
blob6d1714af26b25754b377f827a8aa6798439f4810
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 smax z0.b, z0.b, #-128
13 // CHECK-INST: smax z0.b, z0.b, #-128
14 // CHECK-ENCODING: [0x00,0xd0,0x28,0x25]
15 // CHECK-ERROR: instruction requires: sve or sme
16 // CHECK-UNKNOWN: 2528d000 <unknown>
18 smax z31.b, z31.b, #127
19 // CHECK-INST: smax z31.b, z31.b, #127
20 // CHECK-ENCODING: [0xff,0xcf,0x28,0x25]
21 // CHECK-ERROR: instruction requires: sve or sme
22 // CHECK-UNKNOWN: 2528cfff <unknown>
24 smax z0.h, z0.h, #-128
25 // CHECK-INST: smax z0.h, z0.h, #-128
26 // CHECK-ENCODING: [0x00,0xd0,0x68,0x25]
27 // CHECK-ERROR: instruction requires: sve or sme
28 // CHECK-UNKNOWN: 2568d000 <unknown>
30 smax z31.h, z31.h, #127
31 // CHECK-INST: smax z31.h, z31.h, #127
32 // CHECK-ENCODING: [0xff,0xcf,0x68,0x25]
33 // CHECK-ERROR: instruction requires: sve or sme
34 // CHECK-UNKNOWN: 2568cfff <unknown>
36 smax z0.s, z0.s, #-128
37 // CHECK-INST: smax z0.s, z0.s, #-128
38 // CHECK-ENCODING: [0x00,0xd0,0xa8,0x25]
39 // CHECK-ERROR: instruction requires: sve or sme
40 // CHECK-UNKNOWN: 25a8d000 <unknown>
42 smax z31.s, z31.s, #127
43 // CHECK-INST: smax z31.s, z31.s, #127
44 // CHECK-ENCODING: [0xff,0xcf,0xa8,0x25]
45 // CHECK-ERROR: instruction requires: sve or sme
46 // CHECK-UNKNOWN: 25a8cfff <unknown>
48 smax z0.d, z0.d, #-128
49 // CHECK-INST: smax z0.d, z0.d, #-128
50 // CHECK-ENCODING: [0x00,0xd0,0xe8,0x25]
51 // CHECK-ERROR: instruction requires: sve or sme
52 // CHECK-UNKNOWN: 25e8d000 <unknown>
54 smax z31.d, z31.d, #127
55 // CHECK-INST: smax z31.d, z31.d, #127
56 // CHECK-ENCODING: [0xff,0xcf,0xe8,0x25]
57 // CHECK-ERROR: instruction requires: sve or sme
58 // CHECK-UNKNOWN: 25e8cfff <unknown>
60 smax z31.b, p7/m, z31.b, z31.b
61 // CHECK-INST: smax z31.b, p7/m, z31.b, z31.b
62 // CHECK-ENCODING: [0xff,0x1f,0x08,0x04]
63 // CHECK-ERROR: instruction requires: sve or sme
64 // CHECK-UNKNOWN: 04081fff <unknown>
66 smax z31.h, p7/m, z31.h, z31.h
67 // CHECK-INST: smax z31.h, p7/m, z31.h, z31.h
68 // CHECK-ENCODING: [0xff,0x1f,0x48,0x04]
69 // CHECK-ERROR: instruction requires: sve or sme
70 // CHECK-UNKNOWN: 04481fff <unknown>
72 smax z31.s, p7/m, z31.s, z31.s
73 // CHECK-INST: smax z31.s, p7/m, z31.s, z31.s
74 // CHECK-ENCODING: [0xff,0x1f,0x88,0x04]
75 // CHECK-ERROR: instruction requires: sve or sme
76 // CHECK-UNKNOWN: 04881fff <unknown>
78 smax z31.d, p7/m, z31.d, z31.d
79 // CHECK-INST: smax z31.d, p7/m, z31.d, z31.d
80 // CHECK-ENCODING: [0xff,0x1f,0xc8,0x04]
81 // CHECK-ERROR: instruction requires: sve or sme
82 // CHECK-UNKNOWN: 04c81fff <unknown>
85 // --------------------------------------------------------------------------//
86 // Test compatibility with MOVPRFX instruction.
88 movprfx z4.d, p7/z, z6.d
89 // CHECK-INST: movprfx z4.d, p7/z, z6.d
90 // CHECK-ENCODING: [0xc4,0x3c,0xd0,0x04]
91 // CHECK-ERROR: instruction requires: sve or sme
92 // CHECK-UNKNOWN: 04d03cc4 <unknown>
94 smax z4.d, p7/m, z4.d, z31.d
95 // CHECK-INST: smax z4.d, p7/m, z4.d, z31.d
96 // CHECK-ENCODING: [0xe4,0x1f,0xc8,0x04]
97 // CHECK-ERROR: instruction requires: sve or sme
98 // CHECK-UNKNOWN: 04c81fe4 <unknown>
100 movprfx z4, z6
101 // CHECK-INST: movprfx z4, z6
102 // CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
103 // CHECK-ERROR: instruction requires: sve or sme
104 // CHECK-UNKNOWN: 0420bcc4 <unknown>
106 smax z4.d, p7/m, z4.d, z31.d
107 // CHECK-INST: smax z4.d, p7/m, z4.d, z31.d
108 // CHECK-ENCODING: [0xe4,0x1f,0xc8,0x04]
109 // CHECK-ERROR: instruction requires: sve or sme
110 // CHECK-UNKNOWN: 04c81fe4 <unknown>
112 movprfx z31, z6
113 // CHECK-INST: movprfx z31, z6
114 // CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
115 // CHECK-ERROR: instruction requires: sve or sme
116 // CHECK-UNKNOWN: 0420bcdf <unknown>
118 smax z31.d, z31.d, #127
119 // CHECK-INST: smax z31.d, z31.d, #127
120 // CHECK-ENCODING: [0xff,0xcf,0xe8,0x25]
121 // CHECK-ERROR: instruction requires: sve or sme
122 // CHECK-UNKNOWN: 25e8cfff <unknown>