[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE / sqdecb.s
blob1403aa6f80e9fa0e414cb33b52fa80613b914e63
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
10 // RUN: | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 // ---------------------------------------------------------------------------//
13 // Test 64-bit form (x0) and its aliases
14 // ---------------------------------------------------------------------------//
16 sqdecb x0
17 // CHECK-INST: sqdecb x0
18 // CHECK-ENCODING: [0xe0,0xfb,0x30,0x04]
19 // CHECK-ERROR: instruction requires: sve or sme
20 // CHECK-UNKNOWN: 0430fbe0 <unknown>
22 sqdecb x0, all
23 // CHECK-INST: sqdecb x0
24 // CHECK-ENCODING: [0xe0,0xfb,0x30,0x04]
25 // CHECK-ERROR: instruction requires: sve or sme
26 // CHECK-UNKNOWN: 0430fbe0 <unknown>
28 sqdecb x0, all, mul #1
29 // CHECK-INST: sqdecb x0
30 // CHECK-ENCODING: [0xe0,0xfb,0x30,0x04]
31 // CHECK-ERROR: instruction requires: sve or sme
32 // CHECK-UNKNOWN: 0430fbe0 <unknown>
34 sqdecb x0, all, mul #16
35 // CHECK-INST: sqdecb x0, all, mul #16
36 // CHECK-ENCODING: [0xe0,0xfb,0x3f,0x04]
37 // CHECK-ERROR: instruction requires: sve or sme
38 // CHECK-UNKNOWN: 043ffbe0 <unknown>
41 // ---------------------------------------------------------------------------//
42 // Test 32-bit form (x0, w0) and its aliases
43 // ---------------------------------------------------------------------------//
45 sqdecb x0, w0
46 // CHECK-INST: sqdecb x0, w0
47 // CHECK-ENCODING: [0xe0,0xfb,0x20,0x04]
48 // CHECK-ERROR: instruction requires: sve or sme
49 // CHECK-UNKNOWN: 0420fbe0 <unknown>
51 sqdecb x0, w0, all
52 // CHECK-INST: sqdecb x0, w0
53 // CHECK-ENCODING: [0xe0,0xfb,0x20,0x04]
54 // CHECK-ERROR: instruction requires: sve or sme
55 // CHECK-UNKNOWN: 0420fbe0 <unknown>
57 sqdecb x0, w0, all, mul #1
58 // CHECK-INST: sqdecb x0, w0
59 // CHECK-ENCODING: [0xe0,0xfb,0x20,0x04]
60 // CHECK-ERROR: instruction requires: sve or sme
61 // CHECK-UNKNOWN: 0420fbe0 <unknown>
63 sqdecb x0, w0, all, mul #16
64 // CHECK-INST: sqdecb x0, w0, all, mul #16
65 // CHECK-ENCODING: [0xe0,0xfb,0x2f,0x04]
66 // CHECK-ERROR: instruction requires: sve or sme
67 // CHECK-UNKNOWN: 042ffbe0 <unknown>
69 sqdecb x0, w0, pow2
70 // CHECK-INST: sqdecb x0, w0, pow2
71 // CHECK-ENCODING: [0x00,0xf8,0x20,0x04]
72 // CHECK-ERROR: instruction requires: sve or sme
73 // CHECK-UNKNOWN: 0420f800 <unknown>
75 sqdecb x0, w0, pow2, mul #16
76 // CHECK-INST: sqdecb x0, w0, pow2, mul #16
77 // CHECK-ENCODING: [0x00,0xf8,0x2f,0x04]
78 // CHECK-ERROR: instruction requires: sve or sme
79 // CHECK-UNKNOWN: 042ff800 <unknown>
82 // ---------------------------------------------------------------------------//
83 // Test all patterns for 64-bit form
84 // ---------------------------------------------------------------------------//
86 sqdecb x0, pow2
87 // CHECK-INST: sqdecb x0, pow2
88 // CHECK-ENCODING: [0x00,0xf8,0x30,0x04]
89 // CHECK-ERROR: instruction requires: sve or sme
90 // CHECK-UNKNOWN: 0430f800 <unknown>
92 sqdecb x0, vl1
93 // CHECK-INST: sqdecb x0, vl1
94 // CHECK-ENCODING: [0x20,0xf8,0x30,0x04]
95 // CHECK-ERROR: instruction requires: sve or sme
96 // CHECK-UNKNOWN: 0430f820 <unknown>
98 sqdecb x0, vl2
99 // CHECK-INST: sqdecb x0, vl2
100 // CHECK-ENCODING: [0x40,0xf8,0x30,0x04]
101 // CHECK-ERROR: instruction requires: sve or sme
102 // CHECK-UNKNOWN: 0430f840 <unknown>
104 sqdecb x0, vl3
105 // CHECK-INST: sqdecb x0, vl3
106 // CHECK-ENCODING: [0x60,0xf8,0x30,0x04]
107 // CHECK-ERROR: instruction requires: sve or sme
108 // CHECK-UNKNOWN: 0430f860 <unknown>
110 sqdecb x0, vl4
111 // CHECK-INST: sqdecb x0, vl4
112 // CHECK-ENCODING: [0x80,0xf8,0x30,0x04]
113 // CHECK-ERROR: instruction requires: sve or sme
114 // CHECK-UNKNOWN: 0430f880 <unknown>
116 sqdecb x0, vl5
117 // CHECK-INST: sqdecb x0, vl5
118 // CHECK-ENCODING: [0xa0,0xf8,0x30,0x04]
119 // CHECK-ERROR: instruction requires: sve or sme
120 // CHECK-UNKNOWN: 0430f8a0 <unknown>
122 sqdecb x0, vl6
123 // CHECK-INST: sqdecb x0, vl6
124 // CHECK-ENCODING: [0xc0,0xf8,0x30,0x04]
125 // CHECK-ERROR: instruction requires: sve or sme
126 // CHECK-UNKNOWN: 0430f8c0 <unknown>
128 sqdecb x0, vl7
129 // CHECK-INST: sqdecb x0, vl7
130 // CHECK-ENCODING: [0xe0,0xf8,0x30,0x04]
131 // CHECK-ERROR: instruction requires: sve or sme
132 // CHECK-UNKNOWN: 0430f8e0 <unknown>
134 sqdecb x0, vl8
135 // CHECK-INST: sqdecb x0, vl8
136 // CHECK-ENCODING: [0x00,0xf9,0x30,0x04]
137 // CHECK-ERROR: instruction requires: sve or sme
138 // CHECK-UNKNOWN: 0430f900 <unknown>
140 sqdecb x0, vl16
141 // CHECK-INST: sqdecb x0, vl16
142 // CHECK-ENCODING: [0x20,0xf9,0x30,0x04]
143 // CHECK-ERROR: instruction requires: sve or sme
144 // CHECK-UNKNOWN: 0430f920 <unknown>
146 sqdecb x0, vl32
147 // CHECK-INST: sqdecb x0, vl32
148 // CHECK-ENCODING: [0x40,0xf9,0x30,0x04]
149 // CHECK-ERROR: instruction requires: sve or sme
150 // CHECK-UNKNOWN: 0430f940 <unknown>
152 sqdecb x0, vl64
153 // CHECK-INST: sqdecb x0, vl64
154 // CHECK-ENCODING: [0x60,0xf9,0x30,0x04]
155 // CHECK-ERROR: instruction requires: sve or sme
156 // CHECK-UNKNOWN: 0430f960 <unknown>
158 sqdecb x0, vl128
159 // CHECK-INST: sqdecb x0, vl128
160 // CHECK-ENCODING: [0x80,0xf9,0x30,0x04]
161 // CHECK-ERROR: instruction requires: sve or sme
162 // CHECK-UNKNOWN: 0430f980 <unknown>
164 sqdecb x0, vl256
165 // CHECK-INST: sqdecb x0, vl256
166 // CHECK-ENCODING: [0xa0,0xf9,0x30,0x04]
167 // CHECK-ERROR: instruction requires: sve or sme
168 // CHECK-UNKNOWN: 0430f9a0 <unknown>
170 sqdecb x0, #14
171 // CHECK-INST: sqdecb x0, #14
172 // CHECK-ENCODING: [0xc0,0xf9,0x30,0x04]
173 // CHECK-ERROR: instruction requires: sve or sme
174 // CHECK-UNKNOWN: 0430f9c0 <unknown>
176 sqdecb x0, #15
177 // CHECK-INST: sqdecb x0, #15
178 // CHECK-ENCODING: [0xe0,0xf9,0x30,0x04]
179 // CHECK-ERROR: instruction requires: sve or sme
180 // CHECK-UNKNOWN: 0430f9e0 <unknown>
182 sqdecb x0, #16
183 // CHECK-INST: sqdecb x0, #16
184 // CHECK-ENCODING: [0x00,0xfa,0x30,0x04]
185 // CHECK-ERROR: instruction requires: sve or sme
186 // CHECK-UNKNOWN: 0430fa00 <unknown>
188 sqdecb x0, #17
189 // CHECK-INST: sqdecb x0, #17
190 // CHECK-ENCODING: [0x20,0xfa,0x30,0x04]
191 // CHECK-ERROR: instruction requires: sve or sme
192 // CHECK-UNKNOWN: 0430fa20 <unknown>
194 sqdecb x0, #18
195 // CHECK-INST: sqdecb x0, #18
196 // CHECK-ENCODING: [0x40,0xfa,0x30,0x04]
197 // CHECK-ERROR: instruction requires: sve or sme
198 // CHECK-UNKNOWN: 0430fa40 <unknown>
200 sqdecb x0, #19
201 // CHECK-INST: sqdecb x0, #19
202 // CHECK-ENCODING: [0x60,0xfa,0x30,0x04]
203 // CHECK-ERROR: instruction requires: sve or sme
204 // CHECK-UNKNOWN: 0430fa60 <unknown>
206 sqdecb x0, #20
207 // CHECK-INST: sqdecb x0, #20
208 // CHECK-ENCODING: [0x80,0xfa,0x30,0x04]
209 // CHECK-ERROR: instruction requires: sve or sme
210 // CHECK-UNKNOWN: 0430fa80 <unknown>
212 sqdecb x0, #21
213 // CHECK-INST: sqdecb x0, #21
214 // CHECK-ENCODING: [0xa0,0xfa,0x30,0x04]
215 // CHECK-ERROR: instruction requires: sve or sme
216 // CHECK-UNKNOWN: 0430faa0 <unknown>
218 sqdecb x0, #22
219 // CHECK-INST: sqdecb x0, #22
220 // CHECK-ENCODING: [0xc0,0xfa,0x30,0x04]
221 // CHECK-ERROR: instruction requires: sve or sme
222 // CHECK-UNKNOWN: 0430fac0 <unknown>
224 sqdecb x0, #23
225 // CHECK-INST: sqdecb x0, #23
226 // CHECK-ENCODING: [0xe0,0xfa,0x30,0x04]
227 // CHECK-ERROR: instruction requires: sve or sme
228 // CHECK-UNKNOWN: 0430fae0 <unknown>
230 sqdecb x0, #24
231 // CHECK-INST: sqdecb x0, #24
232 // CHECK-ENCODING: [0x00,0xfb,0x30,0x04]
233 // CHECK-ERROR: instruction requires: sve or sme
234 // CHECK-UNKNOWN: 0430fb00 <unknown>
236 sqdecb x0, #25
237 // CHECK-INST: sqdecb x0, #25
238 // CHECK-ENCODING: [0x20,0xfb,0x30,0x04]
239 // CHECK-ERROR: instruction requires: sve or sme
240 // CHECK-UNKNOWN: 0430fb20 <unknown>
242 sqdecb x0, #26
243 // CHECK-INST: sqdecb x0, #26
244 // CHECK-ENCODING: [0x40,0xfb,0x30,0x04]
245 // CHECK-ERROR: instruction requires: sve or sme
246 // CHECK-UNKNOWN: 0430fb40 <unknown>
248 sqdecb x0, #27
249 // CHECK-INST: sqdecb x0, #27
250 // CHECK-ENCODING: [0x60,0xfb,0x30,0x04]
251 // CHECK-ERROR: instruction requires: sve or sme
252 // CHECK-UNKNOWN: 0430fb60 <unknown>
254 sqdecb x0, #28
255 // CHECK-INST: sqdecb x0, #28
256 // CHECK-ENCODING: [0x80,0xfb,0x30,0x04]
257 // CHECK-ERROR: instruction requires: sve or sme
258 // CHECK-UNKNOWN: 0430fb80 <unknown>