llvm/test/MC/AArch64/SVE/sqincb.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
   4 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   6 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
  10 // RUN:   | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11
  12 // ---------------------------------------------------------------------------//
  13 // Test 64-bit form (x0) and its aliases
  14 // ---------------------------------------------------------------------------//
  15
  16 sqincb  x0
  17 // CHECK-INST: sqincb  x0
  18 // CHECK-ENCODING: [0xe0,0xf3,0x30,0x04]
  19 // CHECK-ERROR: instruction requires: sve or sme
  20 // CHECK-UNKNOWN: 0430f3e0 <unknown>
  21
  22 sqincb  x0, all
  23 // CHECK-INST: sqincb  x0
  24 // CHECK-ENCODING: [0xe0,0xf3,0x30,0x04]
  25 // CHECK-ERROR: instruction requires: sve or sme
  26 // CHECK-UNKNOWN: 0430f3e0 <unknown>
  27
  28 sqincb  x0, all, mul #1
  29 // CHECK-INST: sqincb  x0
  30 // CHECK-ENCODING: [0xe0,0xf3,0x30,0x04]
  31 // CHECK-ERROR: instruction requires: sve or sme
  32 // CHECK-UNKNOWN: 0430f3e0 <unknown>
  33
  34 sqincb  x0, all, mul #16
  35 // CHECK-INST: sqincb  x0, all, mul #16
  36 // CHECK-ENCODING: [0xe0,0xf3,0x3f,0x04]
  37 // CHECK-ERROR: instruction requires: sve or sme
  38 // CHECK-UNKNOWN: 043ff3e0 <unknown>
  39
  40
  41 // ---------------------------------------------------------------------------//
  42 // Test 32-bit form (x0, w0) and its aliases
  43 // ---------------------------------------------------------------------------//
  44
  45 sqincb  x0, w0
  46 // CHECK-INST: sqincb  x0, w0
  47 // CHECK-ENCODING: [0xe0,0xf3,0x20,0x04]
  48 // CHECK-ERROR: instruction requires: sve or sme
  49 // CHECK-UNKNOWN: 0420f3e0 <unknown>
  50
  51 sqincb  x0, w0, all
  52 // CHECK-INST: sqincb  x0, w0
  53 // CHECK-ENCODING: [0xe0,0xf3,0x20,0x04]
  54 // CHECK-ERROR: instruction requires: sve or sme
  55 // CHECK-UNKNOWN: 0420f3e0 <unknown>
  56
  57 sqincb  x0, w0, all, mul #1
  58 // CHECK-INST: sqincb  x0, w0
  59 // CHECK-ENCODING: [0xe0,0xf3,0x20,0x04]
  60 // CHECK-ERROR: instruction requires: sve or sme
  61 // CHECK-UNKNOWN: 0420f3e0 <unknown>
  62
  63 sqincb  x0, w0, all, mul #16
  64 // CHECK-INST: sqincb  x0, w0, all, mul #16
  65 // CHECK-ENCODING: [0xe0,0xf3,0x2f,0x04]
  66 // CHECK-ERROR: instruction requires: sve or sme
  67 // CHECK-UNKNOWN: 042ff3e0 <unknown>
  68
  69 sqincb  x0, w0, pow2
  70 // CHECK-INST: sqincb  x0, w0, pow2
  71 // CHECK-ENCODING: [0x00,0xf0,0x20,0x04]
  72 // CHECK-ERROR: instruction requires: sve or sme
  73 // CHECK-UNKNOWN: 0420f000 <unknown>
  74
  75 sqincb  x0, w0, pow2, mul #16
  76 // CHECK-INST: sqincb  x0, w0, pow2, mul #16
  77 // CHECK-ENCODING: [0x00,0xf0,0x2f,0x04]
  78 // CHECK-ERROR: instruction requires: sve or sme
  79 // CHECK-UNKNOWN: 042ff000 <unknown>
  80
  81
  82 // ---------------------------------------------------------------------------//
  83 // Test all patterns for 64-bit form
  84 // ---------------------------------------------------------------------------//
  85
  86 sqincb  x0, pow2
  87 // CHECK-INST: sqincb  x0, pow2
  88 // CHECK-ENCODING: [0x00,0xf0,0x30,0x04]
  89 // CHECK-ERROR: instruction requires: sve or sme
  90 // CHECK-UNKNOWN: 0430f000 <unknown>
  91
  92 sqincb  x0, vl1
  93 // CHECK-INST: sqincb  x0, vl1
  94 // CHECK-ENCODING: [0x20,0xf0,0x30,0x04]
  95 // CHECK-ERROR: instruction requires: sve or sme
  96 // CHECK-UNKNOWN: 0430f020 <unknown>
  97
  98 sqincb  x0, vl2
  99 // CHECK-INST: sqincb  x0, vl2
 100 // CHECK-ENCODING: [0x40,0xf0,0x30,0x04]
 101 // CHECK-ERROR: instruction requires: sve or sme
 102 // CHECK-UNKNOWN: 0430f040 <unknown>
 103
 104 sqincb  x0, vl3
 105 // CHECK-INST: sqincb  x0, vl3
 106 // CHECK-ENCODING: [0x60,0xf0,0x30,0x04]
 107 // CHECK-ERROR: instruction requires: sve or sme
 108 // CHECK-UNKNOWN: 0430f060 <unknown>
 109
 110 sqincb  x0, vl4
 111 // CHECK-INST: sqincb  x0, vl4
 112 // CHECK-ENCODING: [0x80,0xf0,0x30,0x04]
 113 // CHECK-ERROR: instruction requires: sve or sme
 114 // CHECK-UNKNOWN: 0430f080 <unknown>
 115
 116 sqincb  x0, vl5
 117 // CHECK-INST: sqincb  x0, vl5
 118 // CHECK-ENCODING: [0xa0,0xf0,0x30,0x04]
 119 // CHECK-ERROR: instruction requires: sve or sme
 120 // CHECK-UNKNOWN: 0430f0a0 <unknown>
 121
 122 sqincb  x0, vl6
 123 // CHECK-INST: sqincb  x0, vl6
 124 // CHECK-ENCODING: [0xc0,0xf0,0x30,0x04]
 125 // CHECK-ERROR: instruction requires: sve or sme
 126 // CHECK-UNKNOWN: 0430f0c0 <unknown>
 127
 128 sqincb  x0, vl7
 129 // CHECK-INST: sqincb  x0, vl7
 130 // CHECK-ENCODING: [0xe0,0xf0,0x30,0x04]
 131 // CHECK-ERROR: instruction requires: sve or sme
 132 // CHECK-UNKNOWN: 0430f0e0 <unknown>
 133
 134 sqincb  x0, vl8
 135 // CHECK-INST: sqincb  x0, vl8
 136 // CHECK-ENCODING: [0x00,0xf1,0x30,0x04]
 137 // CHECK-ERROR: instruction requires: sve or sme
 138 // CHECK-UNKNOWN: 0430f100 <unknown>
 139
 140 sqincb  x0, vl16
 141 // CHECK-INST: sqincb  x0, vl16
 142 // CHECK-ENCODING: [0x20,0xf1,0x30,0x04]
 143 // CHECK-ERROR: instruction requires: sve or sme
 144 // CHECK-UNKNOWN: 0430f120 <unknown>
 145
 146 sqincb  x0, vl32
 147 // CHECK-INST: sqincb  x0, vl32
 148 // CHECK-ENCODING: [0x40,0xf1,0x30,0x04]
 149 // CHECK-ERROR: instruction requires: sve or sme
 150 // CHECK-UNKNOWN: 0430f140 <unknown>
 151
 152 sqincb  x0, vl64
 153 // CHECK-INST: sqincb  x0, vl64
 154 // CHECK-ENCODING: [0x60,0xf1,0x30,0x04]
 155 // CHECK-ERROR: instruction requires: sve or sme
 156 // CHECK-UNKNOWN: 0430f160 <unknown>
 157
 158 sqincb  x0, vl128
 159 // CHECK-INST: sqincb  x0, vl128
 160 // CHECK-ENCODING: [0x80,0xf1,0x30,0x04]
 161 // CHECK-ERROR: instruction requires: sve or sme
 162 // CHECK-UNKNOWN: 0430f180 <unknown>
 163
 164 sqincb  x0, vl256
 165 // CHECK-INST: sqincb  x0, vl256
 166 // CHECK-ENCODING: [0xa0,0xf1,0x30,0x04]
 167 // CHECK-ERROR: instruction requires: sve or sme
 168 // CHECK-UNKNOWN: 0430f1a0 <unknown>
 169
 170 sqincb  x0, #14
 171 // CHECK-INST: sqincb  x0, #14
 172 // CHECK-ENCODING: [0xc0,0xf1,0x30,0x04]
 173 // CHECK-ERROR: instruction requires: sve or sme
 174 // CHECK-UNKNOWN: 0430f1c0 <unknown>
 175
 176 sqincb  x0, #15
 177 // CHECK-INST: sqincb  x0, #15
 178 // CHECK-ENCODING: [0xe0,0xf1,0x30,0x04]
 179 // CHECK-ERROR: instruction requires: sve or sme
 180 // CHECK-UNKNOWN: 0430f1e0 <unknown>
 181
 182 sqincb  x0, #16
 183 // CHECK-INST: sqincb  x0, #16
 184 // CHECK-ENCODING: [0x00,0xf2,0x30,0x04]
 185 // CHECK-ERROR: instruction requires: sve or sme
 186 // CHECK-UNKNOWN: 0430f200 <unknown>
 187
 188 sqincb  x0, #17
 189 // CHECK-INST: sqincb  x0, #17
 190 // CHECK-ENCODING: [0x20,0xf2,0x30,0x04]
 191 // CHECK-ERROR: instruction requires: sve or sme
 192 // CHECK-UNKNOWN: 0430f220 <unknown>
 193
 194 sqincb  x0, #18
 195 // CHECK-INST: sqincb  x0, #18
 196 // CHECK-ENCODING: [0x40,0xf2,0x30,0x04]
 197 // CHECK-ERROR: instruction requires: sve or sme
 198 // CHECK-UNKNOWN: 0430f240 <unknown>
 199
 200 sqincb  x0, #19
 201 // CHECK-INST: sqincb  x0, #19
 202 // CHECK-ENCODING: [0x60,0xf2,0x30,0x04]
 203 // CHECK-ERROR: instruction requires: sve or sme
 204 // CHECK-UNKNOWN: 0430f260 <unknown>
 205
 206 sqincb  x0, #20
 207 // CHECK-INST: sqincb  x0, #20
 208 // CHECK-ENCODING: [0x80,0xf2,0x30,0x04]
 209 // CHECK-ERROR: instruction requires: sve or sme
 210 // CHECK-UNKNOWN: 0430f280 <unknown>
 211
 212 sqincb  x0, #21
 213 // CHECK-INST: sqincb  x0, #21
 214 // CHECK-ENCODING: [0xa0,0xf2,0x30,0x04]
 215 // CHECK-ERROR: instruction requires: sve or sme
 216 // CHECK-UNKNOWN: 0430f2a0 <unknown>
 217
 218 sqincb  x0, #22
 219 // CHECK-INST: sqincb  x0, #22
 220 // CHECK-ENCODING: [0xc0,0xf2,0x30,0x04]
 221 // CHECK-ERROR: instruction requires: sve or sme
 222 // CHECK-UNKNOWN: 0430f2c0 <unknown>
 223
 224 sqincb  x0, #23
 225 // CHECK-INST: sqincb  x0, #23
 226 // CHECK-ENCODING: [0xe0,0xf2,0x30,0x04]
 227 // CHECK-ERROR: instruction requires: sve or sme
 228 // CHECK-UNKNOWN: 0430f2e0 <unknown>
 229
 230 sqincb  x0, #24
 231 // CHECK-INST: sqincb  x0, #24
 232 // CHECK-ENCODING: [0x00,0xf3,0x30,0x04]
 233 // CHECK-ERROR: instruction requires: sve or sme
 234 // CHECK-UNKNOWN: 0430f300 <unknown>
 235
 236 sqincb  x0, #25
 237 // CHECK-INST: sqincb  x0, #25
 238 // CHECK-ENCODING: [0x20,0xf3,0x30,0x04]
 239 // CHECK-ERROR: instruction requires: sve or sme
 240 // CHECK-UNKNOWN: 0430f320 <unknown>
 241
 242 sqincb  x0, #26
 243 // CHECK-INST: sqincb  x0, #26
 244 // CHECK-ENCODING: [0x40,0xf3,0x30,0x04]
 245 // CHECK-ERROR: instruction requires: sve or sme
 246 // CHECK-UNKNOWN: 0430f340 <unknown>
 247
 248 sqincb  x0, #27
 249 // CHECK-INST: sqincb  x0, #27
 250 // CHECK-ENCODING: [0x60,0xf3,0x30,0x04]
 251 // CHECK-ERROR: instruction requires: sve or sme
 252 // CHECK-UNKNOWN: 0430f360 <unknown>
 253
 254 sqincb  x0, #28
 255 // CHECK-INST: sqincb  x0, #28
 256 // CHECK-ENCODING: [0x80,0xf3,0x30,0x04]
 257 // CHECK-ERROR: instruction requires: sve or sme
 258 // CHECK-UNKNOWN: 0430f380 <unknown>
 259