llvm/test/MC/AArch64/SVE/uqinch.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
   4 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   6 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
  10 // RUN:   | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11
  12
  13 // ---------------------------------------------------------------------------//
  14 // Test 64-bit form (x0) and its aliases
  15 // ---------------------------------------------------------------------------//
  16
  17 uqinch  x0
  18 // CHECK-INST: uqinch  x0
  19 // CHECK-ENCODING: [0xe0,0xf7,0x70,0x04]
  20 // CHECK-ERROR: instruction requires: sve or sme
  21 // CHECK-UNKNOWN: 0470f7e0 <unknown>
  22
  23 uqinch  x0, all
  24 // CHECK-INST: uqinch  x0
  25 // CHECK-ENCODING: [0xe0,0xf7,0x70,0x04]
  26 // CHECK-ERROR: instruction requires: sve or sme
  27 // CHECK-UNKNOWN: 0470f7e0 <unknown>
  28
  29 uqinch  x0, all, mul #1
  30 // CHECK-INST: uqinch  x0
  31 // CHECK-ENCODING: [0xe0,0xf7,0x70,0x04]
  32 // CHECK-ERROR: instruction requires: sve or sme
  33 // CHECK-UNKNOWN: 0470f7e0 <unknown>
  34
  35 uqinch  x0, all, mul #16
  36 // CHECK-INST: uqinch  x0, all, mul #16
  37 // CHECK-ENCODING: [0xe0,0xf7,0x7f,0x04]
  38 // CHECK-ERROR: instruction requires: sve or sme
  39 // CHECK-UNKNOWN: 047ff7e0 <unknown>
  40
  41
  42 // ---------------------------------------------------------------------------//
  43 // Test 32-bit form (w0) and its aliases
  44 // ---------------------------------------------------------------------------//
  45
  46 uqinch  w0
  47 // CHECK-INST: uqinch  w0
  48 // CHECK-ENCODING: [0xe0,0xf7,0x60,0x04]
  49 // CHECK-ERROR: instruction requires: sve or sme
  50 // CHECK-UNKNOWN: 0460f7e0 <unknown>
  51
  52 uqinch  w0, all
  53 // CHECK-INST: uqinch  w0
  54 // CHECK-ENCODING: [0xe0,0xf7,0x60,0x04]
  55 // CHECK-ERROR: instruction requires: sve or sme
  56 // CHECK-UNKNOWN: 0460f7e0 <unknown>
  57
  58 uqinch  w0, all, mul #1
  59 // CHECK-INST: uqinch  w0
  60 // CHECK-ENCODING: [0xe0,0xf7,0x60,0x04]
  61 // CHECK-ERROR: instruction requires: sve or sme
  62 // CHECK-UNKNOWN: 0460f7e0 <unknown>
  63
  64 uqinch  w0, all, mul #16
  65 // CHECK-INST: uqinch  w0, all, mul #16
  66 // CHECK-ENCODING: [0xe0,0xf7,0x6f,0x04]
  67 // CHECK-ERROR: instruction requires: sve or sme
  68 // CHECK-UNKNOWN: 046ff7e0 <unknown>
  69
  70 uqinch  w0, pow2
  71 // CHECK-INST: uqinch  w0, pow2
  72 // CHECK-ENCODING: [0x00,0xf4,0x60,0x04]
  73 // CHECK-ERROR: instruction requires: sve or sme
  74 // CHECK-UNKNOWN: 0460f400 <unknown>
  75
  76 uqinch  w0, pow2, mul #16
  77 // CHECK-INST: uqinch  w0, pow2, mul #16
  78 // CHECK-ENCODING: [0x00,0xf4,0x6f,0x04]
  79 // CHECK-ERROR: instruction requires: sve or sme
  80 // CHECK-UNKNOWN: 046ff400 <unknown>
  81
  82
  83 // ---------------------------------------------------------------------------//
  84 // Test vector form and aliases.
  85 // ---------------------------------------------------------------------------//
  86
  87 uqinch  z0.h
  88 // CHECK-INST: uqinch  z0.h
  89 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
  90 // CHECK-ERROR: instruction requires: sve or sme
  91 // CHECK-UNKNOWN: 0460c7e0 <unknown>
  92
  93 uqinch  z0.h, all
  94 // CHECK-INST: uqinch  z0.h
  95 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
  96 // CHECK-ERROR: instruction requires: sve or sme
  97 // CHECK-UNKNOWN: 0460c7e0 <unknown>
  98
  99 uqinch  z0.h, all, mul #1
 100 // CHECK-INST: uqinch  z0.h
 101 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
 102 // CHECK-ERROR: instruction requires: sve or sme
 103 // CHECK-UNKNOWN: 0460c7e0 <unknown>
 104
 105 uqinch  z0.h, all, mul #16
 106 // CHECK-INST: uqinch  z0.h, all, mul #16
 107 // CHECK-ENCODING: [0xe0,0xc7,0x6f,0x04]
 108 // CHECK-ERROR: instruction requires: sve or sme
 109 // CHECK-UNKNOWN: 046fc7e0 <unknown>
 110
 111 uqinch  z0.h, pow2
 112 // CHECK-INST: uqinch  z0.h, pow2
 113 // CHECK-ENCODING: [0x00,0xc4,0x60,0x04]
 114 // CHECK-ERROR: instruction requires: sve or sme
 115 // CHECK-UNKNOWN: 0460c400 <unknown>
 116
 117 uqinch  z0.h, pow2, mul #16
 118 // CHECK-INST: uqinch  z0.h, pow2, mul #16
 119 // CHECK-ENCODING: [0x00,0xc4,0x6f,0x04]
 120 // CHECK-ERROR: instruction requires: sve or sme
 121 // CHECK-UNKNOWN: 046fc400 <unknown>
 122
 123
 124 // ---------------------------------------------------------------------------//
 125 // Test all patterns for 64-bit form
 126 // ---------------------------------------------------------------------------//
 127
 128 uqinch  x0, pow2
 129 // CHECK-INST: uqinch  x0, pow2
 130 // CHECK-ENCODING: [0x00,0xf4,0x70,0x04]
 131 // CHECK-ERROR: instruction requires: sve or sme
 132 // CHECK-UNKNOWN: 0470f400 <unknown>
 133
 134 uqinch  x0, vl1
 135 // CHECK-INST: uqinch  x0, vl1
 136 // CHECK-ENCODING: [0x20,0xf4,0x70,0x04]
 137 // CHECK-ERROR: instruction requires: sve or sme
 138 // CHECK-UNKNOWN: 0470f420 <unknown>
 139
 140 uqinch  x0, vl2
 141 // CHECK-INST: uqinch  x0, vl2
 142 // CHECK-ENCODING: [0x40,0xf4,0x70,0x04]
 143 // CHECK-ERROR: instruction requires: sve or sme
 144 // CHECK-UNKNOWN: 0470f440 <unknown>
 145
 146 uqinch  x0, vl3
 147 // CHECK-INST: uqinch  x0, vl3
 148 // CHECK-ENCODING: [0x60,0xf4,0x70,0x04]
 149 // CHECK-ERROR: instruction requires: sve or sme
 150 // CHECK-UNKNOWN: 0470f460 <unknown>
 151
 152 uqinch  x0, vl4
 153 // CHECK-INST: uqinch  x0, vl4
 154 // CHECK-ENCODING: [0x80,0xf4,0x70,0x04]
 155 // CHECK-ERROR: instruction requires: sve or sme
 156 // CHECK-UNKNOWN: 0470f480 <unknown>
 157
 158 uqinch  x0, vl5
 159 // CHECK-INST: uqinch  x0, vl5
 160 // CHECK-ENCODING: [0xa0,0xf4,0x70,0x04]
 161 // CHECK-ERROR: instruction requires: sve or sme
 162 // CHECK-UNKNOWN: 0470f4a0 <unknown>
 163
 164 uqinch  x0, vl6
 165 // CHECK-INST: uqinch  x0, vl6
 166 // CHECK-ENCODING: [0xc0,0xf4,0x70,0x04]
 167 // CHECK-ERROR: instruction requires: sve or sme
 168 // CHECK-UNKNOWN: 0470f4c0 <unknown>
 169
 170 uqinch  x0, vl7
 171 // CHECK-INST: uqinch  x0, vl7
 172 // CHECK-ENCODING: [0xe0,0xf4,0x70,0x04]
 173 // CHECK-ERROR: instruction requires: sve or sme
 174 // CHECK-UNKNOWN: 0470f4e0 <unknown>
 175
 176 uqinch  x0, vl8
 177 // CHECK-INST: uqinch  x0, vl8
 178 // CHECK-ENCODING: [0x00,0xf5,0x70,0x04]
 179 // CHECK-ERROR: instruction requires: sve or sme
 180 // CHECK-UNKNOWN: 0470f500 <unknown>
 181
 182 uqinch  x0, vl16
 183 // CHECK-INST: uqinch  x0, vl16
 184 // CHECK-ENCODING: [0x20,0xf5,0x70,0x04]
 185 // CHECK-ERROR: instruction requires: sve or sme
 186 // CHECK-UNKNOWN: 0470f520 <unknown>
 187
 188 uqinch  x0, vl32
 189 // CHECK-INST: uqinch  x0, vl32
 190 // CHECK-ENCODING: [0x40,0xf5,0x70,0x04]
 191 // CHECK-ERROR: instruction requires: sve or sme
 192 // CHECK-UNKNOWN: 0470f540 <unknown>
 193
 194 uqinch  x0, vl64
 195 // CHECK-INST: uqinch  x0, vl64
 196 // CHECK-ENCODING: [0x60,0xf5,0x70,0x04]
 197 // CHECK-ERROR: instruction requires: sve or sme
 198 // CHECK-UNKNOWN: 0470f560 <unknown>
 199
 200 uqinch  x0, vl128
 201 // CHECK-INST: uqinch  x0, vl128
 202 // CHECK-ENCODING: [0x80,0xf5,0x70,0x04]
 203 // CHECK-ERROR: instruction requires: sve or sme
 204 // CHECK-UNKNOWN: 0470f580 <unknown>
 205
 206 uqinch  x0, vl256
 207 // CHECK-INST: uqinch  x0, vl256
 208 // CHECK-ENCODING: [0xa0,0xf5,0x70,0x04]
 209 // CHECK-ERROR: instruction requires: sve or sme
 210 // CHECK-UNKNOWN: 0470f5a0 <unknown>
 211
 212 uqinch  x0, #14
 213 // CHECK-INST: uqinch  x0, #14
 214 // CHECK-ENCODING: [0xc0,0xf5,0x70,0x04]
 215 // CHECK-ERROR: instruction requires: sve or sme
 216 // CHECK-UNKNOWN: 0470f5c0 <unknown>
 217
 218 uqinch  x0, #15
 219 // CHECK-INST: uqinch  x0, #15
 220 // CHECK-ENCODING: [0xe0,0xf5,0x70,0x04]
 221 // CHECK-ERROR: instruction requires: sve or sme
 222 // CHECK-UNKNOWN: 0470f5e0 <unknown>
 223
 224 uqinch  x0, #16
 225 // CHECK-INST: uqinch  x0, #16
 226 // CHECK-ENCODING: [0x00,0xf6,0x70,0x04]
 227 // CHECK-ERROR: instruction requires: sve or sme
 228 // CHECK-UNKNOWN: 0470f600 <unknown>
 229
 230 uqinch  x0, #17
 231 // CHECK-INST: uqinch  x0, #17
 232 // CHECK-ENCODING: [0x20,0xf6,0x70,0x04]
 233 // CHECK-ERROR: instruction requires: sve or sme
 234 // CHECK-UNKNOWN: 0470f620 <unknown>
 235
 236 uqinch  x0, #18
 237 // CHECK-INST: uqinch  x0, #18
 238 // CHECK-ENCODING: [0x40,0xf6,0x70,0x04]
 239 // CHECK-ERROR: instruction requires: sve or sme
 240 // CHECK-UNKNOWN: 0470f640 <unknown>
 241
 242 uqinch  x0, #19
 243 // CHECK-INST: uqinch  x0, #19
 244 // CHECK-ENCODING: [0x60,0xf6,0x70,0x04]
 245 // CHECK-ERROR: instruction requires: sve or sme
 246 // CHECK-UNKNOWN: 0470f660 <unknown>
 247
 248 uqinch  x0, #20
 249 // CHECK-INST: uqinch  x0, #20
 250 // CHECK-ENCODING: [0x80,0xf6,0x70,0x04]
 251 // CHECK-ERROR: instruction requires: sve or sme
 252 // CHECK-UNKNOWN: 0470f680 <unknown>
 253
 254 uqinch  x0, #21
 255 // CHECK-INST: uqinch  x0, #21
 256 // CHECK-ENCODING: [0xa0,0xf6,0x70,0x04]
 257 // CHECK-ERROR: instruction requires: sve or sme
 258 // CHECK-UNKNOWN: 0470f6a0 <unknown>
 259
 260 uqinch  x0, #22
 261 // CHECK-INST: uqinch  x0, #22
 262 // CHECK-ENCODING: [0xc0,0xf6,0x70,0x04]
 263 // CHECK-ERROR: instruction requires: sve or sme
 264 // CHECK-UNKNOWN: 0470f6c0 <unknown>
 265
 266 uqinch  x0, #23
 267 // CHECK-INST: uqinch  x0, #23
 268 // CHECK-ENCODING: [0xe0,0xf6,0x70,0x04]
 269 // CHECK-ERROR: instruction requires: sve or sme
 270 // CHECK-UNKNOWN: 0470f6e0 <unknown>
 271
 272 uqinch  x0, #24
 273 // CHECK-INST: uqinch  x0, #24
 274 // CHECK-ENCODING: [0x00,0xf7,0x70,0x04]
 275 // CHECK-ERROR: instruction requires: sve or sme
 276 // CHECK-UNKNOWN: 0470f700 <unknown>
 277
 278 uqinch  x0, #25
 279 // CHECK-INST: uqinch  x0, #25
 280 // CHECK-ENCODING: [0x20,0xf7,0x70,0x04]
 281 // CHECK-ERROR: instruction requires: sve or sme
 282 // CHECK-UNKNOWN: 0470f720 <unknown>
 283
 284 uqinch  x0, #26
 285 // CHECK-INST: uqinch  x0, #26
 286 // CHECK-ENCODING: [0x40,0xf7,0x70,0x04]
 287 // CHECK-ERROR: instruction requires: sve or sme
 288 // CHECK-UNKNOWN: 0470f740 <unknown>
 289
 290 uqinch  x0, #27
 291 // CHECK-INST: uqinch  x0, #27
 292 // CHECK-ENCODING: [0x60,0xf7,0x70,0x04]
 293 // CHECK-ERROR: instruction requires: sve or sme
 294 // CHECK-UNKNOWN: 0470f760 <unknown>
 295
 296 uqinch  x0, #28
 297 // CHECK-INST: uqinch  x0, #28
 298 // CHECK-ENCODING: [0x80,0xf7,0x70,0x04]
 299 // CHECK-ERROR: instruction requires: sve or sme
 300 // CHECK-UNKNOWN: 0470f780 <unknown>
 301
 302
 303 // --------------------------------------------------------------------------//
 304 // Test compatibility with MOVPRFX instruction.
 305
 306 movprfx z0, z7
 307 // CHECK-INST: movprfx  z0, z7
 308 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
 309 // CHECK-ERROR: instruction requires: sve or sme
 310 // CHECK-UNKNOWN: 0420bce0 <unknown>
 311
 312 uqinch  z0.h
 313 // CHECK-INST: uqinch   z0.h
 314 // CHECK-ENCODING: [0xe0,0xc7,0x60,0x04]
 315 // CHECK-ERROR: instruction requires: sve or sme
 316 // CHECK-UNKNOWN: 0460c7e0 <unknown>
 317
 318 movprfx z0, z7
 319 // CHECK-INST: movprfx  z0, z7
 320 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
 321 // CHECK-ERROR: instruction requires: sve or sme
 322 // CHECK-UNKNOWN: 0420bce0 <unknown>
 323
 324 uqinch  z0.h, pow2, mul #16
 325 // CHECK-INST: uqinch   z0.h, pow2, mul #16
 326 // CHECK-ENCODING: [0x00,0xc4,0x6f,0x04]
 327 // CHECK-ERROR: instruction requires: sve or sme
 328 // CHECK-UNKNOWN: 046fc400 <unknown>
 329
 330 movprfx z0, z7
 331 // CHECK-INST: movprfx  z0, z7
 332 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
 333 // CHECK-ERROR: instruction requires: sve or sme
 334 // CHECK-UNKNOWN: 0420bce0 <unknown>
 335
 336 uqinch  z0.h, pow2
 337 // CHECK-INST: uqinch   z0.h, pow2
 338 // CHECK-ENCODING: [0x00,0xc4,0x60,0x04]
 339 // CHECK-ERROR: instruction requires: sve or sme
 340 // CHECK-UNKNOWN: 0460c400 <unknown>