llvm/test/MC/AArch64/SVE/uqsub.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
   4 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   6 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
   8 // RUN:        | llvm-objdump --no-print-imm-hex -d --mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
   9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
  10 // RUN:   | llvm-objdump --no-print-imm-hex -d --mattr=-sve - | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11
  12
  13 uqsub     z0.b, z0.b, z0.b
  14 // CHECK-INST: uqsub z0.b, z0.b, z0.b
  15 // CHECK-ENCODING: [0x00,0x1c,0x20,0x04]
  16 // CHECK-ERROR: instruction requires: sve or sme
  17 // CHECK-UNKNOWN: 04201c00 <unknown>
  18
  19 uqsub     z0.h, z0.h, z0.h
  20 // CHECK-INST: uqsub z0.h, z0.h, z0.h
  21 // CHECK-ENCODING: [0x00,0x1c,0x60,0x04]
  22 // CHECK-ERROR: instruction requires: sve or sme
  23 // CHECK-UNKNOWN: 04601c00 <unknown>
  24
  25 uqsub     z0.s, z0.s, z0.s
  26 // CHECK-INST: uqsub z0.s, z0.s, z0.s
  27 // CHECK-ENCODING: [0x00,0x1c,0xa0,0x04]
  28 // CHECK-ERROR: instruction requires: sve or sme
  29 // CHECK-UNKNOWN: 04a01c00 <unknown>
  30
  31 uqsub     z0.d, z0.d, z0.d
  32 // CHECK-INST: uqsub z0.d, z0.d, z0.d
  33 // CHECK-ENCODING: [0x00,0x1c,0xe0,0x04]
  34 // CHECK-ERROR: instruction requires: sve or sme
  35 // CHECK-UNKNOWN: 04e01c00 <unknown>
  36
  37 uqsub     z0.b, z0.b, #0
  38 // CHECK-INST: uqsub z0.b, z0.b, #0
  39 // CHECK-ENCODING: [0x00,0xc0,0x27,0x25]
  40 // CHECK-ERROR: instruction requires: sve or sme
  41 // CHECK-UNKNOWN: 2527c000 <unknown>
  42
  43 uqsub     z31.b, z31.b, #255
  44 // CHECK-INST: uqsub z31.b, z31.b, #255
  45 // CHECK-ENCODING: [0xff,0xdf,0x27,0x25]
  46 // CHECK-ERROR: instruction requires: sve or sme
  47 // CHECK-UNKNOWN: 2527dfff <unknown>
  48
  49 uqsub     z0.h, z0.h, #0
  50 // CHECK-INST: uqsub z0.h, z0.h, #0
  51 // CHECK-ENCODING: [0x00,0xc0,0x67,0x25]
  52 // CHECK-ERROR: instruction requires: sve or sme
  53 // CHECK-UNKNOWN: 2567c000 <unknown>
  54
  55 uqsub     z0.h, z0.h, #0, lsl #8
  56 // CHECK-INST: uqsub z0.h, z0.h, #0, lsl #8
  57 // CHECK-ENCODING: [0x00,0xe0,0x67,0x25]
  58 // CHECK-ERROR: instruction requires: sve or sme
  59 // CHECK-UNKNOWN: 2567e000 <unknown>
  60
  61 uqsub     z31.h, z31.h, #255, lsl #8
  62 // CHECK-INST: uqsub z31.h, z31.h, #65280
  63 // CHECK-ENCODING: [0xff,0xff,0x67,0x25]
  64 // CHECK-ERROR: instruction requires: sve or sme
  65 // CHECK-UNKNOWN: 2567ffff <unknown>
  66
  67 uqsub     z31.h, z31.h, #65280
  68 // CHECK-INST: uqsub z31.h, z31.h, #65280
  69 // CHECK-ENCODING: [0xff,0xff,0x67,0x25]
  70 // CHECK-ERROR: instruction requires: sve or sme
  71 // CHECK-UNKNOWN: 2567ffff <unknown>
  72
  73 uqsub     z0.s, z0.s, #0
  74 // CHECK-INST: uqsub z0.s, z0.s, #0
  75 // CHECK-ENCODING: [0x00,0xc0,0xa7,0x25]
  76 // CHECK-ERROR: instruction requires: sve or sme
  77 // CHECK-UNKNOWN: 25a7c000 <unknown>
  78
  79 uqsub     z0.s, z0.s, #0, lsl #8
  80 // CHECK-INST: uqsub z0.s, z0.s, #0, lsl #8
  81 // CHECK-ENCODING: [0x00,0xe0,0xa7,0x25]
  82 // CHECK-ERROR: instruction requires: sve or sme
  83 // CHECK-UNKNOWN: 25a7e000 <unknown>
  84
  85 uqsub     z31.s, z31.s, #255, lsl #8
  86 // CHECK-INST: uqsub z31.s, z31.s, #65280
  87 // CHECK-ENCODING: [0xff,0xff,0xa7,0x25]
  88 // CHECK-ERROR: instruction requires: sve or sme
  89 // CHECK-UNKNOWN: 25a7ffff <unknown>
  90
  91 uqsub     z31.s, z31.s, #65280
  92 // CHECK-INST: uqsub z31.s, z31.s, #65280
  93 // CHECK-ENCODING: [0xff,0xff,0xa7,0x25]
  94 // CHECK-ERROR: instruction requires: sve or sme
  95 // CHECK-UNKNOWN: 25a7ffff <unknown>
  96
  97 uqsub     z0.d, z0.d, #0
  98 // CHECK-INST: uqsub z0.d, z0.d, #0
  99 // CHECK-ENCODING: [0x00,0xc0,0xe7,0x25]
 100 // CHECK-ERROR: instruction requires: sve or sme
 101 // CHECK-UNKNOWN: 25e7c000 <unknown>
 102
 103 uqsub     z0.d, z0.d, #0, lsl #8
 104 // CHECK-INST: uqsub z0.d, z0.d, #0, lsl #8
 105 // CHECK-ENCODING: [0x00,0xe0,0xe7,0x25]
 106 // CHECK-ERROR: instruction requires: sve or sme
 107 // CHECK-UNKNOWN: 25e7e000 <unknown>
 108
 109 uqsub     z31.d, z31.d, #255, lsl #8
 110 // CHECK-INST: uqsub z31.d, z31.d, #65280
 111 // CHECK-ENCODING: [0xff,0xff,0xe7,0x25]
 112 // CHECK-ERROR: instruction requires: sve or sme
 113 // CHECK-UNKNOWN: 25e7ffff <unknown>
 114
 115 uqsub     z31.d, z31.d, #65280
 116 // CHECK-INST: uqsub z31.d, z31.d, #65280
 117 // CHECK-ENCODING: [0xff,0xff,0xe7,0x25]
 118 // CHECK-ERROR: instruction requires: sve or sme
 119 // CHECK-UNKNOWN: 25e7ffff <unknown>
 120
 121
 122 // --------------------------------------------------------------------------//
 123 // Test compatibility with MOVPRFX instruction.
 124
 125 movprfx z31, z6
 126 // CHECK-INST: movprfx  z31, z6
 127 // CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
 128 // CHECK-ERROR: instruction requires: sve or sme
 129 // CHECK-UNKNOWN: 0420bcdf <unknown>
 130
 131 uqsub     z31.d, z31.d, #65280
 132 // CHECK-INST: uqsub    z31.d, z31.d, #65280
 133 // CHECK-ENCODING: [0xff,0xff,0xe7,0x25]
 134 // CHECK-ERROR: instruction requires: sve or sme
 135 // CHECK-UNKNOWN: 25e7ffff <unknown>