[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE2 / fmlalt.s
blobb1dd859eceb9617722b9dd9937540d5b23b2a496
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
8 // RUN: | llvm-objdump -d --mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
10 // RUN: | llvm-objdump -d --mattr=-sve2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
13 fmlalt z29.s, z30.h, z31.h
14 // CHECK-INST: fmlalt z29.s, z30.h, z31.h
15 // CHECK-ENCODING: [0xdd,0x87,0xbf,0x64]
16 // CHECK-ERROR: instruction requires: sve2 or sme
17 // CHECK-UNKNOWN: 64bf87dd <unknown>
19 fmlalt z0.s, z1.h, z7.h[0]
20 // CHECK-INST: fmlalt z0.s, z1.h, z7.h[0]
21 // CHECK-ENCODING: [0x20,0x44,0xa7,0x64]
22 // CHECK-ERROR: instruction requires: sve2 or sme
23 // CHECK-UNKNOWN: 64a74420 <unknown>
25 fmlalt z30.s, z31.h, z7.h[7]
26 // CHECK-INST: fmlalt z30.s, z31.h, z7.h[7]
27 // CHECK-ENCODING: [0xfe,0x4f,0xbf,0x64]
28 // CHECK-ERROR: instruction requires: sve2 or sme
29 // CHECK-UNKNOWN: 64bf4ffe <unknown>
31 // --------------------------------------------------------------------------//
32 // Test compatibility with MOVPRFX instruction.
34 movprfx z29, z28
35 // CHECK-INST: movprfx z29, z28
36 // CHECK-ENCODING: [0x9d,0xbf,0x20,0x04]
37 // CHECK-ERROR: instruction requires: sve or sme
38 // CHECK-UNKNOWN: 0420bf9d <unknown>
40 fmlalt z29.s, z30.h, z31.h
41 // CHECK-INST: fmlalt z29.s, z30.h, z31.h
42 // CHECK-ENCODING: [0xdd,0x87,0xbf,0x64]
43 // CHECK-ERROR: instruction requires: sve2 or sme
44 // CHECK-UNKNOWN: 64bf87dd <unknown>
46 movprfx z21, z28
47 // CHECK-INST: movprfx z21, z28
48 // CHECK-ENCODING: [0x95,0xbf,0x20,0x04]
49 // CHECK-ERROR: instruction requires: sve or sme
50 // CHECK-UNKNOWN: 0420bf95 <unknown>
52 fmlalt z21.s, z1.h, z7.h[7]
53 // CHECK-INST: fmlalt z21.s, z1.h, z7.h[7]
54 // CHECK-ENCODING: [0x35,0x4c,0xbf,0x64]
55 // CHECK-ERROR: instruction requires: sve2 or sme
56 // CHECK-UNKNOWN: 64bf4c35 <unknown>