[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE2 / nmatch.s
blob1f3d0c816174fac5cacd1567d658f8276477606a
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
8 // RUN: | llvm-objdump -d --mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
10 // RUN: | llvm-objdump -d --mattr=-sve2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
12 nmatch p0.b, p0/z, z0.b, z0.b
13 // CHECK-INST: nmatch p0.b, p0/z, z0.b, z0.b
14 // CHECK-ENCODING: [0x10,0x80,0x20,0x45]
15 // CHECK-ERROR: instruction requires: sve2
16 // CHECK-UNKNOWN: 45208010 <unknown>
18 nmatch p0.h, p0/z, z0.h, z0.h
19 // CHECK-INST: nmatch p0.h, p0/z, z0.h, z0.h
20 // CHECK-ENCODING: [0x10,0x80,0x60,0x45]
21 // CHECK-ERROR: instruction requires: sve2
22 // CHECK-UNKNOWN: 45608010 <unknown>
24 nmatch p15.b, p7/z, z30.b, z31.b
25 // CHECK-INST: nmatch p15.b, p7/z, z30.b, z31.b
26 // CHECK-ENCODING: [0xdf,0x9f,0x3f,0x45]
27 // CHECK-ERROR: instruction requires: sve2
28 // CHECK-UNKNOWN: 453f9fdf <unknown>
30 nmatch p15.h, p7/z, z30.h, z31.h
31 // CHECK-INST: nmatch p15.h, p7/z, z30.h, z31.h
32 // CHECK-ENCODING: [0xdf,0x9f,0x7f,0x45]
33 // CHECK-ERROR: instruction requires: sve2
34 // CHECK-UNKNOWN: 457f9fdf <unknown>