llvm/test/MC/AArch64/SVE2/sqcadd.s

   1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
   2 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme < %s \
   4 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
   5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
   6 // RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
   7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
   8 // RUN:        | llvm-objdump -d --mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
   9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
  10 // RUN:   | llvm-objdump -d --mattr=-sve2 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
  11
  12 sqcadd   z0.b, z0.b, z0.b, #90
  13 // CHECK-INST: sqcadd   z0.b, z0.b, z0.b, #90
  14 // CHECK-ENCODING: [0x00,0xd8,0x01,0x45]
  15 // CHECK-ERROR: instruction requires: sve2 or sme
  16 // CHECK-UNKNOWN: 4501d800 <unknown>
  17
  18 sqcadd   z0.h, z0.h, z0.h, #90
  19 // CHECK-INST: sqcadd   z0.h, z0.h, z0.h, #90
  20 // CHECK-ENCODING: [0x00,0xd8,0x41,0x45]
  21 // CHECK-ERROR: instruction requires: sve2 or sme
  22 // CHECK-UNKNOWN: 4541d800 <unknown>
  23
  24 sqcadd   z0.s, z0.s, z0.s, #90
  25 // CHECK-INST: sqcadd   z0.s, z0.s, z0.s, #90
  26 // CHECK-ENCODING: [0x00,0xd8,0x81,0x45]
  27 // CHECK-ERROR: instruction requires: sve2 or sme
  28 // CHECK-UNKNOWN: 4581d800 <unknown>
  29
  30 sqcadd   z0.d, z0.d, z0.d, #90
  31 // CHECK-INST: sqcadd   z0.d, z0.d, z0.d, #90
  32 // CHECK-ENCODING: [0x00,0xd8,0xc1,0x45]
  33 // CHECK-ERROR: instruction requires: sve2 or sme
  34 // CHECK-UNKNOWN: 45c1d800 <unknown>
  35
  36 sqcadd   z31.b, z31.b, z31.b, #270
  37 // CHECK-INST: sqcadd   z31.b, z31.b, z31.b, #270
  38 // CHECK-ENCODING: [0xff,0xdf,0x01,0x45]
  39 // CHECK-ERROR: instruction requires: sve2 or sme
  40 // CHECK-UNKNOWN: 4501dfff <unknown>
  41
  42 sqcadd   z31.h, z31.h, z31.h, #270
  43 // CHECK-INST: sqcadd   z31.h, z31.h, z31.h, #270
  44 // CHECK-ENCODING: [0xff,0xdf,0x41,0x45]
  45 // CHECK-ERROR: instruction requires: sve2 or sme
  46 // CHECK-UNKNOWN: 4541dfff <unknown>
  47
  48 sqcadd   z31.s, z31.s, z31.s, #270
  49 // CHECK-INST: sqcadd   z31.s, z31.s, z31.s, #270
  50 // CHECK-ENCODING: [0xff,0xdf,0x81,0x45]
  51 // CHECK-ERROR: instruction requires: sve2 or sme
  52 // CHECK-UNKNOWN: 4581dfff <unknown>
  53
  54 sqcadd   z31.d, z31.d, z31.d, #270
  55 // CHECK-INST: sqcadd   z31.d, z31.d, z31.d, #270
  56 // CHECK-ENCODING: [0xff,0xdf,0xc1,0x45]
  57 // CHECK-ERROR: instruction requires: sve2 or sme
  58 // CHECK-UNKNOWN: 45c1dfff <unknown>
  59
  60
  61 // --------------------------------------------------------------------------//
  62 // Test compatibility with MOVPRFX instruction.
  63
  64 movprfx z4, z6
  65 // CHECK-INST: movprfx  z4, z6
  66 // CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
  67 // CHECK-ERROR: instruction requires: sve or sme
  68 // CHECK-UNKNOWN: 0420bcc4 <unknown>
  69
  70 sqcadd   z4.d, z4.d, z31.d, #270
  71 // CHECK-INST: sqcadd   z4.d, z4.d, z31.d, #270
  72 // CHECK-ENCODING: [0xe4,0xdf,0xc1,0x45]
  73 // CHECK-ERROR: instruction requires: sve2 or sme
  74 // CHECK-UNKNOWN: 45c1dfe4 <unknown>