[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE2p1 / andqv.s
blob38bce072961acf4c29a045aa397ba40743f19e55
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1 < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1 < %s \
8 // RUN: | llvm-objdump -d --mattr=+sme2p1 - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2p1 < %s \
10 // RUN: | llvm-objdump -d --mattr=-sme2p1,-sve2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
11 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2p1 < %s \
12 // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
13 // RUN: | llvm-mc -triple=aarch64 -mattr=+sme2p1 -disassemble -show-encoding \
14 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
16 andqv v0.8h, p0, z0.h // 00000100-01011110-00100000-00000000
17 // CHECK-INST: andqv v0.8h, p0, z0.h
18 // CHECK-ENCODING: [0x00,0x20,0x5e,0x04]
19 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
20 // CHECK-UNKNOWN: 045e2000 <unknown>
22 andqv v21.8h, p5, z10.h // 00000100-01011110-00110101-01010101
23 // CHECK-INST: andqv v21.8h, p5, z10.h
24 // CHECK-ENCODING: [0x55,0x35,0x5e,0x04]
25 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
26 // CHECK-UNKNOWN: 045e3555 <unknown>
28 andqv v23.8h, p3, z13.h // 00000100-01011110-00101101-10110111
29 // CHECK-INST: andqv v23.8h, p3, z13.h
30 // CHECK-ENCODING: [0xb7,0x2d,0x5e,0x04]
31 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
32 // CHECK-UNKNOWN: 045e2db7 <unknown>
34 andqv v31.8h, p7, z31.h // 00000100-01011110-00111111-11111111
35 // CHECK-INST: andqv v31.8h, p7, z31.h
36 // CHECK-ENCODING: [0xff,0x3f,0x5e,0x04]
37 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
38 // CHECK-UNKNOWN: 045e3fff <unknown>
40 andqv v0.4s, p0, z0.s // 00000100-10011110-00100000-00000000
41 // CHECK-INST: andqv v0.4s, p0, z0.s
42 // CHECK-ENCODING: [0x00,0x20,0x9e,0x04]
43 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
44 // CHECK-UNKNOWN: 049e2000 <unknown>
46 andqv v21.4s, p5, z10.s // 00000100-10011110-00110101-01010101
47 // CHECK-INST: andqv v21.4s, p5, z10.s
48 // CHECK-ENCODING: [0x55,0x35,0x9e,0x04]
49 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
50 // CHECK-UNKNOWN: 049e3555 <unknown>
52 andqv v23.4s, p3, z13.s // 00000100-10011110-00101101-10110111
53 // CHECK-INST: andqv v23.4s, p3, z13.s
54 // CHECK-ENCODING: [0xb7,0x2d,0x9e,0x04]
55 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
56 // CHECK-UNKNOWN: 049e2db7 <unknown>
58 andqv v31.4s, p7, z31.s // 00000100-10011110-00111111-11111111
59 // CHECK-INST: andqv v31.4s, p7, z31.s
60 // CHECK-ENCODING: [0xff,0x3f,0x9e,0x04]
61 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
62 // CHECK-UNKNOWN: 049e3fff <unknown>
64 andqv v0.2d, p0, z0.d // 00000100-11011110-00100000-00000000
65 // CHECK-INST: andqv v0.2d, p0, z0.d
66 // CHECK-ENCODING: [0x00,0x20,0xde,0x04]
67 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
68 // CHECK-UNKNOWN: 04de2000 <unknown>
70 andqv v21.2d, p5, z10.d // 00000100-11011110-00110101-01010101
71 // CHECK-INST: andqv v21.2d, p5, z10.d
72 // CHECK-ENCODING: [0x55,0x35,0xde,0x04]
73 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
74 // CHECK-UNKNOWN: 04de3555 <unknown>
76 andqv v23.2d, p3, z13.d // 00000100-11011110-00101101-10110111
77 // CHECK-INST: andqv v23.2d, p3, z13.d
78 // CHECK-ENCODING: [0xb7,0x2d,0xde,0x04]
79 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
80 // CHECK-UNKNOWN: 04de2db7 <unknown>
82 andqv v31.2d, p7, z31.d // 00000100-11011110-00111111-11111111
83 // CHECK-INST: andqv v31.2d, p7, z31.d
84 // CHECK-ENCODING: [0xff,0x3f,0xde,0x04]
85 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
86 // CHECK-UNKNOWN: 04de3fff <unknown>
88 andqv v0.16b, p0, z0.b // 00000100-00011110-00100000-00000000
89 // CHECK-INST: andqv v0.16b, p0, z0.b
90 // CHECK-ENCODING: [0x00,0x20,0x1e,0x04]
91 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
92 // CHECK-UNKNOWN: 041e2000 <unknown>
94 andqv v21.16b, p5, z10.b // 00000100-00011110-00110101-01010101
95 // CHECK-INST: andqv v21.16b, p5, z10.b
96 // CHECK-ENCODING: [0x55,0x35,0x1e,0x04]
97 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
98 // CHECK-UNKNOWN: 041e3555 <unknown>
100 andqv v23.16b, p3, z13.b // 00000100-00011110-00101101-10110111
101 // CHECK-INST: andqv v23.16b, p3, z13.b
102 // CHECK-ENCODING: [0xb7,0x2d,0x1e,0x04]
103 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
104 // CHECK-UNKNOWN: 041e2db7 <unknown>
106 andqv v31.16b, p7, z31.b // 00000100-00011110-00111111-11111111
107 // CHECK-INST: andqv v31.16b, p7, z31.b
108 // CHECK-ENCODING: [0xff,0x3f,0x1e,0x04]
109 // CHECK-ERROR: instruction requires: sme2p1 or sve2p1
110 // CHECK-UNKNOWN: 041e3fff <unknown>