[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE2p1 / cntp-diagnostics.s
blob667a8aefe86e093da4bd9d7d5335895afcb6e6ac
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 2>&1 < %s | FileCheck %s
3 // --------------------------------------------------------------------------//
4 // Invalid Pattern
6 cntp x0, pn0.s, vlx1
7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
8 // CHECK-NEXT: cntp x0, pn0.s, vlx1
9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
11 // --------------------------------------------------------------------------//
12 // Invalid use of predicate without suffix
14 cntp x0, pn0, vlx2
15 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: Invalid predicate register, expected PN in range pn0..pn15 with element suffix.
16 // CHECK-NEXT: cntp x0, pn0, vlx2
17 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
19 // --------------------------------------------------------------------------//
20 // Invalid destination register type
22 cntp w0, pn0.b, vlx2
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
24 // CHECK-NEXT: cntp w0, pn0.b, vlx2
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: