[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE2p1 / fclamp.s
blob8512d6077699dc0601d5422af57d47f13916ed2c
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 < %s \
4 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
5 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
6 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
8 // RUN: | llvm-objdump -d --mattr=+sme2 - | FileCheck %s --check-prefix=CHECK-INST
9 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sme2 < %s \
10 // RUN: | llvm-objdump -d --mattr=-sme2,-sve2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
11 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sme2 < %s \
12 // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
13 // RUN: | llvm-mc -triple=aarch64 -mattr=+sme2 -disassemble -show-encoding \
14 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
16 movprfx z23, z31
17 fclamp z23.d, z13.d, z8.d // 01100100-11101000-00100101-10110111
18 // CHECK-INST: movprfx z23, z31
19 // CHECK-INST: fclamp z23.d, z13.d, z8.d
20 // CHECK-ENCODING: [0xb7,0x25,0xe8,0x64]
21 // CHECK-ERROR: instruction requires: sme2 or sve2p1
22 // CHECK-UNKNOWN: 64e825b7 <unknown>
24 fclamp z0.d, z0.d, z0.d // 01100100-11100000-00100100-00000000
25 // CHECK-INST: fclamp z0.d, z0.d, z0.d
26 // CHECK-ENCODING: [0x00,0x24,0xe0,0x64]
27 // CHECK-ERROR: instruction requires: sme2 or sve2p1
28 // CHECK-UNKNOWN: 64e02400 <unknown>
30 fclamp z21.d, z10.d, z21.d // 01100100-11110101-00100101-01010101
31 // CHECK-INST: fclamp z21.d, z10.d, z21.d
32 // CHECK-ENCODING: [0x55,0x25,0xf5,0x64]
33 // CHECK-ERROR: instruction requires: sme2 or sve2p1
34 // CHECK-UNKNOWN: 64f52555 <unknown>
36 fclamp z23.d, z13.d, z8.d // 01100100-11101000-00100101-10110111
37 // CHECK-INST: fclamp z23.d, z13.d, z8.d
38 // CHECK-ENCODING: [0xb7,0x25,0xe8,0x64]
39 // CHECK-ERROR: instruction requires: sme2 or sve2p1
40 // CHECK-UNKNOWN: 64e825b7 <unknown>
42 fclamp z31.d, z31.d, z31.d // 01100100-11111111-00100111-11111111
43 // CHECK-INST: fclamp z31.d, z31.d, z31.d
44 // CHECK-ENCODING: [0xff,0x27,0xff,0x64]
45 // CHECK-ERROR: instruction requires: sme2 or sve2p1
46 // CHECK-UNKNOWN: 64ff27ff <unknown>
48 movprfx z23, z31
49 fclamp z23.h, z13.h, z8.h // 01100100-01101000-00100101-10110111
50 // CHECK-INST: movprfx z23, z31
51 // CHECK-INST: fclamp z23.h, z13.h, z8.h
52 // CHECK-ENCODING: [0xb7,0x25,0x68,0x64]
53 // CHECK-ERROR: instruction requires: sme2 or sve2p1
54 // CHECK-UNKNOWN: 646825b7 <unknown>
56 fclamp z0.h, z0.h, z0.h // 01100100-01100000-00100100-00000000
57 // CHECK-INST: fclamp z0.h, z0.h, z0.h
58 // CHECK-ENCODING: [0x00,0x24,0x60,0x64]
59 // CHECK-ERROR: instruction requires: sme2 or sve2p1
60 // CHECK-UNKNOWN: 64602400 <unknown>
62 fclamp z21.h, z10.h, z21.h // 01100100-01110101-00100101-01010101
63 // CHECK-INST: fclamp z21.h, z10.h, z21.h
64 // CHECK-ENCODING: [0x55,0x25,0x75,0x64]
65 // CHECK-ERROR: instruction requires: sme2 or sve2p1
66 // CHECK-UNKNOWN: 64752555 <unknown>
68 fclamp z23.h, z13.h, z8.h // 01100100-01101000-00100101-10110111
69 // CHECK-INST: fclamp z23.h, z13.h, z8.h
70 // CHECK-ENCODING: [0xb7,0x25,0x68,0x64]
71 // CHECK-ERROR: instruction requires: sme2 or sve2p1
72 // CHECK-UNKNOWN: 646825b7 <unknown>
74 fclamp z31.h, z31.h, z31.h // 01100100-01111111-00100111-11111111
75 // CHECK-INST: fclamp z31.h, z31.h, z31.h
76 // CHECK-ENCODING: [0xff,0x27,0x7f,0x64]
77 // CHECK-ERROR: instruction requires: sme2 or sve2p1
78 // CHECK-UNKNOWN: 647f27ff <unknown>
80 movprfx z23, z31
81 fclamp z23.s, z13.s, z8.s // 01100100-10101000-00100101-10110111
82 // CHECK-INST: movprfx z23, z31
83 // CHECK-INST: fclamp z23.s, z13.s, z8.s
84 // CHECK-ENCODING: [0xb7,0x25,0xa8,0x64]
85 // CHECK-ERROR: instruction requires: sme2 or sve2p1
86 // CHECK-UNKNOWN: 64a825b7 <unknown>
88 fclamp z0.s, z0.s, z0.s // 01100100-10100000-00100100-00000000
89 // CHECK-INST: fclamp z0.s, z0.s, z0.s
90 // CHECK-ENCODING: [0x00,0x24,0xa0,0x64]
91 // CHECK-ERROR: instruction requires: sme2 or sve2p1
92 // CHECK-UNKNOWN: 64a02400 <unknown>
94 fclamp z21.s, z10.s, z21.s // 01100100-10110101-00100101-01010101
95 // CHECK-INST: fclamp z21.s, z10.s, z21.s
96 // CHECK-ENCODING: [0x55,0x25,0xb5,0x64]
97 // CHECK-ERROR: instruction requires: sme2 or sve2p1
98 // CHECK-UNKNOWN: 64b52555 <unknown>
100 fclamp z23.s, z13.s, z8.s // 01100100-10101000-00100101-10110111
101 // CHECK-INST: fclamp z23.s, z13.s, z8.s
102 // CHECK-ENCODING: [0xb7,0x25,0xa8,0x64]
103 // CHECK-ERROR: instruction requires: sme2 or sve2p1
104 // CHECK-UNKNOWN: 64a825b7 <unknown>
106 fclamp z31.s, z31.s, z31.s // 01100100-10111111-00100111-11111111
107 // CHECK-INST: fclamp z31.s, z31.s, z31.s
108 // CHECK-ENCODING: [0xff,0x27,0xbf,0x64]
109 // CHECK-ERROR: instruction requires: sme2 or sve2p1
110 // CHECK-UNKNOWN: 64bf27ff <unknown>