[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE2p1 / ld1q.s
blob2adc657497d58c432eaa533f793b7e391f21e94e
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p1 < %s \
6 // RUN: | llvm-objdump -d --mattr=+sve2p1 - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2p1 < %s \
8 // RUN: | llvm-objdump -d --mattr=-sme2,-sve2p1 - | FileCheck %s --check-prefix=CHECK-UNKNOWN
9 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 < %s \
10 // RUN: | sed '/.text/d' | sed 's/.*encoding: //g' \
11 // RUN: | llvm-mc -triple=aarch64 -mattr=+sve2p1 -disassemble -show-encoding \
12 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
15 ld1q {z0.q}, p0/z, [z0.d, x0] // 11000100-00000000-10100000-00000000
16 // CHECK-INST: ld1q { z0.q }, p0/z, [z0.d, x0]
17 // CHECK-ENCODING: [0x00,0xa0,0x00,0xc4]
18 // CHECK-ERROR: instruction requires: sve2p1
19 // CHECK-UNKNOWN: c400a000 <unknown>
21 ld1q {z21.q}, p5/z, [z10.d, x21] // 11000100-00010101-10110101-01010101
22 // CHECK-INST: ld1q { z21.q }, p5/z, [z10.d, x21]
23 // CHECK-ENCODING: [0x55,0xb5,0x15,0xc4]
24 // CHECK-ERROR: instruction requires: sve2p1
25 // CHECK-UNKNOWN: c415b555 <unknown>
27 ld1q {z23.q}, p3/z, [z13.d, x8] // 11000100-00001000-10101101-10110111
28 // CHECK-INST: ld1q { z23.q }, p3/z, [z13.d, x8]
29 // CHECK-ENCODING: [0xb7,0xad,0x08,0xc4]
30 // CHECK-ERROR: instruction requires: sve2p1
31 // CHECK-UNKNOWN: c408adb7 <unknown>
33 ld1q {z31.q}, p7/z, [z31.d] // 11000100-00011111-10111111-11111111
34 // CHECK-INST: ld1q { z31.q }, p7/z, [z31.d]
35 // CHECK-ENCODING: [0xff,0xbf,0x1f,0xc4]
36 // CHECK-ERROR: instruction requires: sve2p1
37 // CHECK-UNKNOWN: c41fbfff <unknown>