[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / SVE2p1 / zipq1-diagnostics.s
blob94a4be1be28fafeadfb4881abd131ff018882391
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2p1 2>&1 < %s | FileCheck %s
3 // --------------------------------------------------------------------------//
4 // Invalid register suffixes
6 zipq1 z0.h, z0.h, z0.s
7 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
8 // CHECK-NEXT: zipq1 z0.h, z0.h, z0.s
9 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
11 zipq1 z0.d, z0.s, z0.s
12 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
13 // CHECK-NEXT: zipq1 z0.d, z0.s, z0.s
14 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: