[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / alias-addsubimm.s
blob8c2dbca78a496890dc9a2109d43670e6bfa3fdb3
1 // RUN: llvm-mc -triple=aarch64 < %s | FileCheck %s --check-prefixes=CHECK,ALIAS
2 // RUN: llvm-mc -triple=aarch64 -M no-aliases < %s | FileCheck %s --check-prefixes=CHECK,NOALIAS
3 // RUN: not llvm-mc -mattr=+no-neg-immediates -triple=aarch64-none-linux-gnu < %s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-NEG-IMM
5 /// +all does not imply +no-neg-immediates.
6 // RUN: llvm-mc -triple=aarch64 -mattr=+all -M no-aliases %s | FileCheck %s --check-prefixes=CHECK,NOALIAS
8 add w0, w2, #4096
9 sub w0, w2, #4096
10 // CHECK: add w0, w2, #1, lsl #12
11 // CHECK: sub w0, w2, #1, lsl #12
13 add w0, w2, #-4096
14 sub w0, w2, #-4096
15 // CHECK: sub w0, w2, #1, lsl #12
16 // CHECK: add w0, w2, #1, lsl #12
18 // CHECK: sub w0, w2, #2, lsl #12
19 // CHECK: sub w0, w2, #2, lsl #12
20 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
21 sub w0, w2, #2, lsl 12
22 add w0, w2, #-2, lsl 12
23 // CHECK: sub x1, x3, #2, lsl #12
24 // CHECK: sub x1, x3, #2, lsl #12
25 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
26 sub x1, x3, #2, lsl 12
27 add x1, x3, #-2, lsl 12
28 // CHECK: sub x1, x3, #4
29 // CHECK: sub x1, x3, #4
30 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
31 sub x1, x3, #4
32 add x1, x3, #-4
33 // CHECK: sub x1, x3, #4095
34 // CHECK: sub x1, x3, #4095
35 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
36 sub x1, x3, #4095, lsl 0
37 add x1, x3, #-4095, lsl 0
38 // CHECK: sub x3, x4, #0
39 sub x3, x4, #0
41 // CHECK: add w0, w2, #2, lsl #12
42 // CHECK: add w0, w2, #2, lsl #12
43 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
44 add w0, w2, #2, lsl 12
45 sub w0, w2, #-2, lsl 12
46 // CHECK: add x1, x3, #2, lsl #12
47 // CHECK: add x1, x3, #2, lsl #12
48 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
49 add x1, x3, #2, lsl 12
50 sub x1, x3, #-2, lsl 12
51 // CHECK: add x1, x3, #4
52 // CHECK: add x1, x3, #4
53 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
54 add x1, x3, #4
55 sub x1, x3, #-4
56 // CHECK: add x1, x3, #4095
57 // CHECK: add x1, x3, #4095
58 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
59 add x1, x3, #4095, lsl 0
60 sub x1, x3, #-4095, lsl 0
61 // CHECK: add x2, x5, #0
62 add x2, x5, #0
64 // CHECK: subs w0, w2, #2, lsl #12
65 // CHECK: subs w0, w2, #2, lsl #12
66 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
67 subs w0, w2, #2, lsl 12
68 adds w0, w2, #-2, lsl 12
69 // CHECK: subs x1, x3, #2, lsl #12
70 // CHECK: subs x1, x3, #2, lsl #12
71 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
72 subs x1, x3, #2, lsl 12
73 adds x1, x3, #-2, lsl 12
74 // CHECK: subs x1, x3, #4
75 // CHECK: subs x1, x3, #4
76 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
77 subs x1, x3, #4
78 adds x1, x3, #-4
79 // CHECK: subs x1, x3, #4095
80 // CHECK: subs x1, x3, #4095
81 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
82 subs x1, x3, #4095, lsl 0
83 adds x1, x3, #-4095, lsl 0
84 // CHECK: subs x3, x4, #0
85 subs x3, x4, #0
87 // CHECK: adds w0, w2, #2, lsl #12
88 // CHECK: adds w0, w2, #2, lsl #12
89 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
90 adds w0, w2, #2, lsl 12
91 subs w0, w2, #-2, lsl 12
92 // CHECK: adds x1, x3, #2, lsl #12
93 // CHECK: adds x1, x3, #2, lsl #12
94 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
95 adds x1, x3, #2, lsl 12
96 subs x1, x3, #-2, lsl 12
97 // CHECK: adds x1, x3, #4
98 // CHECK: adds x1, x3, #4
99 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
100 adds x1, x3, #4
101 subs x1, x3, #-4
102 // CHECK: adds x1, x3, #4095
103 // CHECK: adds x1, x3, #4095
104 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
105 adds x1, x3, #4095, lsl 0
106 subs x1, x3, #-4095, lsl 0
107 // CHECK: adds x2, x5, #0
108 adds x2, x5, #0
110 // ALIAS: cmn x5, #5
111 // ALIAS: cmn x5, #5
112 // NOALIAS: adds xzr, x5, #5
113 // NOALIAS: adds xzr, x5, #5
114 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
115 cmn x5, #5
116 cmp x5, #-5
117 // ALIAS: cmp x6, #4095
118 // ALIAS: cmp x6, #4095
119 // NOALIAS: subs xzr, x6, #4095
120 // NOALIAS: subs xzr, x6, #4095
121 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
122 cmp x6, #4095
123 cmn x6, #-4095
124 // ALIAS: cmn w7, #5
125 // ALIAS: cmn w7, #5
126 // NOALIAS: adds wzr, w7, #5
127 // NOALIAS: adds wzr, w7, #5
128 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
129 cmn w7, #5
130 cmp w7, #-5
131 // ALIAS: cmp w8, #4095
132 // ALIAS: cmp w8, #4095
133 // NOALIAS: subs wzr, w8, #4095
134 // NOALIAS: subs wzr, w8, #4095
135 // CHECK-NO-NEG-IMM: instruction requires: NegativeImmediates
136 cmp w8, #4095
137 cmn w8, #-4095