[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / AArch64 / armv9a-mec.s
blobf2a5fe8d38fffbba9e48d9bb7ede532cf0928543
1 // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+mec < %s | FileCheck %s
2 // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v9a < %s | FileCheck %s
3 // RUN: not llvm-mc -triple aarch64-none-linux-gnu < %s 2>&1 | FileCheck --check-prefix=CHECK-NO-MEC %s
5 mrs x0, MECIDR_EL2
6 // CHECK: mrs x0, MECIDR_EL2 // encoding: [0xe0,0xa8,0x3c,0xd5]
7 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
8 mrs x0, MECID_P0_EL2
9 // CHECK: mrs x0, MECID_P0_EL2 // encoding: [0x00,0xa8,0x3c,0xd5]
10 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
11 mrs x0, MECID_A0_EL2
12 // CHECK: mrs x0, MECID_A0_EL2 // encoding: [0x20,0xa8,0x3c,0xd5]
13 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
14 mrs x0, MECID_P1_EL2
15 // CHECK: mrs x0, MECID_P1_EL2 // encoding: [0x40,0xa8,0x3c,0xd5]
16 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
17 mrs x0, MECID_A1_EL2
18 // CHECK: mrs x0, MECID_A1_EL2 // encoding: [0x60,0xa8,0x3c,0xd5]
19 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
20 mrs x0, VMECID_P_EL2
21 // CHECK: mrs x0, VMECID_P_EL2 // encoding: [0x00,0xa9,0x3c,0xd5]
22 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
23 mrs x0, VMECID_A_EL2
24 // CHECK: mrs x0, VMECID_A_EL2 // encoding: [0x20,0xa9,0x3c,0xd5]
25 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
26 mrs x0, MECID_RL_A_EL3
27 // CHECK: mrs x0, MECID_RL_A_EL3 // encoding: [0x20,0xaa,0x3e,0xd5]
28 // CHECK-NO-MEC: [[@LINE-2]]:19: error: expected readable system register
29 msr MECID_P0_EL2, x0
30 // CHECK: msr MECID_P0_EL2, x0 // encoding: [0x00,0xa8,0x1c,0xd5]
31 // CHECK-NO-MEC: [[@LINE-2]]:15: error: expected writable system register or pstate
32 msr MECID_A0_EL2, x0
33 // CHECK: msr MECID_A0_EL2, x0 // encoding: [0x20,0xa8,0x1c,0xd5]
34 // CHECK-NO-MEC: [[@LINE-2]]:15: error: expected writable system register or pstate
35 msr MECID_P1_EL2, x0
36 // CHECK: msr MECID_P1_EL2, x0 // encoding: [0x40,0xa8,0x1c,0xd5]
37 // CHECK-NO-MEC: [[@LINE-2]]:15: error: expected writable system register or pstate
38 msr MECID_A1_EL2, x0
39 // CHECK: msr MECID_A1_EL2, x0 // encoding: [0x60,0xa8,0x1c,0xd5]
40 // CHECK-NO-MEC: [[@LINE-2]]:15: error: expected writable system register or pstate
41 msr VMECID_P_EL2, x0
42 // CHECK: msr VMECID_P_EL2, x0 // encoding: [0x00,0xa9,0x1c,0xd5]
43 // CHECK-NO-MEC: [[@LINE-2]]:15: error: expected writable system register or pstate
44 msr VMECID_A_EL2, x0
45 // CHECK: msr VMECID_A_EL2, x0 // encoding: [0x20,0xa9,0x1c,0xd5]
46 // CHECK-NO-MEC: [[@LINE-2]]:15: error: expected writable system register or pstate
47 msr MECID_RL_A_EL3, x0
48 // CHECK: msr MECID_RL_A_EL3, x0 // encoding: [0x20,0xaa,0x1e,0xd5]
49 // CHECK-NO-MEC: [[@LINE-2]]:15: error: expected writable system register or pstate
51 dc cigdpae, x0
52 // CHECK: dc cigdpae, x0 // encoding: [0xe0,0x7e,0x0c,0xd5]
53 // CHECK-NO-MEC: [[@LINE-2]]:14: error: DC CIGDPAE requires: mec
54 dc cipae, x0
55 // CHECK: dc cipae, x0 // encoding: [0x00,0x7e,0x0c,0xd5]
56 // CHECK-NO-MEC: [[@LINE-2]]:14: error: DC CIPAE requires: mec