[AMDGPU] Add True16 register classes.
[llvm-project.git] / llvm / test / MC / Sparc / sparc-atomic-instructions.s
blob0e5abccb53c6586824c2c16f746ee3ba6e545ae9
1 ! RUN: llvm-mc %s -triple=sparcv9 -show-encoding | FileCheck %s --check-prefix=V9
2 ! RUN: llvm-mc %s -triple=sparc -show-encoding | FileCheck %s --check-prefix=V8
4 ! V8: stbar ! encoding: [0x81,0x43,0xc0,0x00]
5 ! V9: stbar ! encoding: [0x81,0x43,0xc0,0x00]
6 stbar
8 ! V8: swap [%i0+%l6], %o2 ! encoding: [0xd4,0x7e,0x00,0x16]
9 ! V9: swap [%i0+%l6], %o2 ! encoding: [0xd4,0x7e,0x00,0x16]
10 swap [%i0+%l6], %o2
12 ! V8: swap [%i0+32], %o2 ! encoding: [0xd4,0x7e,0x20,0x20]
13 ! V9: swap [%i0+32], %o2 ! encoding: [0xd4,0x7e,0x20,0x20]
14 swap [%i0+32], %o2
16 ! V8: swapa [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
17 ! V9: swapa [%i0+%l6] #ASI_SNF, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
18 swapa [%i0+%l6] 131, %o2
20 ! V8: swapa [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
21 ! V9: swapa [%i0+%l6] #ASI_SNF, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
22 swapa [%i0+%l6] (130+1), %o2
24 ! V8: ldstub [%i0+40], %g1 ! encoding: [0xc2,0x6e,0x20,0x28]
25 ! V9: ldstub [%i0+40], %g1 ! encoding: [0xc2,0x6e,0x20,0x28]
26 ldstub [%i0+40], %g1
28 ! V8: ldstub [%i0+%i2], %g1 ! encoding: [0xc2,0x6e,0x00,0x1a]
29 ! V9: ldstub [%i0+%i2], %g1 ! encoding: [0xc2,0x6e,0x00,0x1a]
30 ldstub [%i0+%i2], %g1
32 ! V8: ldstuba [%i0+%i2] 131, %g1 ! encoding: [0xc2,0xee,0x10,0x7a]
33 ! V9: ldstuba [%i0+%i2] #ASI_SNF, %g1 ! encoding: [0xc2,0xee,0x10,0x7a]
34 ldstuba [%i0+%i2] 131, %g1
36 ! V8: ldstuba [%i0+%i2] 131, %g1 ! encoding: [0xc2,0xee,0x10,0x7a]
37 ! V9: ldstuba [%i0+%i2] #ASI_SNF, %g1 ! encoding: [0xc2,0xee,0x10,0x7a]
38 ldstuba [%i0+%i2] (130+1), %g1